diff --git a/OWNERS b/OWNERS
new file mode 100644
index 0000000..1451bd8
--- /dev/null
+++ b/OWNERS
@@ -0,0 +1 @@
+per-file powerhint.json = jychen@google.com,jenhaochen@google.com,wvw@google.com,joaodias@google.com
diff --git a/aosp_lynx.mk b/aosp_lynx.mk
index 792acf5..1850584 100644
--- a/aosp_lynx.mk
+++ b/aosp_lynx.mk
@@ -19,7 +19,6 @@ TARGET_LINUX_KERNEL_VERSION := 5.10
 DEVICE_USES_NO_TRUSTY := true
 USE_SWIFTSHADER := true
 BOARD_USES_SWIFTSHADER := true
-BOARD_WITHOUT_RADIO := true
 
 $(call inherit-product, device/google/gs201/aosp_common.mk)
 $(call inherit-product, device/google/lynx/device-lynx.mk)
diff --git a/audio/lynx/config/audio_platform_configuration.xml b/audio/lynx/config/audio_platform_configuration.xml
index fdf48e9..1a3aba5 100644
--- a/audio/lynx/config/audio_platform_configuration.xml
+++ b/audio/lynx/config/audio_platform_configuration.xml
@@ -35,6 +35,7 @@
         <intf id="BE_VIRTUAL_VOICE_RX_TUNING" block_id="19"/>
         <intf id="BE_VIRTUAL_VOICE_TX_TUNING" block_id="19"/>
         <intf id="BE_HW_TX_INTF_0" block_id="134,128,137"/>
+        <intf id="BE_VIRTUAL_CRYSTAL_CLEAR_AUDIO_TUNING" block_id="138"/>
     </hw_intf>
 
     <product_lists>
@@ -198,8 +199,8 @@
         <!-- for input wit AUDIO_INPUT_FLAG_MMAP_NOIRQ 240 periods * 1ms buffer, 32-bit,2 ch, buffer size 92160 bytes -->
         <usecase id="UC_MMAP_RECORD" dev1="9" dyn_path="true" mmap="true" period="1" period_num="240"/>
         <!-- for hifi -->
-        <usecase id="UC_HIFI_PLAYBACK" dev1="25"/>
-        <usecase id="UC_HIFI_RECORD" dev1="26"/>
+        <usecase id="UC_HIFI_PLAYBACK" dev1="25" period="20" period_num="4"/>
+        <usecase id="UC_HIFI_RECORD" dev1="26" period="20" period_num="4"/>
     </usecase_attr>
 
     <dsp_latency>
@@ -214,26 +215,29 @@
             <be_cfg be_id="OUT_SPEAKER_BE_CFG" latency="70000"/>
             <be_cfg be_id="OUT_USB_HEADSET_BE_CFG" latency="70000"/>
             <be_cfg be_id="OUT_USB_HEADPHONE_BE_CFG" latency="70000"/>
-            <be_cfg be_id="OUT_A2DP_BE_CFG" latency="180000"/>
+            <be_cfg be_id="OUT_A2DP_BE_CFG" latency="100000"/>
         </usecase>
 
         <usecase id="UC_AUDIO_RECORD" type="capture">
-            <be_cfg be_id="IN_CAMCORDER_LANDSCAPE_BE_CFG" latency="160000"/>
-            <be_cfg be_id="IN_CAMCORDER_INVERT_LANDSCAPE_BE_CFG" latency="160000"/>
-            <be_cfg be_id="IN_CAMCORDER_PORTRAIT_BE_CFG" latency="160000"/>
-            <be_cfg be_id="IN_CAMCORDER_SELFIE_LANDSCAPE_BE_CFG" latency="160000"/>
-            <be_cfg be_id="IN_CAMCORDER_SELFIE_INVERT_LANDSCAPE_BE_CFG" latency="160000"/>
-            <be_cfg be_id="IN_CAMCORDER_SELFIE_PORTRAIT_BE_CFG" latency="160000"/>
-            <be_cfg be_id="IN_BTSCO_MIC_BE_CFG" latency="40000"/>
-            <be_cfg be_id="IN_BTSCO_MIC_NREC_BE_CFG" latency="40000"/>
-            <be_cfg be_id="IN_BTSCO_MIC_WB_BE_CFG" latency="40000"/>
-            <be_cfg be_id="IN_BTSCO_MIC_WB_NREC_BE_CFG" latency="40000"/>
+            <be_cfg be_id="IN_CAMCORDER_LANDSCAPE_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_CAMCORDER_INVERT_LANDSCAPE_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_CAMCORDER_PORTRAIT_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_CAMCORDER_SELFIE_LANDSCAPE_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_CAMCORDER_SELFIE_INVERT_LANDSCAPE_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_CAMCORDER_SELFIE_PORTRAIT_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_CAMCORDER_MIC_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_CAMCORDER_TRIPLE_MIC_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_NREC_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_WB_BE_CFG" latency="100000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_WB_NREC_BE_CFG" latency="100000"/>
         </usecase>
     </dsp_latency>
 
     <soundcard_name name="google,aoc-snd-card" />
     <features>
         <feature name="BatteryThrottle=Type:BCL_VOLTAGE,Name:BCL_AUDIO_BAACL,Strategy:MediaSpeakerAndScreenOn"/>
+        <feature name="PlaybackThermalThrottle=PollWaitMs:20000,ThermistorName:VIRTUAL-SKIN,ThermistorType:SKIN,ThrottlingSeverity:MODERATE"/>
     </features>
 
     <cfg_attr>
@@ -287,8 +291,9 @@
 
     <external_module>
         <module libname="audio_spk_35l41.so" argu="AcousticShockProtection"/>
-        <module libname="audio_waves_aoc.so" argu="Sink=SPK:1"/>
-        <module libname="audio_fortemedia_aoc.so" argu="DL_CH=y VoIP_DLCHs=SPK:1,USB:1 VoIP_Rate=32000"/>
+        <module libname="audio_waves_aoc.so" argu="Sink=SPK:1 ThermistorsName=VIRTUAL-SKIN"/>
+        <module libname="audio_cca_aoc.so"/>
+        <module libname="audio_fortemedia_aoc.so" argu="DL_CH=y VoIP_DLCHs=SPK:2,USB:2 VoIP_Rate=32000 BOOST_USB_SWB_CLK=y SHARED_MODULE=1130578253"/>
         <module libname="liboffloadeffect.so"/>
         <module libname="audio_amcs_ext.so"/>
         <module libname="audio_bluenote_aoc.so"/>
diff --git a/audio/lynx/config/audio_policy_configuration.xml b/audio/lynx/config/audio_policy_configuration.xml
index 69f334e..1418903 100644
--- a/audio/lynx/config/audio_policy_configuration.xml
+++ b/audio/lynx/config/audio_policy_configuration.xml
@@ -37,7 +37,7 @@
                              samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
                 </mixPort>
                 <mixPort name="compressed_offload" role="source"
-                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD">
                     <profile name="" format="AUDIO_FORMAT_MP3"
                              samplingRates="8000 16000 24000 32000 44100 48000"
                              channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
diff --git a/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml b/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml
index dc916ea..8253dcc 100644
--- a/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml
+++ b/audio/lynx/config/audio_policy_configuration_a2dp_offload_disabled.xml
@@ -37,7 +37,7 @@
                              samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
                 </mixPort>
                 <mixPort name="compressed_offload" role="source"
-                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD">
                     <profile name="" format="AUDIO_FORMAT_MP3"
                              samplingRates="8000 16000 24000 32000 44100 48000"
                              channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
diff --git a/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml b/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml
index 484048f..a44a6c5 100644
--- a/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml
+++ b/audio/lynx/config/audio_policy_configuration_bluetooth_legacy_hal.xml
@@ -37,7 +37,7 @@
                              samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
                 </mixPort>
                 <mixPort name="compressed_offload" role="source"
-                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD">
                     <profile name="" format="AUDIO_FORMAT_MP3"
                              samplingRates="8000 16000 24000 32000 44100 48000"
                              channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
diff --git a/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml b/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml
index 573098e..4d28b12 100644
--- a/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml
+++ b/audio/lynx/config/audio_policy_configuration_le_offload_disabled.xml
@@ -37,7 +37,7 @@
                              samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
                 </mixPort>
                 <mixPort name="compressed_offload" role="source"
-                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING AUDIO_OUTPUT_FLAG_GAPLESS_OFFLOAD">
                     <profile name="" format="AUDIO_FORMAT_MP3"
                              samplingRates="8000 16000 24000 32000 44100 48000"
                              channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
diff --git a/audio/lynx/config/audio_policy_volumes.xml b/audio/lynx/config/audio_policy_volumes.xml
index 2fc20cb..f6ff770 100644
--- a/audio/lynx/config/audio_policy_volumes.xml
+++ b/audio/lynx/config/audio_policy_volumes.xml
@@ -16,7 +16,7 @@
 <!-- Volume section defines a volume curve for a given use case and device category.
 It contains a list of points of this curve expressing the attenuation in Millibels for a given
 volume index from 0 to 100.
-<volume stream=”AUDIO_STREAM_MUSIC” deviceCategory=””>
+<volume stream="AUDIO_STREAM_MUSIC" deviceCategory="">
 <point>0,-9600</point>
 <point>100,0</point>
 </volume>
@@ -82,11 +82,11 @@ volume index from 0 to 100.
     <volume stream="AUDIO_STREAM_MUSIC" deviceCategory="DEVICE_CATEGORY_SPEAKER">
         <point>1,-6200</point>
         <point>28,-3800</point>
-        <point>64,-2000</point>
-        <point>68,-1800</point>
-        <point>72,-1600</point>
-        <point>76,-1400</point>
-        <point>80,-1200</point>
+        <point>64,-1900</point>
+        <point>68,-1700</point>
+        <point>72,-1500</point>
+        <point>76,-1300</point>
+        <point>80,-1150</point>
         <point>88,-850</point>
         <point>92,-650</point>
         <point>96,-400</point>
diff --git a/audio/lynx/config/mixer_paths.xml b/audio/lynx/config/mixer_paths.xml
index e7b6a9d..45df0f8 100644
--- a/audio/lynx/config/mixer_paths.xml
+++ b/audio/lynx/config/mixer_paths.xml
@@ -30,6 +30,9 @@
     <ctl name="PCM Stream Wait Time in MSec" value="100"/>
     <ctl name="Voice PCM Stream Wait Time in MSec" value="500"/>
 
+    <!-- Enable it when AOC is ready to trim delay and padding -->
+    <ctl name="Gapless Offload Enable" value="1"/>
+
     <!-- TDM 0 setting -->
     <ctl name="TDM_0_RX Chan" value="Four"/>
     <ctl name="TDM_0_RX Format" value="S32_LE"/>
@@ -673,6 +676,14 @@
         <ctl name="R Fast Use Case Switch Enable" value="1" />
     </path>
 
+    <path name="speaker-amp1">
+        <ctl name="Main AMP Enable Switch" value="1"/>
+    </path>
+
+    <path name="speaker-amp2">
+        <ctl name="R Main AMP Enable Switch" value="1"/>
+    </path>
+
     <path name="usb-tty-full">
     </path>
 
diff --git a/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin b/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin
index a21012f..3319feb 100644
Binary files a/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin and b/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin differ
diff --git a/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin b/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin
index 7562b94..79ae72a 100644
Binary files a/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin and b/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin differ
diff --git a/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin b/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin
index 2c40a73..a4234ab 100644
Binary files a/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin and b/audio/lynx/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin differ
diff --git a/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-cali.bin b/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-cali.bin
index 629da3a..2e13a8d 100644
Binary files a/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-cali.bin and b/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-cali.bin differ
diff --git a/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-diag.bin b/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-diag.bin
index 6b9170f..93891c3 100644
Binary files a/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-diag.bin and b/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-diag.bin differ
diff --git a/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-prot.bin b/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-prot.bin
index 4ce54a4..bddb303 100644
Binary files a/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-prot.bin and b/audio/lynx/cs35l41/fw/cs35l41-dsp1-spk-prot.bin differ
diff --git a/audio/lynx/tuning/bluenote/recording.gatf b/audio/lynx/tuning/bluenote/recording.gatf
index 4513cf7..0094631 100644
Binary files a/audio/lynx/tuning/bluenote/recording.gatf and b/audio/lynx/tuning/bluenote/recording.gatf differ
diff --git a/audio/lynx/tuning/fortemedia/BLUETOOTH.dat b/audio/lynx/tuning/fortemedia/BLUETOOTH.dat
index 6e15bdd..efa56d2 100644
Binary files a/audio/lynx/tuning/fortemedia/BLUETOOTH.dat and b/audio/lynx/tuning/fortemedia/BLUETOOTH.dat differ
diff --git a/audio/lynx/tuning/fortemedia/BLUETOOTH.mods b/audio/lynx/tuning/fortemedia/BLUETOOTH.mods
index 44f057f..3cae375 100644
--- a/audio/lynx/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/lynx/tuning/fortemedia/BLUETOOTH.mods
@@ -1,2682 +1,12 @@
 #PLATFORM_NAME  gChip
 #EXPORT_FLAG  BLUETOOTH
 #SINGLE_API_VER  1.2.1
-#SAVE_TIME  2022-07-29 15:47:43
-
-#CASE_NAME  BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0000    //TX_PATCH_REG
-3    0x0000    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0078    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0800    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0000    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0000    //TX_MICS_OF_PAIR0
-38    0x0000    //TX_MICS_OF_PAIR1
-39    0x0000    //TX_MICS_OF_PAIR2
-40    0x0000    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0003    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x0000    //TX_HD_BIN_MASK
-53    0x0000    //TX_HD_SUBAND_MASK
-54    0x0000    //TX_HD_FRAME_AVG_MASK
-55    0x0000    //TX_HD_MIN_FRQ
-56    0x0000    //TX_HD_ALPHA_PSD
-57    0x0000    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0x0000    //TX_T_PSDVAT
-63    0x0000    //TX_CNT
-64    0x0000    //TX_ANTI_HOWL_GAIN
-65    0x0000    //TX_MICFORBFMARK_0
-66    0x0000    //TX_MICFORBFMARK_1
-67    0x0000    //TX_MICFORBFMARK_2
-68    0x0000    //TX_MICFORBFMARK_3
-69    0x0000    //TX_MICFORBFMARK_4
-70    0x0000    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x0000    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x0000    //TX_ADCS_GAIN
-112    0x0000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x7FFF    //TX_BLMIC_BLKFACTOR
-116    0x7FFF    //TX_BRMIC_BLKFACTOR
-117    0x000A    //TX_MICBLK_START_BIN
-118    0x0041    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x0000    //TX_FE_ENER_TH_MTS
-124    0x0000    //TX_FE_ENER_TH_EXP
-125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0020    //TX_MIC_BLOCK_N
-128    0x7652    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x7800    //TX_THR_PITCH_DET_0
-131    0x7000    //TX_THR_PITCH_DET_1
-132    0x6000    //TX_THR_PITCH_DET_2
-133    0x0000    //TX_PITCH_BFR_LEN
-134    0x0000    //TX_SBD_PITCH_DET
-135    0x0000    //TX_TD_AEC_L
-136    0x0000    //TX_MU0_UNP_TD_AEC
-137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x2000    //TX_AEC_REF_GAIN_0
-148    0x2000    //TX_AEC_REF_GAIN_1
-149    0x2000    //TX_AEC_REF_GAIN_2
-150    0x4000    //TX_EAD_THR
-151    0x0200    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0100    //TX_MIN_EQ_RE_EST_3
-156    0x0100    //TX_MIN_EQ_RE_EST_4
-157    0x0100    //TX_MIN_EQ_RE_EST_5
-158    0x0100    //TX_MIN_EQ_RE_EST_6
-159    0x0100    //TX_MIN_EQ_RE_EST_7
-160    0x0100    //TX_MIN_EQ_RE_EST_8
-161    0x0100    //TX_MIN_EQ_RE_EST_9
-162    0x0100    //TX_MIN_EQ_RE_EST_10
-163    0x0100    //TX_MIN_EQ_RE_EST_11
-164    0x0100    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x0000    //TX_C_POST_FLT
-168    0x728A    //TX_GAIN_NP
-169    0x0008    //TX_SE_HOLD_N
-170    0x0050    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x0000    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x0000    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0000    //TX_FRQ_LIN_LEN
-184    0x0000    //TX_FRQ_AEC_LEN_RHO
-185    0x0000    //TX_MU0_UNP_FRQ_AEC
-186    0x0000    //TX_MU0_PTD_FRQ_AEC
-187    0x0000    //TX_MINENOISETH
-188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x0000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7333    //TX_DTD_THR1_0
-198    0x7333    //TX_DTD_THR1_1
-199    0x7333    //TX_DTD_THR1_2
-200    0x7333    //TX_DTD_THR1_3
-201    0x7333    //TX_DTD_THR1_4
-202    0x7333    //TX_DTD_THR1_5
-203    0x7333    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0400    //TX_DT_CUT_K
-214    0x0000    //TX_DT_CUT_THR
-215    0x0000    //TX_COMFORT_G
-216    0x0000    //TX_POWER_YOUT_TH
-217    0x0000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x0800    //TX_B_POST_FILT_ECHO_H
-230    0x0000    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x0000    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0000    //TX_DT_RESRV_7
-240    0x0000    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF200    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF800    //TX_THR_SN_EST_2
-245    0xF600    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0A00    //TX_N_SN_EST
-267    0x0000    //TX_INBEAM_T
-268    0x0000    //TX_INBEAMHOLDT
-269    0x1FFF    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x1000    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x0000    //TX_B_POST_FLT_0
-280    0x0000    //TX_B_POST_FLT_1
-281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x000C    //TX_NS_LVL_CTRL_3
-285    0x000C    //TX_NS_LVL_CTRL_4
-286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x001A    //TX_NS_LVL_CTRL_6
-288    0x000C    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0014    //TX_MIN_GAIN_S_1
-291    0x0014    //TX_MIN_GAIN_S_2
-292    0x0014    //TX_MIN_GAIN_S_3
-293    0x0014    //TX_MIN_GAIN_S_4
-294    0x0014    //TX_MIN_GAIN_S_5
-295    0x0014    //TX_MIN_GAIN_S_6
-296    0x0014    //TX_MIN_GAIN_S_7
-297    0x0000    //TX_NMOS_SUP
-298    0x0064    //TX_NS_MAX_PRI_SNR_TH
-299    0x7FFF    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x1200    //TX_THR_LFNS
-309    0x0028    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x7FFF    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x7FFF    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x1000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
-317    0x6666    //TX_A_POST_FILT_S_3
-318    0x6666    //TX_A_POST_FILT_S_4
-319    0x6666    //TX_A_POST_FILT_S_5
-320    0x199A    //TX_A_POST_FILT_S_6
-321    0x6666    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7E00    //TX_LAMBDA_PFILT_S_0
-340    0x7E00    //TX_LAMBDA_PFILT_S_1
-341    0x7E00    //TX_LAMBDA_PFILT_S_2
-342    0x7E00    //TX_LAMBDA_PFILT_S_3
-343    0x7E00    //TX_LAMBDA_PFILT_S_4
-344    0x7E00    //TX_LAMBDA_PFILT_S_5
-345    0x7E00    //TX_LAMBDA_PFILT_S_6
-346    0x7E00    //TX_LAMBDA_PFILT_S_7
-347    0x01F4    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
-349    0x0FA0    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0000    //TX_DT_BINVAD_TH_0
-354    0x0000    //TX_DT_BINVAD_TH_1
-355    0x0000    //TX_DT_BINVAD_TH_2
-356    0x0000    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0001    //TX_BF_SGRAD_FLG
-362    0x0000    //TX_BF_DVG_TH
-363    0x0000    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x05A0    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1388    //TX_NOISE_TH_0_2
-369    0x3A98    //TX_NOISE_TH_0_3
-370    0x0C80    //TX_NOISE_TH_1
-371    0x0032    //TX_NOISE_TH_2
-372    0x3D54    //TX_NOISE_TH_3
-373    0x012C    //TX_NOISE_TH_4
-374    0x07D0    //TX_NOISE_TH_5
-375    0x6590    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x00C8    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x0000    //TX_MORENS_TFMASK_TH
-381    0x0000    //TX_DRC_QUIET_FLOOR
-382    0x0000    //TX_RATIODTL_CUT_TH
-383    0x0000    //TX_DT_CUT_K1
-384    0x0640    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0640    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0640    //TX_OUT_ENER_S_TH_NOISY
-387    0x0190    //TX_OUT_ENER_TH_NOISE
-388    0x07D0    //TX_OUT_ENER_TH_SPEECH
-389    0x0000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0000    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
-398    0x0000    //TX_C_POST_FLT_MASK
-399    0x0000    //TX_A_POST_FLT_WNS
-400    0x0000    //TX_MIN_G_LOW300HZ
-401    0x0010    //TX_MAXLEVEL_CNG
-402    0x0000    //TX_STN_NOISE_TH
-403    0x0000    //TX_POST_MASK_SUP
-404    0x0000    //TX_POST_MASK_ADJUST
-405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x0226    //TX_MINENOISE_MIC0_S_TH
-408    0x2879    //TX_MIN_G_CTRL_SSNS
-409    0x0400    //TX_METAL_RTO_THR
-410    0x0080    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x0800    //TX_RHO_UPB
-415    0x0B40    //TX_N_HOLD_HS
-416    0x005A    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x0219    //TX_THR_STD_PLH
-421    0x09C4    //TX_N_HOLD_STD
-422    0x0166    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
-428    0x2000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0064    //TX_DESIRED_TALK_HOLDT
-431    0x1000    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0000    //TX_HS_VAD_BIN
-435    0x0000    //TX_THR_VAD_HS
-436    0x0000    //TX_MEAN_RTO_MIN_TH2
-437    0x0000    //TX_SILENCE_T
-438    0x4000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x099A    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x001E    //TX_DOA_VAD_THR_1
-445    0x001E    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x005A    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x005A    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x005A    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0172    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x071C    //TX_DOA_TRACK_HT
-477    0x0280    //TX_N1_HOLD_HF
-478    0x0140    //TX_N2_HOLD_HF
-479    0x2AAB    //TX_BF_RESET_THR_HF
-480    0x4000    //TX_DOA_SMOOTH
-481    0x0000    //TX_MU_BF
-482    0x0200    //TX_BF_MU_LF_B2
-483    0x0000    //TX_BF_FC_END_BIN_B2
-484    0x0000    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0000    //TX_N_DOA_SEED
-488    0x0000    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x0000    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x0000    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x0000    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0168    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0004    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0230    //TX_NOR_OFF_TH1
-503    0xD333    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x6666    //TX_MICTOBFGAIN0
-513    0x0014    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x0000    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0028    //TX_SNR_THR
-531    0x03E8    //TX_ENGY_THR
-532    0x0000    //TX_CORR_HIGH_TH
-533    0x0000    //TX_ENGY_THR_2
-534    0x0000    //TX_MEAN_RTO_THR
-535    0x0000    //TX_WNS_ENOISE_MIC0_TH
-536    0x0000    //TX_RATIOMICL_TH
-537    0x0000    //TX_CALIG_HS
-538    0x000A    //TX_LVL_CTRL
-539    0x0000    //TX_WIND_SUPRTO
-540    0x0000    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x0000    //TX_RATIOMICH_TH
-543    0x0000    //TX_WIND_INBEAM_L_TH
-544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0000    //TX_BVE_NOISE_FLOOR_1
-554    0x0000    //TX_BVE_NOISE_FLOOR_2
-555    0x0000    //TX_BVE_NOISE_FLOOR_3
-556    0x0000    //TX_BVE_NOISE_FLOOR_4
-557    0x0000    //TX_BVE_NOISE_FLOOR_5
-558    0x0000    //TX_BVE_NOISE_FLOOR_6
-559    0x0000    //TX_BVE_NOISE_FLOOR_7
-560    0x0000    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0000    //TX_FDEQ_BIN_0
-592    0x0000    //TX_FDEQ_BIN_1
-593    0x0000    //TX_FDEQ_BIN_2
-594    0x0000    //TX_FDEQ_BIN_3
-595    0x0000    //TX_FDEQ_BIN_4
-596    0x0000    //TX_FDEQ_BIN_5
-597    0x0000    //TX_FDEQ_BIN_6
-598    0x0000    //TX_FDEQ_BIN_7
-599    0x0000    //TX_FDEQ_BIN_8
-600    0x0000    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0000    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0000    //TX_PREEQ_BIN_MIC1_0
-691    0x0000    //TX_PREEQ_BIN_MIC1_1
-692    0x0000    //TX_PREEQ_BIN_MIC1_2
-693    0x0000    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0000    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0064    //TX_MIC_CALIBRATION_0
-766    0x006A    //TX_MIC_CALIBRATION_1
-767    0x006A    //TX_MIC_CALIBRATION_2
-768    0x006B    //TX_MIC_CALIBRATION_3
-769    0x0048    //TX_MIC_PWR_BIAS_0
-770    0x003C    //TX_MIC_PWR_BIAS_1
-771    0x003C    //TX_MIC_PWR_BIAS_2
-772    0x003C    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0009    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
-788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
-789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
-790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
-791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0002    //TX_DEADMIC_SILENCE_TH
-817    0x0147    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x0000    //TX_A_POST_FLT_FP
-835    0x0000    //TX_RTO_OUTBEAM_TH
-836    0x0000    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0000    //TX_FFP_RESRV_2
-849    0x0000    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x0E80    //TX_TDDRC_THRD_2
-857    0x3800    //TX_TDDRC_THRD_3
-858    0x2A00    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x0000    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0000    //TX_TDDRC_SMT_W
-866    0x0100    //TX_TDDRC_DRC_GAIN
-867    0x0000    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x1EB8    //TX_TFMASKLTH
-870    0x170A    //TX_TFMASKLTHL
-871    0x4000    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x4000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x0000    //TX_FASTNS_OUTIN_TH
-884    0x0000    //TX_FASTNS_TFMASK_TH
-885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xD99A    //TX_FASTNS_MASK5_TH
-890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x0000    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7652    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0000    //RX_PITCH_BFR_LEN
-17    0x0000    //RX_SBD_PITCH_DET
-18    0x0000    //RX_PP_RESRV_0
-19    0x0000    //RX_PP_RESRV_1
-20    0xF800    //RX_N_SN_EST
-21    0x0000    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-30    0x0000    //RX_EXTRA_NS_L
-31    0x0000    //RX_EXTRA_NS_A
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x0000    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0010    //RX_MAXLEVEL_CNG
-132    0x0000    //RX_BWE_UV_TH
-133    0x0000    //RX_BWE_UV_TH2
-134    0x0000    //RX_BWE_UV_TH3
-135    0x0000    //RX_BWE_V_TH
-136    0x0000    //RX_BWE_GAIN1_V_TH1
-137    0x0000    //RX_BWE_GAIN1_V_TH2
-138    0x0000    //RX_BWE_UV_EQ
-139    0x0000    //RX_BWE_V_EQ
-140    0x0000    //RX_BWE_TONE_TH
-141    0x0000    //RX_BWE_UV_HOLD_T
-142    0x0000    //RX_BWE_GAIN2_ALPHA
-143    0x0000    //RX_BWE_GAIN3_ALPHA
-144    0x0000    //RX_BWE_CUTOFF
-145    0x0000    //RX_BWE_GAINFILL
-146    0x0000    //RX_BWE_MAXTH_TONE
-147    0x0000    //RX_BWE_EQ_0
-148    0x0000    //RX_BWE_EQ_1
-149    0x0000    //RX_BWE_EQ_2
-150    0x0000    //RX_BWE_EQ_3
-151    0x0000    //RX_BWE_EQ_4
-152    0x0000    //RX_BWE_EQ_5
-153    0x0000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x0000    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7652    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0000    //RX_PITCH_BFR_LEN
-174    0x0000    //RX_SBD_PITCH_DET
-175    0x0000    //RX_PP_RESRV_0
-176    0x0000    //RX_PP_RESRV_1
-177    0xF800    //RX_N_SN_EST
-178    0x0000    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-187    0x0000    //RX_EXTRA_NS_L
-188    0x0000    //RX_EXTRA_NS_A
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x0000    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0010    //RX_MAXLEVEL_CNG
-289    0x0000    //RX_BWE_UV_TH
-290    0x0000    //RX_BWE_UV_TH2
-291    0x0000    //RX_BWE_UV_TH3
-292    0x0000    //RX_BWE_V_TH
-293    0x0000    //RX_BWE_GAIN1_V_TH1
-294    0x0000    //RX_BWE_GAIN1_V_TH2
-295    0x0000    //RX_BWE_UV_EQ
-296    0x0000    //RX_BWE_V_EQ
-297    0x0000    //RX_BWE_TONE_TH
-298    0x0000    //RX_BWE_UV_HOLD_T
-299    0x0000    //RX_BWE_GAIN2_ALPHA
-300    0x0000    //RX_BWE_GAIN3_ALPHA
-301    0x0000    //RX_BWE_CUTOFF
-302    0x0000    //RX_BWE_GAINFILL
-303    0x0000    //RX_BWE_MAXTH_TONE
-304    0x0000    //RX_BWE_EQ_0
-305    0x0000    //RX_BWE_EQ_1
-306    0x0000    //RX_BWE_EQ_2
-307    0x0000    //RX_BWE_EQ_3
-308    0x0000    //RX_BWE_EQ_4
-309    0x0000    //RX_BWE_EQ_5
-310    0x0000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0021    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0037    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
+#SAVE_TIME  2022-12-28 18:52:16
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -2828,7 +158,7 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
+150    0x7000    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
 152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0200    //TX_MIN_EQ_RE_EST_1
@@ -2849,7 +179,7 @@
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0200    //TX_DT2_HOLD_N
+171    0x0050    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -2875,10 +205,10 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7700    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x7148    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
@@ -2903,16 +233,16 @@
 222    0x1000    //TX_ADPT_STRICT_H
 223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+225    0x1B58    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FF0    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x09C4    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -2922,8 +252,8 @@
 241    0x0000    //TX_DT_RESRV_9
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -2931,7 +261,7 @@
 250    0x0050    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0080    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x01A0    //TX_DELTA_THR_SN_EST_6
@@ -2945,12 +275,12 @@
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
+267    0x0018    //TX_INBEAM_T
 268    0x0041    //TX_INBEAMHOLDT
 269    0x2000    //TX_G_STRICT
 270    0x2000    //TX_EQ_THR_BF
 271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
+272    0x0800    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
 274    0x0800    //TX_MAINREFRTOH_TH_H
 275    0x0800    //TX_MAINREFRTOH_TH_L
@@ -2960,7 +290,7 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0017    //TX_NS_LVL_CTRL_1
+282    0x0015    //TX_NS_LVL_CTRL_1
 283    0x0015    //TX_NS_LVL_CTRL_2
 284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
@@ -2975,13 +305,13 @@
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
+297    0x2000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1000    //TX_SNRI_SUP_1
+301    0x2400    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -2993,8 +323,8 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
 317    0x1000    //TX_A_POST_FILT_S_3
 318    0x3000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
@@ -3003,7 +333,7 @@
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
 324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
+325    0x1400    //TX_B_POST_FILT_3
 326    0x3000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -3025,7 +355,7 @@
 344    0x7D00    //TX_LAMBDA_PFILT_S_5
 345    0x7900    //TX_LAMBDA_PFILT_S_6
 346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+347    0x0400    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -3036,7 +366,7 @@
 355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+358    0x0080    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -3045,13 +375,13 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0023    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
@@ -3494,8 +824,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -3554,7 +884,7 @@
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
 875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
@@ -3569,7 +899,7 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -3578,19 +908,19 @@
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0050    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x021C    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000C    //TX_MICMUTE_CVG_TIME
+903    0x0006    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7E90    //TX_DTD_THR1_MICMUTE_0
-912    0x7918    //TX_DTD_THR1_MICMUTE_1
+908    0x7B70    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x4000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7EF4    //TX_DTD_THR1_MICMUTE_0
+912    0x7D00    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
@@ -3622,8 +952,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE0C0    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3BF6    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -5345,8 +2675,8 @@
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -5500,9 +2830,9 @@
 149    0x0800    //TX_AEC_REF_GAIN_2
 150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
 156    0x0200    //TX_MIN_EQ_RE_EST_4
 157    0x0200    //TX_MIN_EQ_RE_EST_5
@@ -5512,14 +2842,14 @@
 161    0x1000    //TX_MIN_EQ_RE_EST_9
 162    0x1000    //TX_MIN_EQ_RE_EST_10
 163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
+164    0x6000    //TX_MIN_EQ_RE_EST_12
 165    0x4000    //TX_LAMBDA_RE_EST
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
 169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x01B0    //TX_DT2_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -5545,10 +2875,10 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x6D60    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
@@ -5561,7 +2891,7 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x07D0    //TX_DT_CUT_K
+213    0x05DC    //TX_DT_CUT_K
 214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -5573,7 +2903,7 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
 226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
@@ -5582,7 +2912,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -5593,7 +2923,7 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -5649,12 +2979,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -5665,7 +2995,7 @@
 314    0x5000    //TX_A_POST_FILT_S_0
 315    0x4C00    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x6000    //TX_A_POST_FILT_S_6
@@ -5673,7 +3003,7 @@
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+325    0x2000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -5690,7 +3020,7 @@
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
 341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
+342    0x7800    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -5705,7 +3035,7 @@
 354    0x0200    //TX_DT_BINVAD_TH_1
 355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1388    //TX_DT_BINVAD_ENDF
+357    0x05DC    //TX_DT_BINVAD_ENDF
 358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
@@ -5718,12 +3048,12 @@
 367    0x0032    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
+370    0x0320    //TX_NOISE_TH_1
 371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
@@ -6164,8 +3494,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -6247,19 +3577,19 @@
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03C0    //TX_MICMUTE_RATIO_THR
-900    0x0122    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0276    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x6590    //TX_DTD_THR1_MICMUTE_0
+911    0x7DC8    //TX_DTD_THR1_MICMUTE_0
 912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
@@ -6274,7 +3604,7 @@
 923    0x0001    //TX_MICMUTE_DT_CUT_THR
 924    0x03E8    //TX_MICMUTE_DT_CUT_K2
 925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -6293,7 +3623,7 @@
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
 944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+945    0x7EF4    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -8015,8 +5345,8 @@
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -8168,9 +5498,9 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
+152    0x0600    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
 154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x3000    //TX_MIN_EQ_RE_EST_3
@@ -8184,12 +5514,12 @@
 163    0x7800    //TX_MIN_EQ_RE_EST_11
 164    0x7800    //TX_MIN_EQ_RE_EST_12
 165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
 169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -8215,8 +5545,8 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -8231,8 +5561,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -8243,8 +5573,8 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
@@ -8252,7 +5582,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -8263,15 +5593,15 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+245    0xF600    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0100    //TX_DELTA_THR_SN_EST_6
@@ -8307,10 +5637,10 @@
 286    0x0011    //TX_NS_LVL_CTRL_5
 287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
 291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
+292    0x0018    //TX_MIN_GAIN_S_3
 293    0x0020    //TX_MIN_GAIN_S_4
 294    0x0020    //TX_MIN_GAIN_S_5
 295    0x0020    //TX_MIN_GAIN_S_6
@@ -8319,12 +5649,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -8333,17 +5663,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x7FFF    //TX_A_POST_FILT_S_4
 319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
 324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
+325    0x1000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -8365,7 +5695,7 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -8375,8 +5705,8 @@
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
 356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -8390,9 +5720,9 @@
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
+372    0x300C    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
@@ -8597,10 +5927,10 @@
 576    0x4E45    //TX_FDEQ_GAIN_9
 577    0x494A    //TX_FDEQ_GAIN_10
 578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5C6E    //TX_FDEQ_GAIN_13
-581    0x687E    //TX_FDEQ_GAIN_14
-582    0x8890    //TX_FDEQ_GAIN_15
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -8834,8 +6164,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -8918,21 +6248,21 @@
 897    0x2379    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x01C2    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
 911    0x7918    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x3A98    //TX_DTD_THR1_MICMUTE_2
-914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
 916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
 917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
@@ -8962,8 +6292,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -9832,7 +7162,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
+157    0x8064    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -10685,8 +8015,8 @@
 
 #CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -13353,10 +10683,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  BLUETOOTH-BT_HAC-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0600    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0018    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E60    //TX_FDEQ_GAIN_6
+574    0x5C52    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -14343,7 +14343,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -14489,8 +14489,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -14588,8 +14588,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -14687,8 +14687,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -14786,8 +14786,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -14885,8 +14885,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -14984,8 +14984,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15083,8 +15083,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15194,7 +15194,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -15340,8 +15340,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15439,8 +15439,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15538,8 +15538,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15637,8 +15637,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15736,8 +15736,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15835,8 +15835,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -15934,8 +15934,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -16025,8 +16025,8 @@
 
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -17013,7 +17013,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -17159,8 +17159,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -17258,8 +17258,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -17357,8 +17357,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -17456,8 +17456,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -17555,8 +17555,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -17654,8 +17654,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -17753,8 +17753,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -17864,7 +17864,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -18010,8 +18010,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -18109,8 +18109,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -18208,8 +18208,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -18307,8 +18307,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -18406,8 +18406,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -18505,8 +18505,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -18604,8 +18604,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -18695,8 +18695,8 @@
 
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -20512,7 +20512,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
+157    0x8064    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -21365,8 +21365,8 @@
 
 #CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -24033,10 +24033,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  BLUETOOTH-BTNB-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -25023,7 +27693,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -25169,8 +27839,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -25268,8 +27938,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -25367,8 +28037,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -25466,8 +28136,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -25565,8 +28235,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -25664,8 +28334,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -25763,8 +28433,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -25874,7 +28544,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -26020,8 +28690,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -26119,8 +28789,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -26218,8 +28888,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -26317,8 +28987,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -26416,8 +29086,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -26515,8 +29185,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -26614,8 +29284,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -26705,8 +29375,8 @@
 
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -27693,7 +30363,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -27839,8 +30509,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -27938,8 +30608,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -28037,8 +30707,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -28136,8 +30806,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -28235,8 +30905,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -28334,8 +31004,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -28433,8 +31103,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -28544,7 +31214,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -28690,8 +31360,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -28789,8 +31459,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -28888,8 +31558,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -28987,8 +31657,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -29086,8 +31756,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -29185,8 +31855,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -29284,8 +31954,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -29375,8 +32045,8 @@
 
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -31192,7 +33862,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
+157    0x8064    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -32045,8 +34715,8 @@
 
 #CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -34713,10 +37383,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  BLUETOOTH-BTNB_NREC-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -35703,7 +41043,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -35849,8 +41189,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -35948,8 +41288,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36047,8 +41387,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36146,8 +41486,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36245,8 +41585,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36344,8 +41684,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36443,8 +41783,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36554,7 +41894,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -36700,8 +42040,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36799,8 +42139,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36898,8 +42238,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -36997,8 +42337,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -37096,8 +42436,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -37195,8 +42535,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -37294,8 +42634,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -37385,8 +42725,8 @@
 
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -38373,7 +43713,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -38519,8 +43859,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -38618,8 +43958,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -38717,8 +44057,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -38816,8 +44156,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -38915,8 +44255,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -39014,8 +44354,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -39113,8 +44453,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -39224,7 +44564,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -39370,8 +44710,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -39469,8 +44809,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -39568,8 +44908,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -39667,8 +45007,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -39766,8 +45106,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -39865,8 +45205,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -39964,8 +45304,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -40054,9 +45394,9 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -41872,7 +47212,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
+157    0x8064    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -42724,9 +48064,9 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -45393,10 +50733,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  BLUETOOTH-BTWB-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -46383,7 +54393,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -46529,8 +54539,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -46628,8 +54638,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -46727,8 +54737,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -46826,8 +54836,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -46925,8 +54935,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47024,8 +55034,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47123,8 +55133,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47234,7 +55244,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -47380,8 +55390,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47479,8 +55489,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47578,8 +55588,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47677,8 +55687,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47776,8 +55786,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47875,8 +55885,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -47974,8 +55984,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
@@ -48064,9 +56074,9 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0008    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -49053,7 +57063,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -49199,8 +57209,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -49298,8 +57308,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -49397,8 +57407,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -49496,8 +57506,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -49595,8 +57605,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -49694,8 +57704,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -49793,8 +57803,8 @@
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
 114    0x7FFF    //RX_TDDRC_THRD_2
 115    0x7FFF    //RX_TDDRC_THRD_3
 116    0x7E70    //RX_TDDRC_SLANT_0
@@ -49904,7 +57914,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -50050,8 +58060,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -50149,8 +58159,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -50248,8 +58258,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -50347,8 +58357,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -50446,8 +58456,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -50545,8 +58555,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -50644,8 +58654,8 @@
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
 271    0x7FFF    //RX_TDDRC_THRD_2
 272    0x7FFF    //RX_TDDRC_THRD_3
 273    0x7E70    //RX_TDDRC_SLANT_0
@@ -50734,9 +58744,9 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -52552,7 +60562,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
+157    0x8064    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -53404,9 +61414,9 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -56073,17 +64083,17 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  BLUETOOTH-BT_HAC-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#CASE_NAME  BLUETOOTH-BTWB_NREC-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x00F3    //TX_PATCH_REG
-3    0x6F7D    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
@@ -56099,19 +64109,19 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0019    //TX_DIST2REF_02
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
 30    0x0000    //TX_PGA_3
 31    0x0000    //TX_PGA_4
 32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
+33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
 36    0x0000    //TX_MIC_PAIRS_FORL1
@@ -56120,8 +64130,8 @@
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
 41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
 46    0x0000    //TX_MIC_PAIR_CH_05
@@ -56150,8 +64160,2678 @@
 69    0x0001    //TX_MICFORBFMARK_4
 70    0x0001    //TX_MICFORBFMARK_5
 71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_N2_SN_EST
+934    0x0000    //TX_MICMUTE_THR_SN_EST_0
+935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0000    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
 74    0x0000    //TX_DIST2REF_13
 75    0x0000    //TX_DIST2REF_14
 76    0x0000    //TX_DIST2REF_15
@@ -56186,36 +66866,36 @@
 105    0x0000    //TX_MIC_LOC_24
 106    0x0000    //TX_MIC_LOC_25
 107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
 109    0x0000    //TX_INVERSE_MASK
 110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
 113    0x0000    //TX_MAINMIC_BLKFACTOR
 114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
 122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
 129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
 138    0x0000    //TX_PP_RESRV_0
 139    0x2A94    //TX_PP_RESRV_1
 140    0x55F0    //TX_PP_RESRV_2
@@ -56225,32 +66905,32 @@
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
 146    0x0028    //TX_TAIL_LENGTH
-147    0x0400    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0260    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x728A    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
 175    0x0000    //TX_MIC_DELAY_LENGTH
@@ -56259,82 +66939,82 @@
 178    0x0000    //TX_ADD_LINEIN_GAINH
 179    0x0000    //TX_MIN_EQ_RE_EST_14
 180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
+181    0x0000    //TX_DTD_THR2_8
 182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
+191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
 193    0x0000    //TX_BLKENERHIGHTH
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
 218    0x0000    //TX_DTD_HD_THR
 219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0001    //TX_RATIO_DT_L_TH_LOW
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
-227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
 238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
+247    0xF800    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -56344,200 +67024,200 @@
 263    0x4000    //TX_LAMBDA_NN_EST_5
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
 270    0x2000    //TX_EQ_THR_BF
 271    0x799A    //TX_LAMBDA_EQ_BF
 272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
 278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x001A    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
 287    0x001A    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
-291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
-293    0x0020    //TX_MIN_GAIN_S_4
-294    0x0020    //TX_MIN_GAIN_S_5
-295    0x0020    //TX_MIN_GAIN_S_6
-296    0x0020    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
+308    0x1200    //TX_THR_LFNS
+309    0x0028    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
+311    0x7FFF    //TX_MUSIC_MORENS
 312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
-318    0x7FFF    //TX_A_POST_FILT_S_4
-319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
-321    0x7FFF    //TX_A_POST_FILT_S_7
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
 333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
 334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
 336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7F00    //TX_LAMBDA_PFILT
-339    0x7F00    //TX_LAMBDA_PFILT_S_0
-340    0x7F00    //TX_LAMBDA_PFILT_S_1
-341    0x7F00    //TX_LAMBDA_PFILT_S_2
-342    0x7F00    //TX_LAMBDA_PFILT_S_3
-343    0x7F00    //TX_LAMBDA_PFILT_S_4
-344    0x7F00    //TX_LAMBDA_PFILT_S_5
-345    0x7F00    //TX_LAMBDA_PFILT_S_6
-346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0040    //TX_DT_BINVAD_TH_0
-354    0x0040    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
-373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0DAC    //TX_NOISE_TH_6
-379    0x0050    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x07D0    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MORENS_TFMASK_TH
+381    0x0000    //TX_DRC_QUIET_FLOOR
+382    0x0000    //TX_RATIODTL_CUT_TH
+383    0x0000    //TX_DT_CUT_K1
+384    0x0640    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0640    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0640    //TX_OUT_ENER_S_TH_NOISY
+387    0x0190    //TX_OUT_ENER_TH_NOISE
+388    0x07D0    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
+395    0x0000    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0005    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0050    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_C_POST_FLT_MASK
+399    0x0000    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
+414    0x0800    //TX_RHO_UPB
+415    0x0B40    //TX_N_HOLD_HS
+416    0x005A    //TX_N_RHO_BFR0
 417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
 423    0x2000    //TX_BF_RESET_THR_HS
 424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
 432    0x0000    //TX_NSEST_BFRLRNRDC
 433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
 441    0x0190    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
 446    0x0028    //TX_DOA_VAD_THR1_0
 447    0x0028    //TX_DOA_VAD_THR1_1
 448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
 449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
 450    0x005A    //TX_DFLT_SRC_DOA_0A
 451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
 454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
 457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
 460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
 461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
 462    0x005A    //TX_DFLT_SRC_DOA_1A
@@ -56550,95 +67230,95 @@
 469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
 470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
 471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
+472    0x0172    //TX_BF_HOLDOFF_T
 473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
+474    0x0D9A    //TX_MAINTOREFR_TH0
 475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
 485    0x0000    //TX_HF_RESRV_25
 486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
 489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
+490    0x0000    //TX_DLT_SRC_DOA_RNG
 491    0x0200    //TX_BF_MU_LF
 492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
+493    0x0000    //TX_DFLT_SRC_LOC_1
 494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
+495    0x0000    //TX_DOA_TRACK_VADTH
 496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
+497    0x0168    //TX_NOR_OFF_THR
 498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
 504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
+505    0x6000    //TX_C_POST_FLT_CUT
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
 509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
 524    0x0000    //TX_DR_RESRV_5
 525    0x0000    //TX_DR_RESRV_6
 526    0x0000    //TX_DR_RESRV_7
 527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
+528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
 541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
 547    0x0000    //TX_WNS_RESRV_2
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
 552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
 561    0x0000    //TX_BVE_NOISE_FLOOR_9
 562    0x0000    //TX_BVE_IN_N
 563    0x0000    //TX_BVE_OUT_N
@@ -56647,20 +67327,20 @@
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4850    //TX_FDEQ_GAIN_2
-570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4B48    //TX_FDEQ_GAIN_4
-572    0x484E    //TX_FDEQ_GAIN_5
-573    0x4E60    //TX_FDEQ_GAIN_6
-574    0x5C52    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x4E45    //TX_FDEQ_GAIN_9
-577    0x494A    //TX_FDEQ_GAIN_10
-578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5C6E    //TX_FDEQ_GAIN_13
-581    0x687E    //TX_FDEQ_GAIN_14
-582    0x8890    //TX_FDEQ_GAIN_15
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -56669,22 +67349,22 @@
 588    0x4848    //TX_FDEQ_GAIN_21
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
 608    0x0000    //TX_FDEQ_BIN_17
 609    0x0000    //TX_FDEQ_BIN_18
@@ -56694,7 +67374,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -56719,23 +67399,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x401E    //TX_PREEQ_BIN_MIC0_16
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -56743,7 +67423,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -56751,16 +67431,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4849    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
-675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5354    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x5653    //TX_PREEQ_GAIN_MIC1_14
-681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
-682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -56768,23 +67448,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -56799,16 +67479,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x494B    //TX_PREEQ_GAIN_MIC2_6
-722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
-723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
-724    0x5051    //TX_PREEQ_GAIN_MIC2_9
-725    0x5255    //TX_PREEQ_GAIN_MIC2_10
-726    0x5754    //TX_PREEQ_GAIN_MIC2_11
-727    0x5454    //TX_PREEQ_GAIN_MIC2_12
-728    0x544F    //TX_PREEQ_GAIN_MIC2_13
-729    0x463D    //TX_PREEQ_GAIN_MIC2_14
-730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -56817,22 +67497,22 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0203    //TX_PREEQ_BIN_MIC2_0
-740    0x0303    //TX_PREEQ_BIN_MIC2_1
-741    0x0304    //TX_PREEQ_BIN_MIC2_2
-742    0x0405    //TX_PREEQ_BIN_MIC2_3
-743    0x0506    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0809    //TX_PREEQ_BIN_MIC2_6
-746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
-747    0x0C10    //TX_PREEQ_BIN_MIC2_8
-748    0x1013    //TX_PREEQ_BIN_MIC2_9
-749    0x1414    //TX_PREEQ_BIN_MIC2_10
-750    0x261E    //TX_PREEQ_BIN_MIC2_11
-751    0x1E14    //TX_PREEQ_BIN_MIC2_12
-752    0x1414    //TX_PREEQ_BIN_MIC2_13
-753    0x2814    //TX_PREEQ_BIN_MIC2_14
-754    0x4022    //TX_PREEQ_BIN_MIC2_15
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -56842,34 +67522,34 @@
 761    0x0000    //TX_PREEQ_BIN_MIC2_22
 762    0x0000    //TX_PREEQ_BIN_MIC2_23
 763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
 780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
 781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -56894,16 +67574,16 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
 826    0x0000    //TX_KS_RESRV_0
 827    0x0000    //TX_KS_RESRV_1
 828    0x0000    //TX_KS_RESRV_2
@@ -56911,10 +67591,10 @@
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
 832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
 837    0x0000    //TX_MAX_G_FP_BLK
 838    0x0000    //TX_FFP_FADEIN
 839    0x0000    //TX_FFP_FADEOUT
@@ -56924,2722 +67604,52 @@
 843    0x0000    //TX_WHISP_ENTHL
 844    0x0000    //TX_WHISP_RTOTH
 845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
+846    0x0000    //TX_MUTE_PERIOD
 847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
+863    0x0000    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x13F4    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x4000    //TX_TFMASKHTH
 872    0x0CCD    //TX_TFMASKLTH_BINVAD
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
 880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
 882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2379    //TX_SENDFUNC_REG_MICMUTE
-898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x01C2    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7918    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x3A98    //TX_DTD_THR1_MICMUTE_2
-914    0x32C8    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0xA064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -59711,10 +67721,10 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0xA064    //RX_RECVFUNC_MODE_0
+0    0x0000    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -59722,31 +67732,31 @@
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
 10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
+35    0x0000    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
@@ -59774,22 +67784,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -59798,13 +67808,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -59817,54 +67827,54 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0000    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
 154    0x0000    //RX_BWE_RESRV_0
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
@@ -59873,25 +67883,25 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -59917,22 +67927,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -59941,13 +67951,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -59960,37 +67970,37 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x000C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -60016,22 +68026,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60040,13 +68050,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -60059,37 +68069,37 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0014    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -60115,22 +68125,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60139,13 +68149,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -60158,37 +68168,37 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0021    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -60214,22 +68224,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60238,13 +68248,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -60257,37 +68267,37 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0037    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -60313,22 +68323,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60337,13 +68347,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -60356,37 +68366,37 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x005B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -60412,22 +68422,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60436,13 +68446,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -60455,37 +68465,37 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0099    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
@@ -60511,22 +68521,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60535,13 +68545,13 @@
 84    0x0000    //RX_FDEQ_BIN_21
 85    0x0000    //RX_FDEQ_BIN_22
 86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
 90    0x0030    //RX_FDDRC_BAND_MARGIN_1
 91    0x0050    //RX_FDDRC_BAND_MARGIN_2
 92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
+93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
 96    0x5000    //RX_FDDRC_THRD_2_2
@@ -60554,18 +68564,18 @@
 103    0x2000    //RX_FDDRC_SLANT_0_1
 104    0x2000    //RX_FDDRC_SLANT_0_2
 105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
+157    0x0000    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -60573,31 +68583,31 @@
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
 167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
+192    0x0000    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
@@ -60625,22 +68635,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -60649,13 +68659,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -60668,54 +68678,54 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0000    //RX_FILTINDX
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000C    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
 311    0x0000    //RX_BWE_RESRV_0
 312    0x0000    //RX_BWE_RESRV_1
 313    0x0000    //RX_BWE_RESRV_2
@@ -60724,25 +68734,25 @@
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
@@ -60768,22 +68778,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -60792,13 +68802,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -60811,37 +68821,37 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
+286    0x000C    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
@@ -60867,22 +68877,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -60891,13 +68901,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -60910,37 +68920,37 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
+286    0x0014    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
@@ -60966,22 +68976,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -60990,13 +69000,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -61009,37 +69019,37 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
+286    0x0021    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
@@ -61065,22 +69075,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61089,13 +69099,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -61108,37 +69118,37 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
+286    0x0037    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
@@ -61164,22 +69174,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61188,13 +69198,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -61207,37 +69217,37 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
+286    0x005B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
@@ -61263,22 +69273,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61287,13 +69297,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -61306,37 +69316,37 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
+286    0x0099    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
@@ -61362,22 +69372,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61386,13 +69396,13 @@
 241    0x0000    //RX_FDEQ_BIN_21
 242    0x0000    //RX_FDEQ_BIN_22
 243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
 247    0x0030    //RX_FDDRC_BAND_MARGIN_1
 248    0x0050    //RX_FDDRC_BAND_MARGIN_2
 249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
+250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
 253    0x5000    //RX_FDDRC_THRD_2_2
@@ -61405,8020 +69415,10 @@
 260    0x2000    //RX_FDDRC_SLANT_0_1
 261    0x2000    //RX_FDDRC_SLANT_0_2
 262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB_NREC-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0xA064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0xA064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB_NREC-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0xA064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0xA064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
diff --git a/audio/lynx/tuning/fortemedia/HANDSET.dat b/audio/lynx/tuning/fortemedia/HANDSET.dat
index 83ad5a0..7b54182 100644
Binary files a/audio/lynx/tuning/fortemedia/HANDSET.dat and b/audio/lynx/tuning/fortemedia/HANDSET.dat differ
diff --git a/audio/lynx/tuning/fortemedia/HANDSET.mods b/audio/lynx/tuning/fortemedia/HANDSET.mods
index 7e30b75..68548d3 100644
--- a/audio/lynx/tuning/fortemedia/HANDSET.mods
+++ b/audio/lynx/tuning/fortemedia/HANDSET.mods
@@ -1,17 +1,8027 @@
 #PLATFORM_NAME  gChip
 #EXPORT_FLAG  HANDSET
 #SINGLE_API_VER  1.2.1
-#SAVE_TIME  2022-07-29 16:03:22
+#SAVE_TIME  2022-12-28 19:01:46
 
-#CASE_NAME  HANDSET-HANDSET-RESERVE1-FB
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x0200    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0280    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6D60    //TX_DTD_THR1_0
+198    0x7B00    //TX_DTD_THR1_1
+199    0x7B00    //TX_DTD_THR1_2
+200    0x7B00    //TX_DTD_THR1_3
+201    0x7B00    //TX_DTD_THR1_4
+202    0x7B00    //TX_DTD_THR1_5
+203    0x7B00    //TX_DTD_THR1_6
+204    0x1000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xF800    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xF900    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x01A0    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x3000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x3000    //TX_LAMBDA_NN_EST_3
+262    0x3000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x3000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x3000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x3000    //TX_MAINREFRTO_TH_H
+277    0x1000    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x4000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x001B    //TX_NS_LVL_CTRL_2
+284    0x0017    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x001B    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x0010    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x4000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x3000    //TX_SNRI_SUP_7
+308    0x3000    //TX_THR_LFNS
+309    0x001A    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x2000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x4000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7200    //TX_LAMBDA_PFILT_S_1
+341    0x7800    //TX_LAMBDA_PFILT_S_2
+342    0x7400    //TX_LAMBDA_PFILT_S_3
+343    0x7200    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0C80    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0004    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x022C    //TX_NOISE_TH_2
+372    0x2260    //TX_NOISE_TH_3
+373    0x6B6C    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x07D0    //TX_NOISE_TH_6
+379    0x0004    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x000A    //TX_NS_ENOISE_MIC0_TH
+406    0x0004    //TX_MINENOISE_MIC0_TH
+407    0x0014    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x4000    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0100    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x6000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x001A    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0080    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0018    //TX_FDEQ_SUBNUM
+567    0x6D61    //TX_FDEQ_GAIN_0
+568    0x5951    //TX_FDEQ_GAIN_1
+569    0x5151    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4642    //TX_FDEQ_GAIN_4
+572    0x4040    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x3835    //TX_FDEQ_GAIN_7
+575    0x2A25    //TX_FDEQ_GAIN_8
+576    0x373C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0505    //TX_FDEQ_BIN_4
+596    0x040A    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x060D    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F09    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0004    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0212    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7B0C    //TX_DTD_THR1_MICMUTE_0
+912    0x7EB8    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x36B0    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x050E    //RX_PGA
+11    0x7646    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x5464    //RX_FDEQ_GAIN_2
+42    0x7086    //RX_FDEQ_GAIN_3
+43    0x9AA4    //RX_FDEQ_GAIN_4
+44    0x928E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8686    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x989C    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x055F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x505C    //RX_FDEQ_GAIN_2
+42    0x687E    //RX_FDEQ_GAIN_3
+43    0x929C    //RX_FDEQ_GAIN_4
+44    0x928A    //RX_FDEQ_GAIN_5
+45    0x7880    //RX_FDEQ_GAIN_6
+46    0x7E82    //RX_FDEQ_GAIN_7
+47    0x8888    //RX_FDEQ_GAIN_8
+48    0x9498    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x505C    //RX_FDEQ_GAIN_2
+42    0x687E    //RX_FDEQ_GAIN_3
+43    0x929C    //RX_FDEQ_GAIN_4
+44    0x928A    //RX_FDEQ_GAIN_5
+45    0x7880    //RX_FDEQ_GAIN_6
+46    0x7E82    //RX_FDEQ_GAIN_7
+47    0x8888    //RX_FDEQ_GAIN_8
+48    0x9498    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0015    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x505C    //RX_FDEQ_GAIN_2
+42    0x687E    //RX_FDEQ_GAIN_3
+43    0x929C    //RX_FDEQ_GAIN_4
+44    0x928A    //RX_FDEQ_GAIN_5
+45    0x7880    //RX_FDEQ_GAIN_6
+46    0x7E82    //RX_FDEQ_GAIN_7
+47    0x8888    //RX_FDEQ_GAIN_8
+48    0x9498    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0023    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x505C    //RX_FDEQ_GAIN_2
+42    0x687E    //RX_FDEQ_GAIN_3
+43    0x929C    //RX_FDEQ_GAIN_4
+44    0x928A    //RX_FDEQ_GAIN_5
+45    0x7880    //RX_FDEQ_GAIN_6
+46    0x7E82    //RX_FDEQ_GAIN_7
+47    0x8888    //RX_FDEQ_GAIN_8
+48    0x9498    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x505C    //RX_FDEQ_GAIN_2
+42    0x687E    //RX_FDEQ_GAIN_3
+43    0x929C    //RX_FDEQ_GAIN_4
+44    0x928A    //RX_FDEQ_GAIN_5
+45    0x7880    //RX_FDEQ_GAIN_6
+46    0x7E82    //RX_FDEQ_GAIN_7
+47    0x8888    //RX_FDEQ_GAIN_8
+48    0x9498    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x505C    //RX_FDEQ_GAIN_2
+42    0x687E    //RX_FDEQ_GAIN_3
+43    0x929C    //RX_FDEQ_GAIN_4
+44    0x928A    //RX_FDEQ_GAIN_5
+45    0x7880    //RX_FDEQ_GAIN_6
+46    0x7E82    //RX_FDEQ_GAIN_7
+47    0x8888    //RX_FDEQ_GAIN_8
+48    0x9498    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x505C    //RX_FDEQ_GAIN_2
+42    0x687E    //RX_FDEQ_GAIN_3
+43    0x929C    //RX_FDEQ_GAIN_4
+44    0x928A    //RX_FDEQ_GAIN_5
+45    0x7880    //RX_FDEQ_GAIN_6
+46    0x7E82    //RX_FDEQ_GAIN_7
+47    0x8888    //RX_FDEQ_GAIN_8
+48    0x9498    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0045    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-WB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x2F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x0200    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6978    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x5000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x2000    //TX_MAINREFRTOH_TH_H
+275    0x1400    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0018    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x001A    //TX_NS_LVL_CTRL_4
+286    0x001E    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
+288    0x001C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0018    //TX_MIN_GAIN_S_4
+294    0x0018    //TX_MIN_GAIN_S_5
+295    0x0018    //TX_MIN_GAIN_S_6
+296    0x0018    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x5000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x4000    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7000    //TX_A_POST_FILT_S_0
+315    0x3000    //TX_A_POST_FILT_S_1
+316    0x3000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7000    //TX_A_POST_FILT_S_4
+319    0x7000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x5000    //TX_B_POST_FILT_6
+329    0x4000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C29    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0600    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0139    //TX_NOISE_TH_1
+371    0x0479    //TX_NOISE_TH_2
+372    0x2328    //TX_NOISE_TH_3
+373    0x4422    //TX_NOISE_TH_4
+374    0x5586    //TX_NOISE_TH_5
+375    0x4425    //TX_NOISE_TH_5_2
+376    0x0032    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x21E8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0500    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x1000    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x05A8    //TX_SB_RHO_MEAN2_TH
+441    0x0384    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0280    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0200    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x474A    //TX_FDEQ_GAIN_3
+571    0x473F    //TX_FDEQ_GAIN_4
+572    0x4245    //TX_FDEQ_GAIN_5
+573    0x4B53    //TX_FDEQ_GAIN_6
+574    0x564A    //TX_FDEQ_GAIN_7
+575    0x3D3A    //TX_FDEQ_GAIN_8
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3836    //TX_FDEQ_GAIN_10
+578    0x3633    //TX_FDEQ_GAIN_11
+579    0x3838    //TX_FDEQ_GAIN_12
+580    0x4048    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0F0F    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x0611    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0005    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x199A    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x2000    //TX_B_LESSCUT_RTO_MASK
+877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0280    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0100    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0xFFFF    //TX_AMS_RESRV_02
+945    0x7530    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0480    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x1000    //RX_LMT_THRD
+37    0x7FDF    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4840    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4659    //RX_FDEQ_GAIN_2
+42    0x6474    //RX_FDEQ_GAIN_3
+43    0x7A82    //RX_FDEQ_GAIN_4
+44    0x8180    //RX_FDEQ_GAIN_5
+45    0x8084    //RX_FDEQ_GAIN_6
+46    0x8A88    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x8A95    //RX_FDEQ_GAIN_9
+49    0x978E    //RX_FDEQ_GAIN_10
+50    0x8C8C    //RX_FDEQ_GAIN_11
+51    0x7068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04E6    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x485A    //RX_FDEQ_GAIN_2
+42    0x6C82    //RX_FDEQ_GAIN_3
+43    0x949E    //RX_FDEQ_GAIN_4
+44    0x9C96    //RX_FDEQ_GAIN_5
+45    0x908E    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0xA4B0    //RX_FDEQ_GAIN_9
+49    0xA898    //RX_FDEQ_GAIN_10
+50    0x7272    //RX_FDEQ_GAIN_11
+51    0x8068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x485A    //RX_FDEQ_GAIN_2
+42    0x6C82    //RX_FDEQ_GAIN_3
+43    0x949E    //RX_FDEQ_GAIN_4
+44    0x9C96    //RX_FDEQ_GAIN_5
+45    0x908E    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0xA4B0    //RX_FDEQ_GAIN_9
+49    0xA898    //RX_FDEQ_GAIN_10
+50    0x7272    //RX_FDEQ_GAIN_11
+51    0x8068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x485A    //RX_FDEQ_GAIN_2
+42    0x6C82    //RX_FDEQ_GAIN_3
+43    0x949E    //RX_FDEQ_GAIN_4
+44    0x9C96    //RX_FDEQ_GAIN_5
+45    0x908E    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0xA4B0    //RX_FDEQ_GAIN_9
+49    0xA898    //RX_FDEQ_GAIN_10
+50    0x7272    //RX_FDEQ_GAIN_11
+51    0x8068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0026    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x485A    //RX_FDEQ_GAIN_2
+42    0x6C82    //RX_FDEQ_GAIN_3
+43    0x949E    //RX_FDEQ_GAIN_4
+44    0x9C96    //RX_FDEQ_GAIN_5
+45    0x908E    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0xA4B0    //RX_FDEQ_GAIN_9
+49    0xA898    //RX_FDEQ_GAIN_10
+50    0x7272    //RX_FDEQ_GAIN_11
+51    0x8068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0040    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x485A    //RX_FDEQ_GAIN_2
+42    0x6C82    //RX_FDEQ_GAIN_3
+43    0x949E    //RX_FDEQ_GAIN_4
+44    0x9C96    //RX_FDEQ_GAIN_5
+45    0x908E    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0xA4B0    //RX_FDEQ_GAIN_9
+49    0xA898    //RX_FDEQ_GAIN_10
+50    0x7272    //RX_FDEQ_GAIN_11
+51    0x8068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0062    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x485A    //RX_FDEQ_GAIN_2
+42    0x6C82    //RX_FDEQ_GAIN_3
+43    0x949E    //RX_FDEQ_GAIN_4
+44    0x9C96    //RX_FDEQ_GAIN_5
+45    0x908E    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0xA4B0    //RX_FDEQ_GAIN_9
+49    0xA898    //RX_FDEQ_GAIN_10
+50    0x7272    //RX_FDEQ_GAIN_11
+51    0x8068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x009C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03AD    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x3E40    //RX_FDEQ_GAIN_1
+41    0x485A    //RX_FDEQ_GAIN_2
+42    0x6C82    //RX_FDEQ_GAIN_3
+43    0x949E    //RX_FDEQ_GAIN_4
+44    0x9C96    //RX_FDEQ_GAIN_5
+45    0x908E    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0xA4B0    //RX_FDEQ_GAIN_9
+49    0xA898    //RX_FDEQ_GAIN_10
+50    0x7272    //RX_FDEQ_GAIN_11
+51    0x8068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x1000    //RX_LMT_THRD
+194    0x7FDF    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0031    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0086    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7500    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0030    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5844    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x382C    //TX_FDEQ_GAIN_12
+580    0x3830    //TX_FDEQ_GAIN_13
+581    0x3054    //TX_FDEQ_GAIN_14
+582    0x5270    //TX_FDEQ_GAIN_15
+583    0x4858    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0005    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B2    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FE2    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3C8C    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0850    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
-3    0x6B56    //TX_SENDFUNC_MODE_0
+3    0x6B7E    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -29,7 +8039,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x00A4    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -971,7 +8981,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x003C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -1097,9 +9107,9 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x02FD    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
+126    0x1964    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
 129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -1822,7 +9832,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
+157    0x002C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0004    //RX_SAMPLINGFREQ_SIG
 160    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -1948,9 +9958,9 @@
 280    0x0CCD    //RX_TDDRC_SMT_W
 281    0x02FD    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
+283    0x1964    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
 286    0x000D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
@@ -2673,15 +10683,8025 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET-CUSTOM2-FB
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x0200    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0280    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6D60    //TX_DTD_THR1_0
+198    0x7B00    //TX_DTD_THR1_1
+199    0x7B00    //TX_DTD_THR1_2
+200    0x7B00    //TX_DTD_THR1_3
+201    0x7B00    //TX_DTD_THR1_4
+202    0x7B00    //TX_DTD_THR1_5
+203    0x7B00    //TX_DTD_THR1_6
+204    0x1000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xF800    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xF900    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x01A0    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x3000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x3000    //TX_LAMBDA_NN_EST_3
+262    0x3000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x3000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x3000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x3000    //TX_MAINREFRTO_TH_H
+277    0x1000    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x4000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x001B    //TX_NS_LVL_CTRL_2
+284    0x0017    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x001B    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x0010    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x4000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x3000    //TX_SNRI_SUP_7
+308    0x3000    //TX_THR_LFNS
+309    0x001A    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x2000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x4000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7200    //TX_LAMBDA_PFILT_S_1
+341    0x7800    //TX_LAMBDA_PFILT_S_2
+342    0x7400    //TX_LAMBDA_PFILT_S_3
+343    0x7200    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0C80    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0004    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x022C    //TX_NOISE_TH_2
+372    0x2260    //TX_NOISE_TH_3
+373    0x6B6C    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x07D0    //TX_NOISE_TH_6
+379    0x0004    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x000A    //TX_NS_ENOISE_MIC0_TH
+406    0x0004    //TX_MINENOISE_MIC0_TH
+407    0x0014    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x4000    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0100    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x6000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x001A    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0080    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0018    //TX_FDEQ_SUBNUM
+567    0x6D61    //TX_FDEQ_GAIN_0
+568    0x594D    //TX_FDEQ_GAIN_1
+569    0x4D4D    //TX_FDEQ_GAIN_2
+570    0x4648    //TX_FDEQ_GAIN_3
+571    0x4242    //TX_FDEQ_GAIN_4
+572    0x4040    //TX_FDEQ_GAIN_5
+573    0x3E3E    //TX_FDEQ_GAIN_6
+574    0x3431    //TX_FDEQ_GAIN_7
+575    0x2621    //TX_FDEQ_GAIN_8
+576    0x3338    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0505    //TX_FDEQ_BIN_4
+596    0x040A    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x060D    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F09    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0004    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0607    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0212    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7B0C    //TX_DTD_THR1_MICMUTE_0
+912    0x7EB8    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x36B0    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x050E    //RX_PGA
+11    0x7646    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x5464    //RX_FDEQ_GAIN_2
+42    0x7086    //RX_FDEQ_GAIN_3
+43    0x9AA4    //RX_FDEQ_GAIN_4
+44    0x928E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8686    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x989C    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x055F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03B8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484A    //RX_FDEQ_GAIN_1
+41    0x5A60    //RX_FDEQ_GAIN_2
+42    0x6C8E    //RX_FDEQ_GAIN_3
+43    0x9CA4    //RX_FDEQ_GAIN_4
+44    0x9A8E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8282    //RX_FDEQ_GAIN_7
+47    0x8490    //RX_FDEQ_GAIN_8
+48    0xA0A4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03B8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484A    //RX_FDEQ_GAIN_1
+41    0x5A60    //RX_FDEQ_GAIN_2
+42    0x6C8E    //RX_FDEQ_GAIN_3
+43    0x9CA4    //RX_FDEQ_GAIN_4
+44    0x9A8E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8282    //RX_FDEQ_GAIN_7
+47    0x8490    //RX_FDEQ_GAIN_8
+48    0xA0A4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03B8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484A    //RX_FDEQ_GAIN_1
+41    0x5A60    //RX_FDEQ_GAIN_2
+42    0x6C8E    //RX_FDEQ_GAIN_3
+43    0x9CA4    //RX_FDEQ_GAIN_4
+44    0x9A8E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8282    //RX_FDEQ_GAIN_7
+47    0x8490    //RX_FDEQ_GAIN_8
+48    0xA0A4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03B8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484A    //RX_FDEQ_GAIN_1
+41    0x5A60    //RX_FDEQ_GAIN_2
+42    0x6C8E    //RX_FDEQ_GAIN_3
+43    0x9CA4    //RX_FDEQ_GAIN_4
+44    0x9A8E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8282    //RX_FDEQ_GAIN_7
+47    0x8490    //RX_FDEQ_GAIN_8
+48    0xA0A4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03B8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484A    //RX_FDEQ_GAIN_1
+41    0x5A60    //RX_FDEQ_GAIN_2
+42    0x6C8E    //RX_FDEQ_GAIN_3
+43    0x9CA4    //RX_FDEQ_GAIN_4
+44    0x9A8E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8282    //RX_FDEQ_GAIN_7
+47    0x8490    //RX_FDEQ_GAIN_8
+48    0xA0A4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03B8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484A    //RX_FDEQ_GAIN_1
+41    0x5A60    //RX_FDEQ_GAIN_2
+42    0x6C8E    //RX_FDEQ_GAIN_3
+43    0x9CA4    //RX_FDEQ_GAIN_4
+44    0x9A8E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8282    //RX_FDEQ_GAIN_7
+47    0x8490    //RX_FDEQ_GAIN_8
+48    0xA0A4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03B8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484A    //RX_FDEQ_GAIN_1
+41    0x5A60    //RX_FDEQ_GAIN_2
+42    0x6C8E    //RX_FDEQ_GAIN_3
+43    0x9CA4    //RX_FDEQ_GAIN_4
+44    0x9A8E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8282    //RX_FDEQ_GAIN_7
+47    0x8490    //RX_FDEQ_GAIN_8
+48    0xA0A4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0045    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-WB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x2F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x0200    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6978    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x5000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x2000    //TX_MAINREFRTOH_TH_H
+275    0x1400    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0018    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x001A    //TX_NS_LVL_CTRL_4
+286    0x001E    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
+288    0x001C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0018    //TX_MIN_GAIN_S_4
+294    0x0018    //TX_MIN_GAIN_S_5
+295    0x0018    //TX_MIN_GAIN_S_6
+296    0x0018    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x5000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x4000    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7000    //TX_A_POST_FILT_S_0
+315    0x3000    //TX_A_POST_FILT_S_1
+316    0x3000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7000    //TX_A_POST_FILT_S_4
+319    0x7000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x5000    //TX_B_POST_FILT_6
+329    0x4000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C29    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0600    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0139    //TX_NOISE_TH_1
+371    0x0479    //TX_NOISE_TH_2
+372    0x2328    //TX_NOISE_TH_3
+373    0x4422    //TX_NOISE_TH_4
+374    0x5586    //TX_NOISE_TH_5
+375    0x4425    //TX_NOISE_TH_5_2
+376    0x0032    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x21E8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0500    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x1000    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x05A8    //TX_SB_RHO_MEAN2_TH
+441    0x0384    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0280    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0200    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x474A    //TX_FDEQ_GAIN_3
+571    0x473F    //TX_FDEQ_GAIN_4
+572    0x4245    //TX_FDEQ_GAIN_5
+573    0x4B53    //TX_FDEQ_GAIN_6
+574    0x5246    //TX_FDEQ_GAIN_7
+575    0x3936    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x3432    //TX_FDEQ_GAIN_10
+578    0x322F    //TX_FDEQ_GAIN_11
+579    0x3434    //TX_FDEQ_GAIN_12
+580    0x3C48    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0F0F    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x0611    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0005    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x199A    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x2000    //TX_B_LESSCUT_RTO_MASK
+877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x0280    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0100    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0xFFFF    //TX_AMS_RESRV_02
+945    0x7530    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0480    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x1000    //RX_LMT_THRD
+37    0x7FDF    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4840    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4659    //RX_FDEQ_GAIN_2
+42    0x6474    //RX_FDEQ_GAIN_3
+43    0x7A82    //RX_FDEQ_GAIN_4
+44    0x8180    //RX_FDEQ_GAIN_5
+45    0x8084    //RX_FDEQ_GAIN_6
+46    0x8A88    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x8A95    //RX_FDEQ_GAIN_9
+49    0x978E    //RX_FDEQ_GAIN_10
+50    0x8C8C    //RX_FDEQ_GAIN_11
+51    0x7068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04E6    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0700    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x6886    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA0A6    //RX_FDEQ_GAIN_5
+45    0xA098    //RX_FDEQ_GAIN_6
+46    0x9894    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CB0    //RX_FDEQ_GAIN_9
+49    0xA2A0    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x8070    //RX_FDEQ_GAIN_12
+52    0x6858    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0A07    //RX_FDEQ_BIN_10
+74    0x130E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x6886    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA0A6    //RX_FDEQ_GAIN_5
+45    0xA098    //RX_FDEQ_GAIN_6
+46    0x9894    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CB0    //RX_FDEQ_GAIN_9
+49    0xA2A0    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x8070    //RX_FDEQ_GAIN_12
+52    0x6858    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0A07    //RX_FDEQ_BIN_10
+74    0x130E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x6886    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA0A6    //RX_FDEQ_GAIN_5
+45    0xA098    //RX_FDEQ_GAIN_6
+46    0x9894    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CB0    //RX_FDEQ_GAIN_9
+49    0xA2A0    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x8070    //RX_FDEQ_GAIN_12
+52    0x6858    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0A07    //RX_FDEQ_BIN_10
+74    0x130E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x6886    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA0A6    //RX_FDEQ_GAIN_5
+45    0xA098    //RX_FDEQ_GAIN_6
+46    0x9894    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CB0    //RX_FDEQ_GAIN_9
+49    0xA2A0    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x8070    //RX_FDEQ_GAIN_12
+52    0x6858    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0A07    //RX_FDEQ_BIN_10
+74    0x130E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x6886    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA0A6    //RX_FDEQ_GAIN_5
+45    0xA098    //RX_FDEQ_GAIN_6
+46    0x9894    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CB0    //RX_FDEQ_GAIN_9
+49    0xA2A0    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x8070    //RX_FDEQ_GAIN_12
+52    0x6858    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0A07    //RX_FDEQ_BIN_10
+74    0x130E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x6886    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA0A6    //RX_FDEQ_GAIN_5
+45    0xA098    //RX_FDEQ_GAIN_6
+46    0x9894    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CB0    //RX_FDEQ_GAIN_9
+49    0xA2A0    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x8070    //RX_FDEQ_GAIN_12
+52    0x6858    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0A07    //RX_FDEQ_BIN_10
+74    0x130E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x3C3C    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x6886    //RX_FDEQ_GAIN_3
+43    0x8EA2    //RX_FDEQ_GAIN_4
+44    0xA0A6    //RX_FDEQ_GAIN_5
+45    0xA098    //RX_FDEQ_GAIN_6
+46    0x9894    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CB0    //RX_FDEQ_GAIN_9
+49    0xA2A0    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x8070    //RX_FDEQ_GAIN_12
+52    0x6858    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0A07    //RX_FDEQ_BIN_10
+74    0x130E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x1000    //RX_LMT_THRD
+194    0x7FDF    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0031    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0086    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7500    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0030    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x584C    //TX_FDEQ_GAIN_0
+568    0x4444    //TX_FDEQ_GAIN_1
+569    0x4444    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x4044    //TX_FDEQ_GAIN_5
+573    0x4849    //TX_FDEQ_GAIN_6
+574    0x483C    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x4040    //TX_FDEQ_GAIN_9
+577    0x4040    //TX_FDEQ_GAIN_10
+578    0x463A    //TX_FDEQ_GAIN_11
+579    0x4432    //TX_FDEQ_GAIN_12
+580    0x4028    //TX_FDEQ_GAIN_13
+581    0x3C3C    //TX_FDEQ_GAIN_14
+582    0x3C3C    //TX_FDEQ_GAIN_15
+583    0x3C3C    //TX_FDEQ_GAIN_16
+584    0x3C3C    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0005    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05D3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B2    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FE2    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3C8C    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0850    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5060    //RX_FDEQ_GAIN_2
+42    0x6C84    //RX_FDEQ_GAIN_3
+43    0x94AA    //RX_FDEQ_GAIN_4
+44    0xB0AC    //RX_FDEQ_GAIN_5
+45    0xA0A4    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B8    //RX_FDEQ_GAIN_10
+50    0xB09C    //RX_FDEQ_GAIN_11
+51    0x786C    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x646C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0D    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5060    //RX_FDEQ_GAIN_2
+42    0x6C84    //RX_FDEQ_GAIN_3
+43    0x94AA    //RX_FDEQ_GAIN_4
+44    0xB0AC    //RX_FDEQ_GAIN_5
+45    0xA0A4    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B8    //RX_FDEQ_GAIN_10
+50    0xB09C    //RX_FDEQ_GAIN_11
+51    0x786C    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x646C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0D    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0015    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5060    //RX_FDEQ_GAIN_2
+42    0x6C84    //RX_FDEQ_GAIN_3
+43    0x94AA    //RX_FDEQ_GAIN_4
+44    0xB0AC    //RX_FDEQ_GAIN_5
+45    0xA0A4    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B8    //RX_FDEQ_GAIN_10
+50    0xB09C    //RX_FDEQ_GAIN_11
+51    0x786C    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x646C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0D    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0023    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5060    //RX_FDEQ_GAIN_2
+42    0x6C84    //RX_FDEQ_GAIN_3
+43    0x94AA    //RX_FDEQ_GAIN_4
+44    0xB0AC    //RX_FDEQ_GAIN_5
+45    0xA0A4    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B8    //RX_FDEQ_GAIN_10
+50    0xB09C    //RX_FDEQ_GAIN_11
+51    0x786C    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x646C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0D    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0039    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5060    //RX_FDEQ_GAIN_2
+42    0x6C84    //RX_FDEQ_GAIN_3
+43    0x94AA    //RX_FDEQ_GAIN_4
+44    0xB0AC    //RX_FDEQ_GAIN_5
+45    0xA0A4    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B8    //RX_FDEQ_GAIN_10
+50    0xB09C    //RX_FDEQ_GAIN_11
+51    0x786C    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x646C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0D    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0055    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5060    //RX_FDEQ_GAIN_2
+42    0x6C84    //RX_FDEQ_GAIN_3
+43    0x94AA    //RX_FDEQ_GAIN_4
+44    0xB0AC    //RX_FDEQ_GAIN_5
+45    0xA0A4    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B8    //RX_FDEQ_GAIN_10
+50    0xB09C    //RX_FDEQ_GAIN_11
+51    0x786C    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x646C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0D    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5060    //RX_FDEQ_GAIN_2
+42    0x6C84    //RX_FDEQ_GAIN_3
+43    0x94AA    //RX_FDEQ_GAIN_4
+44    0xB0AC    //RX_FDEQ_GAIN_5
+45    0xA0A4    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B8    //RX_FDEQ_GAIN_10
+50    0xB09C    //RX_FDEQ_GAIN_11
+51    0x786C    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x646C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0D    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
-3    0x6B5E    //TX_SENDFUNC_MODE_0
+3    0x6B7E    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -2699,7 +18719,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x00A4    //TX_DIST2REF1
+21    0x009C    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -3641,7 +19661,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x003C    //RX_RECVFUNC_MODE_0
+0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -3767,9 +19787,9 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x02FD    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
+126    0x1964    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
 129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -4492,7 +20512,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
+157    0x002C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0004    //RX_SAMPLINGFREQ_SIG
 160    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -4618,9 +20638,9 @@
 280    0x0CCD    //RX_TDDRC_SMT_W
 281    0x02FD    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
+283    0x1964    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
 286    0x000D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
@@ -5343,10 +21363,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HANDSET-HANDSET-CUSTOM1-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F76    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A3    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2260    //TX_NOISE_TH_3
+373    0x7080    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4E4A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x4054    //TX_FDEQ_GAIN_14
+582    0x687A    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x494A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
+676    0x5355    //TX_PREEQ_GAIN_MIC1_10
+677    0x585C    //TX_PREEQ_GAIN_MIC1_11
+678    0x616A    //TX_PREEQ_GAIN_MIC1_12
+679    0x726E    //TX_PREEQ_GAIN_MIC1_13
+680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
+681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1719    //TX_PREEQ_BIN_MIC1_11
+702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x3042    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0650    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x203C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0010    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0035    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0047    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0076    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HANDSET-HANDSET-CUSTOM1-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -8013,5356 +26703,16 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-NB
+#CASE_NAME  HANDSET-HANDSET-CUSTOM2-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0076    //TX_PATCH_REG
-3    0x6F7F    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0800    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x0200    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x0400    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x0400    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0280    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
-198    0x7B00    //TX_DTD_THR1_1
-199    0x7B00    //TX_DTD_THR1_2
-200    0x7B00    //TX_DTD_THR1_3
-201    0x7B00    //TX_DTD_THR1_4
-202    0x7B00    //TX_DTD_THR1_5
-203    0x7B00    //TX_DTD_THR1_6
-204    0x1000    //TX_DTD_THR2_0
-205    0x1000    //TX_DTD_THR2_1
-206    0x1000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0FA0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0000    //TX_RATIO_DT_L_TH_LOW
-224    0x0000    //TX_RATIO_DT_H_TH_LOW
-225    0x0000    //TX_RATIO_DT_L_TH_HIGH
-226    0x0000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0000    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xF800    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
-246    0xF900    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x01A0    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x01A0    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x3000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x3000    //TX_LAMBDA_NN_EST_3
-262    0x3000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x0000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x3000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x3000    //TX_MAINREFRTOH_TH_H
-275    0x1000    //TX_MAINREFRTOH_TH_L
-276    0x3000    //TX_MAINREFRTO_TH_H
-277    0x1000    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x4000    //TX_B_POST_FLT_0
-280    0x4000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x001B    //TX_NS_LVL_CTRL_2
-284    0x0017    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x001B    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x0010    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x0014    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x0014    //TX_MIN_GAIN_S_7
-297    0x5000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x4000    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x3000    //TX_SNRI_SUP_7
-308    0x3000    //TX_THR_LFNS
-309    0x001A    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
-317    0x2000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x2000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x4000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x5000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7200    //TX_LAMBDA_PFILT_S_1
-341    0x7800    //TX_LAMBDA_PFILT_S_2
-342    0x7400    //TX_LAMBDA_PFILT_S_3
-343    0x7200    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x0C80    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0004    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x0320    //TX_NOISE_TH_1
-371    0x022C    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x6B6C    //TX_NOISE_TH_4
-374    0x7FFF    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x07D0    //TX_NOISE_TH_6
-379    0x0004    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x000A    //TX_NS_ENOISE_MIC0_TH
-406    0x0004    //TX_MINENOISE_MIC0_TH
-407    0x0014    //TX_MINENOISE_MIC0_S_TH
-408    0x4900    //TX_MIN_G_CTRL_SSNS
-409    0x0400    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x4000    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0100    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x099A    //TX_SB_RHO_MEAN2_TH
-441    0x0666    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x6000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x001A    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0080    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0018    //TX_FDEQ_SUBNUM
-567    0x6D61    //TX_FDEQ_GAIN_0
-568    0x5951    //TX_FDEQ_GAIN_1
-569    0x5151    //TX_FDEQ_GAIN_2
-570    0x4A4C    //TX_FDEQ_GAIN_3
-571    0x4642    //TX_FDEQ_GAIN_4
-572    0x4040    //TX_FDEQ_GAIN_5
-573    0x4242    //TX_FDEQ_GAIN_6
-574    0x3835    //TX_FDEQ_GAIN_7
-575    0x2A25    //TX_FDEQ_GAIN_8
-576    0x373C    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0505    //TX_FDEQ_BIN_4
-596    0x040A    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x060D    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F09    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C08    //TX_PREEQ_BIN_MIC0_2
-644    0x0700    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
-673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0004    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2329    //TX_SENDFUNC_REG_MICMUTE
-898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x00A0    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0012    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x6E00    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7530    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x2000    //TX_DTD_THR2_MICMUTE_0
-916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x01D0    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x3E80    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x05A0    //TX_AMS_RESRV_01
-944    0x3C50    //TX_AMS_RESRV_02
-945    0x5DC0    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x243C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x050E    //RX_PGA
-11    0x7646    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x5464    //RX_FDEQ_GAIN_2
-42    0x7086    //RX_FDEQ_GAIN_3
-43    0x9AA4    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x8684    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8C8C    //RX_FDEQ_GAIN_8
-48    0x989C    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x055F    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1450    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0700    //RX_MAX_G_FP
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0521    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001F    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0504    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0032    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x007F    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0493    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0010    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0045    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-WB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0036    //TX_PATCH_REG
-3    0x2F7F    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0800    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x0200    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x0400    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x0400    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0200    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0000    //TX_RATIO_DT_L_TH_LOW
-224    0x0000    //TX_RATIO_DT_H_TH_LOW
-225    0x0000    //TX_RATIO_DT_L_TH_HIGH
-226    0x0000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0000    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFB00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x5000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x0000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x2000    //TX_MAINREFRTOH_TH_H
-275    0x1400    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x4000    //TX_B_POST_FLT_1
-281    0x0018    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x001A    //TX_NS_LVL_CTRL_4
-286    0x001E    //TX_NS_LVL_CTRL_5
-287    0x001C    //TX_NS_LVL_CTRL_6
-288    0x001C    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0018    //TX_MIN_GAIN_S_4
-294    0x0018    //TX_MIN_GAIN_S_5
-295    0x0018    //TX_MIN_GAIN_S_6
-296    0x0018    //TX_MIN_GAIN_S_7
-297    0x5000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x5000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x4000    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7000    //TX_A_POST_FILT_S_0
-315    0x3000    //TX_A_POST_FILT_S_1
-316    0x3000    //TX_A_POST_FILT_S_2
-317    0x2000    //TX_A_POST_FILT_S_3
-318    0x7000    //TX_A_POST_FILT_S_4
-319    0x7000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x5000    //TX_B_POST_FILT_6
-329    0x4000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C29    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0600    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x0139    //TX_NOISE_TH_1
-371    0x0479    //TX_NOISE_TH_2
-372    0x2328    //TX_NOISE_TH_3
-373    0x4422    //TX_NOISE_TH_4
-374    0x5586    //TX_NOISE_TH_5
-375    0x4425    //TX_NOISE_TH_5_2
-376    0x0032    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x21E8    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0500    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4900    //TX_MIN_G_CTRL_SSNS
-409    0x1000    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x05A8    //TX_SB_RHO_MEAN2_TH
-441    0x0384    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0280    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0200    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x473F    //TX_FDEQ_GAIN_4
-572    0x4245    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x564A    //TX_FDEQ_GAIN_7
-575    0x3D3A    //TX_FDEQ_GAIN_8
-576    0x3838    //TX_FDEQ_GAIN_9
-577    0x3836    //TX_FDEQ_GAIN_10
-578    0x3633    //TX_FDEQ_GAIN_11
-579    0x3838    //TX_FDEQ_GAIN_12
-580    0x4048    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0F0F    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x0611    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
-644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
-645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
-646    0x0F09    //TX_PREEQ_BIN_MIC0_5
-647    0x0909    //TX_PREEQ_BIN_MIC0_6
-648    0x0908    //TX_PREEQ_BIN_MIC0_7
-649    0x0700    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x484A    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5454    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0F10    //TX_PREEQ_BIN_MIC1_10
-701    0x1011    //TX_PREEQ_BIN_MIC1_11
-702    0x1104    //TX_PREEQ_BIN_MIC1_12
-703    0x101B    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0005    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x199A    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x2000    //TX_B_LESSCUT_RTO_MASK
-877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2329    //TX_SENDFUNC_REG_MICMUTE
-898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000A    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x5DC0    //TX_DTD_THR1_MICMUTE_0
-912    0x639C    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x2000    //TX_DTD_THR2_MICMUTE_0
-916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x3E80    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x05A0    //TX_AMS_RESRV_01
-944    0xFFFF    //TX_AMS_RESRV_02
-945    0x1B58    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x243C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0480    //RX_PGA
-11    0x7B02    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x1000    //RX_LMT_THRD
-37    0x7FDF    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4659    //RX_FDEQ_GAIN_2
-42    0x6474    //RX_FDEQ_GAIN_3
-43    0x7A82    //RX_FDEQ_GAIN_4
-44    0x8180    //RX_FDEQ_GAIN_5
-45    0x8084    //RX_FDEQ_GAIN_6
-46    0x8A88    //RX_FDEQ_GAIN_7
-47    0x8C8C    //RX_FDEQ_GAIN_8
-48    0x8A95    //RX_FDEQ_GAIN_9
-49    0x978E    //RX_FDEQ_GAIN_10
-50    0x8C8C    //RX_FDEQ_GAIN_11
-51    0x7068    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04E6    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1450    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0700    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0504    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0531    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0531    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0032    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04E6    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04E6    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x007F    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04BC    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x1000    //RX_LMT_THRD
-194    0x7FDF    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001E    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0031    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0050    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0086    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F7F    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
+3    0x6F5E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -13379,7 +26729,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
+21    0x00A3    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -13486,7 +26836,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
+128    0x7E56    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x1800    //TX_THR_PITCH_DET_0
 131    0x1000    //TX_THR_PITCH_DET_1
@@ -13527,7 +26877,7 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x1800    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x01C0    //TX_SE_HOLD_N
+169    0x003C    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
 171    0x03E8    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
@@ -13556,7 +26906,7 @@
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
 197    0x7000    //TX_DTD_THR1_0
-198    0x7530    //TX_DTD_THR1_1
+198    0x7000    //TX_DTD_THR1_1
 199    0x7000    //TX_DTD_THR1_2
 200    0x7F00    //TX_DTD_THR1_3
 201    0x7F00    //TX_DTD_THR1_4
@@ -13659,12 +27009,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x2000    //TX_SNRI_SUP_1
-302    0x2000    //TX_SNRI_SUP_2
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x6000    //TX_SNRI_SUP_4
 305    0x6000    //TX_SNRI_SUP_5
-306    0x3000    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x6000    //TX_SNRI_SUP_7
 308    0x6000    //TX_THR_LFNS
 309    0x0017    //TX_G_LFNS
@@ -13681,9 +27031,9 @@
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x5000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x3000    //TX_B_POST_FILT_6
@@ -13728,10 +27078,10 @@
 367    0x000A    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x01F4    //TX_NOISE_TH_1
+370    0x00C6    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2134    //TX_NOISE_TH_3
-373    0x6978    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x7080    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
@@ -13751,7 +27101,7 @@
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x3000    //TX_POST_MASK_SUP_HSNE
 392    0x07D0    //TX_TAIL_DET_TH
-393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
@@ -13768,7 +27118,7 @@
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
-410    0x07D0    //TX_NS_FP_K_METAL
+410    0x0FA0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -13798,8 +27148,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x03E8    //TX_SB_RHO_MEAN2_TH
-441    0x03E8    //TX_SB_RHO_MEAN3_TH
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -13867,7 +27217,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
+509    0x0000    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -13925,23 +27275,23 @@
 564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C50    //TX_FDEQ_GAIN_0
-568    0x4A47    //TX_FDEQ_GAIN_1
-569    0x4847    //TX_FDEQ_GAIN_2
-570    0x4448    //TX_FDEQ_GAIN_3
-571    0x4244    //TX_FDEQ_GAIN_4
-572    0x444C    //TX_FDEQ_GAIN_5
-573    0x5455    //TX_FDEQ_GAIN_6
-574    0x5844    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
 576    0x4848    //TX_FDEQ_GAIN_9
 577    0x4A49    //TX_FDEQ_GAIN_10
-578    0x4642    //TX_FDEQ_GAIN_11
-579    0x4432    //TX_FDEQ_GAIN_12
+578    0x4E4A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
 580    0x4040    //TX_FDEQ_GAIN_13
-581    0x3C54    //TX_FDEQ_GAIN_14
-582    0x5270    //TX_FDEQ_GAIN_15
-583    0x4858    //TX_FDEQ_GAIN_16
+581    0x4054    //TX_FDEQ_GAIN_14
+582    0x687A    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
 586    0x4848    //TX_FDEQ_GAIN_19
@@ -13956,8 +27306,8 @@
 595    0x0504    //TX_FDEQ_BIN_4
 596    0x0708    //TX_FDEQ_BIN_5
 597    0x0808    //TX_FDEQ_BIN_6
-598    0x0C06    //TX_FDEQ_BIN_7
-599    0x0C0C    //TX_FDEQ_BIN_8
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
 600    0x0F0F    //TX_FDEQ_BIN_9
 601    0x0E0D    //TX_FDEQ_BIN_10
 602    0x0F28    //TX_FDEQ_BIN_11
@@ -14030,17 +27380,17 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4849    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
-675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5354    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x5653    //TX_PREEQ_GAIN_MIC1_14
-681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
-682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+672    0x494A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
+676    0x5355    //TX_PREEQ_GAIN_MIC1_10
+677    0x585C    //TX_PREEQ_GAIN_MIC1_11
+678    0x616A    //TX_PREEQ_GAIN_MIC1_12
+679    0x726E    //TX_PREEQ_GAIN_MIC1_13
+680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
+681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -14054,17 +27404,17 @@
 693    0x0304    //TX_PREEQ_BIN_MIC1_3
 694    0x0405    //TX_PREEQ_BIN_MIC1_4
 695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
 700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
+701    0x1719    //TX_PREEQ_BIN_MIC1_11
+702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x3042    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -14132,7 +27482,7 @@
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0005    //TX_GAIN_LIMIT_1
+774    0x0006    //TX_GAIN_LIMIT_1
 775    0x0000    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -14174,8 +27524,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -14214,17 +27564,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0002    //TX_TDDRC_THRD_0
 855    0x0003    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x0650    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -14255,42 +27605,42 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2329    //TX_SENDFUNC_REG_MICMUTE
-898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03E8    //TX_MICMUTE_RATIO_THR
-900    0x01A4    //TX_MICMUTE_AMP_THR
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
 901    0x0004    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
 912    0x7000    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x2000    //TX_DTD_THR2_MICMUTE_0
-916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
 922    0x03E8    //TX_MICMUTE_DT_CUT_K
 923    0x0001    //TX_MICMUTE_DT_CUT_THR
 924    0x03E8    //TX_MICMUTE_DT_CUT_K2
 925    0x0001    //TX_MICMUTE_DT_CUT_THR2
 926    0x0064    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
 933    0x0800    //TX_MICMUTE_N2_SN_EST
 934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
 935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
@@ -14301,9 +27651,9 @@
 940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x05A0    //TX_AMS_RESRV_01
-944    0x3800    //TX_AMS_RESRV_02
-945    0x4268    //TX_AMS_RESRV_03
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -14321,7 +27671,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x243C    //RX_RECVFUNC_MODE_0
+0    0x203C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -14332,7 +27682,7 @@
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 10    0x05AA    //RX_PGA
-11    0x7D83    //RX_A_HP
+11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
 14    0x5000    //RX_THR_PITCH_DET_1
@@ -14447,9 +27797,9 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0551    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1450    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0850    //RX_MAX_G_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -14501,24 +27851,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
+124    0x056F    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14536,12 +27886,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
 74    0x1E19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14600,24 +27950,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
+124    0x056F    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14635,12 +27985,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
 74    0x1E19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14699,24 +28049,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
+124    0x056F    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14734,12 +28084,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
 74    0x1E19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14798,24 +28148,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
+124    0x056F    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14833,12 +28183,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
 74    0x1E19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14897,24 +28247,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
+124    0x056F    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14932,12 +28282,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
 74    0x1E19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14996,24 +28346,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
+124    0x056F    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -15031,12 +28381,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
 74    0x1E19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -15095,24 +28445,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
+124    0x056F    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -15130,12 +28480,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
 74    0x1E19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -16023,15 +29373,15 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-FB
+#CASE_NAME  HANDSET-HANDSET-CUSTOM2-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
-3    0x6B7E    //TX_SENDFUNC_MODE_0
+3    0x6B5E    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -16049,7 +29399,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x00A4    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -16991,7 +30341,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0x003C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -17117,9 +30467,9 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x02FD    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1964    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
 129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -17842,7 +31192,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x002C    //RX_RECVFUNC_MODE_0
+157    0x003C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0004    //RX_SAMPLINGFREQ_SIG
 160    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -17968,9 +31318,9 @@
 280    0x0CCD    //RX_TDDRC_SMT_W
 281    0x02FD    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x1964    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
 286    0x000D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
@@ -18693,10 +32043,8020 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HANDSET-HANDSET-RESERVE1-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F56    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A3    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2260    //TX_NOISE_TH_3
+373    0x7080    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x494D    //TX_FDEQ_GAIN_3
+571    0x4442    //TX_FDEQ_GAIN_4
+572    0x4448    //TX_FDEQ_GAIN_5
+573    0x4C53    //TX_FDEQ_GAIN_6
+574    0x6244    //TX_FDEQ_GAIN_7
+575    0x4348    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4E4A    //TX_FDEQ_GAIN_11
+579    0x4840    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x4054    //TX_FDEQ_GAIN_14
+582    0x687A    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x494A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
+676    0x5355    //TX_PREEQ_GAIN_MIC1_10
+677    0x585C    //TX_PREEQ_GAIN_MIC1_11
+678    0x616A    //TX_PREEQ_GAIN_MIC1_12
+679    0x726E    //TX_PREEQ_GAIN_MIC1_13
+680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
+681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1719    //TX_PREEQ_BIN_MIC1_11
+702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x3042    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1500    //TX_TDDRC_THRD_2
+857    0x1500    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0650    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x203C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0010    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0035    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0047    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0076    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x056F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x586E    //RX_FDEQ_GAIN_3
+43    0x8496    //RX_FDEQ_GAIN_4
+44    0x968E    //RX_FDEQ_GAIN_5
+45    0x8488    //RX_FDEQ_GAIN_6
+46    0x8884    //RX_FDEQ_GAIN_7
+47    0x9CA4    //RX_FDEQ_GAIN_8
+48    0x98A8    //RX_FDEQ_GAIN_9
+49    0xBEB8    //RX_FDEQ_GAIN_10
+50    0x918D    //RX_FDEQ_GAIN_11
+51    0x7566    //RX_FDEQ_GAIN_12
+52    0x6460    //RX_FDEQ_GAIN_13
+53    0x6174    //RX_FDEQ_GAIN_14
+54    0x7890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D09    //RX_FDEQ_BIN_9
+73    0x0819    //RX_FDEQ_BIN_10
+74    0x1E19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE1-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B56    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7500    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0030    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5844    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x4432    //TX_FDEQ_GAIN_12
+580    0x4040    //TX_FDEQ_GAIN_13
+581    0x3C54    //TX_FDEQ_GAIN_14
+582    0x5270    //TX_FDEQ_GAIN_15
+583    0x4858    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0005    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B2    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7000    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FE4    //TX_DTD_THR1_MICMUTE_0
+912    0x7BD4    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x2000    //TX_DTD_THR2_MICMUTE_0
+916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_AMS_RESRV_01
+944    0x3800    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x05AA    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1450    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0850    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x045E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5454    //RX_FDEQ_GAIN_1
+41    0x5868    //RX_FDEQ_GAIN_2
+42    0x728A    //RX_FDEQ_GAIN_3
+43    0x9CB0    //RX_FDEQ_GAIN_4
+44    0xB4A8    //RX_FDEQ_GAIN_5
+45    0x9C9C    //RX_FDEQ_GAIN_6
+46    0xA8AC    //RX_FDEQ_GAIN_7
+47    0xACB9    //RX_FDEQ_GAIN_8
+48    0xBDC6    //RX_FDEQ_GAIN_9
+49    0xC4B0    //RX_FDEQ_GAIN_10
+50    0x848F    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7878    //RX_FDEQ_GAIN_13
+53    0x6880    //RX_FDEQ_GAIN_14
+54    0x7C94    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E16    //RX_FDEQ_BIN_10
+74    0x1519    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -18869,7 +40229,7 @@
 168    0x4000    //TX_GAIN_NP
 169    0x0280    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -18895,7 +40255,7 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
+197    0x6D60    //TX_DTD_THR1_0
 198    0x7B00    //TX_DTD_THR1_1
 199    0x7B00    //TX_DTD_THR1_2
 200    0x7B00    //TX_DTD_THR1_3
@@ -19514,8 +40874,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -19564,7 +40924,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x05F5    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -19598,19 +40958,19 @@
 897    0x2329    //TX_SENDFUNC_REG_MICMUTE
 898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x00A0    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x0212    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0012    //TX_MICMUTE_CVG_TIME
+903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
 906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x6E00    //TX_MICMUTE_EAD_THR
+908    0x7FF6    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7530    //TX_DTD_THR1_MICMUTE_1
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7B0C    //TX_DTD_THR1_MICMUTE_0
+912    0x7EB8    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x2000    //TX_DTD_THR2_MICMUTE_0
@@ -19620,11 +40980,11 @@
 919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
 920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x01D0    //TX_MICMUTE_DT2_HOLD_N
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -19642,8 +41002,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x05A0    //TX_AMS_RESRV_01
-944    0x3C50    //TX_AMS_RESRV_02
-945    0x5DC0    //TX_AMS_RESRV_03
+944    0x36B0    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -19844,16 +41204,16 @@
 124    0x0360    //RX_TDDRC_DRC_GAIN
 38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x485C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -19915,7 +41275,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -19943,16 +41303,16 @@
 124    0x0360    //RX_TDDRC_DRC_GAIN
 38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x485C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20014,7 +41374,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20042,16 +41402,16 @@
 124    0x0360    //RX_TDDRC_DRC_GAIN
 38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x485C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20113,7 +41473,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20141,16 +41501,16 @@
 124    0x0360    //RX_TDDRC_DRC_GAIN
 38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x485C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20212,7 +41572,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20240,16 +41600,16 @@
 124    0x0360    //RX_TDDRC_DRC_GAIN
 38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x485C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20311,7 +41671,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20339,16 +41699,16 @@
 124    0x0360    //RX_TDDRC_DRC_GAIN
 38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x485C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20410,7 +41770,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -20438,16 +41798,16 @@
 124    0x0360    //RX_TDDRC_DRC_GAIN
 38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x485C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20509,7 +41869,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
 157    0x000C    //RX_RECVFUNC_MODE_0
@@ -21365,8 +42725,8 @@
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -21537,9 +42897,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0200    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -21565,11 +42925,11 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
+197    0x6978    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
 200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
+201    0x7FFF    //TX_DTD_THR1_4
 202    0x7F00    //TX_DTD_THR1_5
 203    0x7F00    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
@@ -22184,8 +43544,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -22234,7 +43594,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x05A0    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -22268,19 +43628,19 @@
 897    0x2329    //TX_SENDFUNC_REG_MICMUTE
 898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x0280    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000A    //TX_MICMUTE_CVG_TIME
+903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
 906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
+908    0x7FF6    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x5DC0    //TX_DTD_THR1_MICMUTE_0
-912    0x639C    //TX_DTD_THR1_MICMUTE_1
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x2000    //TX_DTD_THR2_MICMUTE_0
@@ -22290,11 +43650,11 @@
 919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
 920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0100    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -22313,7 +43673,7 @@
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x05A0    //TX_AMS_RESRV_01
 944    0xFFFF    //TX_AMS_RESRV_02
-945    0x1B58    //TX_AMS_RESRV_03
+945    0x7530    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -22514,12 +43874,12 @@
 124    0x0400    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -22540,8 +43900,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -22613,12 +43973,12 @@
 124    0x0400    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -22639,8 +43999,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -22712,12 +44072,12 @@
 124    0x0400    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -22738,8 +44098,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -22811,12 +44171,12 @@
 124    0x0400    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -22837,8 +44197,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -22910,12 +44270,12 @@
 124    0x0400    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -22936,8 +44296,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -23009,12 +44369,12 @@
 124    0x0400    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -23035,8 +44395,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -23108,12 +44468,12 @@
 124    0x0400    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -23134,8 +44494,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -24035,8 +45395,8 @@
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -24188,7 +45548,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
+150    0x7500    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0400    //TX_MIN_EQ_RE_EST_0
 153    0x0400    //TX_MIN_EQ_RE_EST_1
@@ -24209,7 +45569,7 @@
 168    0x4000    //TX_GAIN_NP
 169    0x01C0    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0030    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -24235,13 +45595,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7530    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
 205    0x2000    //TX_DTD_THR2_1
 206    0x2000    //TX_DTD_THR2_2
@@ -24249,7 +45609,7 @@
 208    0x1000    //TX_DTD_THR2_4
 209    0x1000    //TX_DTD_THR2_5
 210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
+211    0x7FD0    //TX_DTD_THR3
 212    0x0177    //TX_SPK_CUT_K
 213    0x1B58    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
@@ -24338,7 +45698,7 @@
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
+300    0x1400    //TX_SNRI_SUP_0
 301    0x2000    //TX_SNRI_SUP_1
 302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
@@ -24385,8 +45745,8 @@
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
 349    0x1D4C    //TX_K_PEPPER_HF
 350    0x0400    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -24417,7 +45777,7 @@
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x6D60    //TX_RATIODTL_CUT_TH
@@ -24444,11 +45804,11 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
-410    0x07D0    //TX_NS_FP_K_METAL
+410    0x0080    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -24617,9 +45977,9 @@
 576    0x4848    //TX_FDEQ_GAIN_9
 577    0x4A49    //TX_FDEQ_GAIN_10
 578    0x4642    //TX_FDEQ_GAIN_11
-579    0x4432    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x3C54    //TX_FDEQ_GAIN_14
+579    0x382C    //TX_FDEQ_GAIN_12
+580    0x3830    //TX_FDEQ_GAIN_13
+581    0x3054    //TX_FDEQ_GAIN_14
 582    0x5270    //TX_FDEQ_GAIN_15
 583    0x4858    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
@@ -24854,8 +46214,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -24904,7 +46264,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x05F5    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -24927,7 +46287,7 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
@@ -24937,20 +46297,20 @@
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2329    //TX_SENDFUNC_REG_MICMUTE
 898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03E8    //TX_MICMUTE_RATIO_THR
-900    0x01A4    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B2    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
 906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FE2    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x2000    //TX_DTD_THR2_MICMUTE_0
@@ -24960,10 +46320,10 @@
 919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
 920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
 926    0x0064    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
@@ -24982,8 +46342,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x05A0    //TX_AMS_RESRV_01
-944    0x3800    //TX_AMS_RESRV_02
-945    0x4268    //TX_AMS_RESRV_03
+944    0x3C8C    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -25184,14 +46544,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -25255,7 +46615,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25283,14 +46643,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -25354,7 +46714,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25382,14 +46742,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -25453,7 +46813,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25481,14 +46841,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -25552,7 +46912,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25578,16 +46938,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -25619,7 +46979,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -25651,7 +47011,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25679,14 +47039,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -25750,7 +47110,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -25778,14 +47138,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -25849,7 +47209,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
 157    0x000C    //RX_RECVFUNC_MODE_0
@@ -26705,8 +48065,8 @@
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -29373,10690 +50733,10 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-NB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F7F    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0800    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x0200    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x0400    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x0400    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0280    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
-198    0x7B00    //TX_DTD_THR1_1
-199    0x7B00    //TX_DTD_THR1_2
-200    0x7B00    //TX_DTD_THR1_3
-201    0x7B00    //TX_DTD_THR1_4
-202    0x7B00    //TX_DTD_THR1_5
-203    0x7B00    //TX_DTD_THR1_6
-204    0x1000    //TX_DTD_THR2_0
-205    0x1000    //TX_DTD_THR2_1
-206    0x1000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0FA0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0000    //TX_RATIO_DT_L_TH_LOW
-224    0x0000    //TX_RATIO_DT_H_TH_LOW
-225    0x0000    //TX_RATIO_DT_L_TH_HIGH
-226    0x0000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0000    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xF800    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
-246    0xF900    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x01A0    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x01A0    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x3000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x3000    //TX_LAMBDA_NN_EST_3
-262    0x3000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x0000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x3000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x3000    //TX_MAINREFRTOH_TH_H
-275    0x1000    //TX_MAINREFRTOH_TH_L
-276    0x3000    //TX_MAINREFRTO_TH_H
-277    0x1000    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x4000    //TX_B_POST_FLT_0
-280    0x4000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x001B    //TX_NS_LVL_CTRL_2
-284    0x0017    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x001B    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x0010    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x0014    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x0014    //TX_MIN_GAIN_S_7
-297    0x5000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x4000    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x3000    //TX_SNRI_SUP_7
-308    0x3000    //TX_THR_LFNS
-309    0x001A    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
-317    0x2000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x2000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x4000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x5000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7200    //TX_LAMBDA_PFILT_S_1
-341    0x7800    //TX_LAMBDA_PFILT_S_2
-342    0x7400    //TX_LAMBDA_PFILT_S_3
-343    0x7200    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x0C80    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0004    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x0320    //TX_NOISE_TH_1
-371    0x022C    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x6B6C    //TX_NOISE_TH_4
-374    0x7FFF    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x07D0    //TX_NOISE_TH_6
-379    0x0004    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x000A    //TX_NS_ENOISE_MIC0_TH
-406    0x0004    //TX_MINENOISE_MIC0_TH
-407    0x0014    //TX_MINENOISE_MIC0_S_TH
-408    0x4900    //TX_MIN_G_CTRL_SSNS
-409    0x0400    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x4000    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0100    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x099A    //TX_SB_RHO_MEAN2_TH
-441    0x0666    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x6000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x001A    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0080    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0018    //TX_FDEQ_SUBNUM
-567    0x6D61    //TX_FDEQ_GAIN_0
-568    0x5951    //TX_FDEQ_GAIN_1
-569    0x5151    //TX_FDEQ_GAIN_2
-570    0x4A4C    //TX_FDEQ_GAIN_3
-571    0x4642    //TX_FDEQ_GAIN_4
-572    0x4040    //TX_FDEQ_GAIN_5
-573    0x4242    //TX_FDEQ_GAIN_6
-574    0x3835    //TX_FDEQ_GAIN_7
-575    0x2A25    //TX_FDEQ_GAIN_8
-576    0x373C    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0505    //TX_FDEQ_BIN_4
-596    0x040A    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x060D    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F09    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C08    //TX_PREEQ_BIN_MIC0_2
-644    0x0700    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
-673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0004    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2329    //TX_SENDFUNC_REG_MICMUTE
-898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x00A0    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0012    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x6E00    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7530    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x2000    //TX_DTD_THR2_MICMUTE_0
-916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x01D0    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x3E80    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x05A0    //TX_AMS_RESRV_01
-944    0x3C50    //TX_AMS_RESRV_02
-945    0x5DC0    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x243C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x050E    //RX_PGA
-11    0x7646    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x5464    //RX_FDEQ_GAIN_2
-42    0x7086    //RX_FDEQ_GAIN_3
-43    0x9AA4    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x8684    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8C8C    //RX_FDEQ_GAIN_8
-48    0x989C    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x055F    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1450    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0700    //RX_MAX_G_FP
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0521    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001F    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0504    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0032    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x007F    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0493    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A40    //RX_FDEQ_GAIN_1
-41    0x505C    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x929C    //RX_FDEQ_GAIN_4
-44    0x928E    //RX_FDEQ_GAIN_5
-45    0x7E84    //RX_FDEQ_GAIN_6
-46    0x8686    //RX_FDEQ_GAIN_7
-47    0x8888    //RX_FDEQ_GAIN_8
-48    0x9498    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0010    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0045    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E40    //RX_FDEQ_GAIN_1
-198    0x515E    //RX_FDEQ_GAIN_2
-199    0x6470    //RX_FDEQ_GAIN_3
-200    0x7A84    //RX_FDEQ_GAIN_4
-201    0x7C7A    //RX_FDEQ_GAIN_5
-202    0x7C7C    //RX_FDEQ_GAIN_6
-203    0x7D7C    //RX_FDEQ_GAIN_7
-204    0x7E82    //RX_FDEQ_GAIN_8
-205    0x7C80    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-WB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0036    //TX_PATCH_REG
-3    0x2F7F    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0800    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x0200    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x0400    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x0400    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0200    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0000    //TX_RATIO_DT_L_TH_LOW
-224    0x0000    //TX_RATIO_DT_H_TH_LOW
-225    0x0000    //TX_RATIO_DT_L_TH_HIGH
-226    0x0000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0000    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFB00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x5000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x0000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x2000    //TX_MAINREFRTOH_TH_H
-275    0x1400    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x4000    //TX_B_POST_FLT_1
-281    0x0018    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x001A    //TX_NS_LVL_CTRL_4
-286    0x001E    //TX_NS_LVL_CTRL_5
-287    0x001C    //TX_NS_LVL_CTRL_6
-288    0x001C    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0018    //TX_MIN_GAIN_S_4
-294    0x0018    //TX_MIN_GAIN_S_5
-295    0x0018    //TX_MIN_GAIN_S_6
-296    0x0018    //TX_MIN_GAIN_S_7
-297    0x5000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x5000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x4000    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7000    //TX_A_POST_FILT_S_0
-315    0x3000    //TX_A_POST_FILT_S_1
-316    0x3000    //TX_A_POST_FILT_S_2
-317    0x2000    //TX_A_POST_FILT_S_3
-318    0x7000    //TX_A_POST_FILT_S_4
-319    0x7000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x5000    //TX_B_POST_FILT_6
-329    0x4000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C29    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0600    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x0139    //TX_NOISE_TH_1
-371    0x0479    //TX_NOISE_TH_2
-372    0x2328    //TX_NOISE_TH_3
-373    0x4422    //TX_NOISE_TH_4
-374    0x5586    //TX_NOISE_TH_5
-375    0x4425    //TX_NOISE_TH_5_2
-376    0x0032    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x21E8    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0500    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4900    //TX_MIN_G_CTRL_SSNS
-409    0x1000    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x05A8    //TX_SB_RHO_MEAN2_TH
-441    0x0384    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0280    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0200    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x473F    //TX_FDEQ_GAIN_4
-572    0x4245    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x564A    //TX_FDEQ_GAIN_7
-575    0x3D3A    //TX_FDEQ_GAIN_8
-576    0x3838    //TX_FDEQ_GAIN_9
-577    0x3836    //TX_FDEQ_GAIN_10
-578    0x3633    //TX_FDEQ_GAIN_11
-579    0x3838    //TX_FDEQ_GAIN_12
-580    0x4048    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0F0F    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x0611    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
-644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
-645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
-646    0x0F09    //TX_PREEQ_BIN_MIC0_5
-647    0x0909    //TX_PREEQ_BIN_MIC0_6
-648    0x0908    //TX_PREEQ_BIN_MIC0_7
-649    0x0700    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x484A    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5454    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0F10    //TX_PREEQ_BIN_MIC1_10
-701    0x1011    //TX_PREEQ_BIN_MIC1_11
-702    0x1104    //TX_PREEQ_BIN_MIC1_12
-703    0x101B    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0005    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x199A    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x2000    //TX_B_LESSCUT_RTO_MASK
-877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2329    //TX_SENDFUNC_REG_MICMUTE
-898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000A    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x5DC0    //TX_DTD_THR1_MICMUTE_0
-912    0x639C    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x2000    //TX_DTD_THR2_MICMUTE_0
-916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x3E80    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x05A0    //TX_AMS_RESRV_01
-944    0xFFFF    //TX_AMS_RESRV_02
-945    0x1B58    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x243C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0480    //RX_PGA
-11    0x7B02    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x1000    //RX_LMT_THRD
-37    0x7FDF    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4840    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4659    //RX_FDEQ_GAIN_2
-42    0x6474    //RX_FDEQ_GAIN_3
-43    0x7A82    //RX_FDEQ_GAIN_4
-44    0x8180    //RX_FDEQ_GAIN_5
-45    0x8084    //RX_FDEQ_GAIN_6
-46    0x8A88    //RX_FDEQ_GAIN_7
-47    0x8C8C    //RX_FDEQ_GAIN_8
-48    0x8A95    //RX_FDEQ_GAIN_9
-49    0x978E    //RX_FDEQ_GAIN_10
-50    0x8C8C    //RX_FDEQ_GAIN_11
-51    0x7068    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04E6    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1450    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0700    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0504    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0531    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0531    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0032    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04E6    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04E6    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x007F    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04BC    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x3C3C    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x4856    //RX_FDEQ_GAIN_2
-42    0x687E    //RX_FDEQ_GAIN_3
-43    0x8E9A    //RX_FDEQ_GAIN_4
-44    0x9C96    //RX_FDEQ_GAIN_5
-45    0x908E    //RX_FDEQ_GAIN_6
-46    0x9296    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0xA4B4    //RX_FDEQ_GAIN_9
-49    0xA298    //RX_FDEQ_GAIN_10
-50    0x848C    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D16    //RX_FDEQ_BIN_9
-73    0x0A07    //RX_FDEQ_BIN_10
-74    0x130E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x1000    //RX_LMT_THRD
-194    0x7FDF    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001E    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0031    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0050    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0086    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4659    //RX_FDEQ_GAIN_2
-199    0x6474    //RX_FDEQ_GAIN_3
-200    0x7A82    //RX_FDEQ_GAIN_4
-201    0x8180    //RX_FDEQ_GAIN_5
-202    0x8084    //RX_FDEQ_GAIN_6
-203    0x8A88    //RX_FDEQ_GAIN_7
-204    0x8C8C    //RX_FDEQ_GAIN_8
-205    0x8A95    //RX_FDEQ_GAIN_9
-206    0x978E    //RX_FDEQ_GAIN_10
-207    0x8C8C    //RX_FDEQ_GAIN_11
-208    0x7068    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F0E    //RX_FDEQ_BIN_11
-232    0x100D    //RX_FDEQ_BIN_12
-233    0x110A    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F7F    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x01C0    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7530    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x002C    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x2000    //TX_SNRI_SUP_1
-302    0x2000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x3000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x5000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x01F4    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2134    //TX_NOISE_TH_3
-373    0x6978    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x07D0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x03E8    //TX_SB_RHO_MEAN2_TH
-441    0x03E8    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C50    //TX_FDEQ_GAIN_0
-568    0x4A47    //TX_FDEQ_GAIN_1
-569    0x4847    //TX_FDEQ_GAIN_2
-570    0x4448    //TX_FDEQ_GAIN_3
-571    0x4244    //TX_FDEQ_GAIN_4
-572    0x444C    //TX_FDEQ_GAIN_5
-573    0x5455    //TX_FDEQ_GAIN_6
-574    0x5844    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4A49    //TX_FDEQ_GAIN_10
-578    0x4642    //TX_FDEQ_GAIN_11
-579    0x4432    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x3C54    //TX_FDEQ_GAIN_14
-582    0x5270    //TX_FDEQ_GAIN_15
-583    0x4858    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x0C06    //TX_FDEQ_BIN_7
-599    0x0C0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0E0D    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x111B    //TX_FDEQ_BIN_12
-604    0x291E    //TX_FDEQ_BIN_13
-605    0x1E10    //TX_FDEQ_BIN_14
-606    0x1810    //TX_FDEQ_BIN_15
-607    0x1021    //TX_FDEQ_BIN_16
-608    0x1000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
-644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
-645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
-646    0x0F09    //TX_PREEQ_BIN_MIC0_5
-647    0x0909    //TX_PREEQ_BIN_MIC0_6
-648    0x0908    //TX_PREEQ_BIN_MIC0_7
-649    0x070F    //TX_PREEQ_BIN_MIC0_8
-650    0x1F08    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0920    //TX_PREEQ_BIN_MIC0_11
-653    0x2020    //TX_PREEQ_BIN_MIC0_12
-654    0x2021    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4849    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
-675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5354    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x5653    //TX_PREEQ_GAIN_MIC1_14
-681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
-682    0x4444    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0005    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2329    //TX_SENDFUNC_REG_MICMUTE
-898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03E8    //TX_MICMUTE_RATIO_THR
-900    0x01A4    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x2000    //TX_DTD_THR2_MICMUTE_0
-916    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x3E80    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x05A0    //TX_AMS_RESRV_01
-944    0x3800    //TX_AMS_RESRV_02
-945    0x4268    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x243C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x05AA    //RX_PGA
-11    0x7D83    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x5064    //RX_FDEQ_GAIN_3
-43    0x7076    //RX_FDEQ_GAIN_4
-44    0x897A    //RX_FDEQ_GAIN_5
-45    0x7C80    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x96A4    //RX_FDEQ_GAIN_9
-49    0xA9A0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D80    //RX_FDEQ_GAIN_14
-54    0x8890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0551    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1450    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0850    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0047    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0076    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4C4C    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5868    //RX_FDEQ_GAIN_2
-42    0x7286    //RX_FDEQ_GAIN_3
-43    0x9AB0    //RX_FDEQ_GAIN_4
-44    0xB4A8    //RX_FDEQ_GAIN_5
-45    0x9C9C    //RX_FDEQ_GAIN_6
-46    0xA8AC    //RX_FDEQ_GAIN_7
-47    0xACB9    //RX_FDEQ_GAIN_8
-48    0xBDC6    //RX_FDEQ_GAIN_9
-49    0xC4AC    //RX_FDEQ_GAIN_10
-50    0x988F    //RX_FDEQ_GAIN_11
-51    0x8478    //RX_FDEQ_GAIN_12
-52    0x7878    //RX_FDEQ_GAIN_13
-53    0x6880    //RX_FDEQ_GAIN_14
-54    0x7C94    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0F    //RX_FDEQ_BIN_9
-73    0x0E0D    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x1427    //RX_FDEQ_BIN_13
-77    0x1E38    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x05AA    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0010    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0032    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0047    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0076    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6B7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0007    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x051E    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x7FFF    //TX_GSC_RTOL_TH
-522    0x7FFF    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x4C4A    //TX_FDEQ_GAIN_0
-568    0x4B4F    //TX_FDEQ_GAIN_1
-569    0x504B    //TX_FDEQ_GAIN_2
-570    0x4A4C    //TX_FDEQ_GAIN_3
-571    0x4A49    //TX_FDEQ_GAIN_4
-572    0x4F48    //TX_FDEQ_GAIN_5
-573    0x4A4E    //TX_FDEQ_GAIN_6
-574    0x534E    //TX_FDEQ_GAIN_7
-575    0x494F    //TX_FDEQ_GAIN_8
-576    0x5E6E    //TX_FDEQ_GAIN_9
-577    0x787A    //TX_FDEQ_GAIN_10
-578    0x6A58    //TX_FDEQ_GAIN_11
-579    0x5051    //TX_FDEQ_GAIN_12
-580    0x5156    //TX_FDEQ_GAIN_13
-581    0x6168    //TX_FDEQ_GAIN_14
-582    0x7678    //TX_FDEQ_GAIN_15
-583    0x7A87    //TX_FDEQ_GAIN_16
-584    0x9898    //TX_FDEQ_GAIN_17
-585    0x9898    //TX_FDEQ_GAIN_18
-586    0x9848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0F03    //TX_FDEQ_BIN_0
-592    0x0909    //TX_FDEQ_BIN_1
-593    0x080F    //TX_FDEQ_BIN_2
-594    0x0609    //TX_FDEQ_BIN_3
-595    0x0F03    //TX_FDEQ_BIN_4
-596    0x1402    //TX_FDEQ_BIN_5
-597    0x0E13    //TX_FDEQ_BIN_6
-598    0x110F    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x0E0F    //TX_FDEQ_BIN_9
-601    0x080D    //TX_FDEQ_BIN_10
-602    0x0F0F    //TX_FDEQ_BIN_11
-603    0x0F0F    //TX_FDEQ_BIN_12
-604    0x0A0F    //TX_FDEQ_BIN_13
-605    0x0809    //TX_FDEQ_BIN_14
-606    0x0A0B    //TX_FDEQ_BIN_15
-607    0x0C0D    //TX_FDEQ_BIN_16
-608    0x0E0F    //TX_FDEQ_BIN_17
-609    0x1013    //TX_FDEQ_BIN_18
-610    0x0A00    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x1812    //TX_PREEQ_BIN_MIC0_0
-642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x080A    //TX_PREEQ_BIN_MIC0_3
-645    0x0B09    //TX_PREEQ_BIN_MIC0_4
-646    0x0A06    //TX_PREEQ_BIN_MIC0_5
-647    0x0606    //TX_PREEQ_BIN_MIC0_6
-648    0x0605    //TX_PREEQ_BIN_MIC0_7
-649    0x050A    //TX_PREEQ_BIN_MIC0_8
-650    0x1505    //TX_PREEQ_BIN_MIC0_9
-651    0x0506    //TX_PREEQ_BIN_MIC0_10
-652    0x0615    //TX_PREEQ_BIN_MIC0_11
-653    0x1516    //TX_PREEQ_BIN_MIC0_12
-654    0x2021    //TX_PREEQ_BIN_MIC0_13
-655    0x2021    //TX_PREEQ_BIN_MIC0_14
-656    0x2021    //TX_PREEQ_BIN_MIC0_15
-657    0x0800    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
-673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
-674    0x5456    //TX_PREEQ_GAIN_MIC1_8
-675    0x585C    //TX_PREEQ_GAIN_MIC1_9
-676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
-677    0x7478    //TX_PREEQ_GAIN_MIC1_11
-678    0x705C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4838    //TX_PREEQ_GAIN_MIC1_13
-680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x0909    //TX_PREEQ_BIN_MIC1_7
-698    0x090B    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x1414    //TX_PREEQ_BIN_MIC1_12
-703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
-704    0x1E28    //TX_PREEQ_BIN_MIC1_14
-705    0x462C    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0722    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1964    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0016    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0024    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0059    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0090    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02FD    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E4E    //RX_FDEQ_GAIN_0
-40    0x4E56    //RX_FDEQ_GAIN_1
-41    0x6878    //RX_FDEQ_GAIN_2
-42    0x8088    //RX_FDEQ_GAIN_3
-43    0x848B    //RX_FDEQ_GAIN_4
-44    0x8F8E    //RX_FDEQ_GAIN_5
-45    0x9494    //RX_FDEQ_GAIN_6
-46    0x96A0    //RX_FDEQ_GAIN_7
-47    0xB8A0    //RX_FDEQ_GAIN_8
-48    0xA99D    //RX_FDEQ_GAIN_9
-49    0x9D6A    //RX_FDEQ_GAIN_10
-50    0x626B    //RX_FDEQ_GAIN_11
-51    0x6C78    //RX_FDEQ_GAIN_12
-52    0x7884    //RX_FDEQ_GAIN_13
-53    0x9098    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x002C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0722    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x1964    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0016    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0024    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x003A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0059    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0090    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x02FD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E4E    //RX_FDEQ_GAIN_0
-197    0x4E56    //RX_FDEQ_GAIN_1
-198    0x6878    //RX_FDEQ_GAIN_2
-199    0x8088    //RX_FDEQ_GAIN_3
-200    0x848B    //RX_FDEQ_GAIN_4
-201    0x8F8E    //RX_FDEQ_GAIN_5
-202    0x9494    //RX_FDEQ_GAIN_6
-203    0x96A0    //RX_FDEQ_GAIN_7
-204    0xB8A0    //RX_FDEQ_GAIN_8
-205    0xA99D    //RX_FDEQ_GAIN_9
-206    0x9D6A    //RX_FDEQ_GAIN_10
-207    0x626B    //RX_FDEQ_GAIN_11
-208    0x6C78    //RX_FDEQ_GAIN_12
-209    0x7884    //RX_FDEQ_GAIN_13
-210    0x9098    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -40229,7 +50909,7 @@
 168    0x4000    //TX_GAIN_NP
 169    0x0280    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -40255,7 +50935,7 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
+197    0x6D60    //TX_DTD_THR1_0
 198    0x7B00    //TX_DTD_THR1_1
 199    0x7B00    //TX_DTD_THR1_2
 200    0x7B00    //TX_DTD_THR1_3
@@ -40874,8 +51554,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -40924,7 +51604,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x05F5    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -40958,19 +51638,19 @@
 897    0x2329    //TX_SENDFUNC_REG_MICMUTE
 898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x00A0    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x0212    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0012    //TX_MICMUTE_CVG_TIME
+903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
 906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x6E00    //TX_MICMUTE_EAD_THR
+908    0x7FF6    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7530    //TX_DTD_THR1_MICMUTE_1
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7B0C    //TX_DTD_THR1_MICMUTE_0
+912    0x7EB8    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x2000    //TX_DTD_THR2_MICMUTE_0
@@ -40980,11 +51660,11 @@
 919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
 920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x01D0    //TX_MICMUTE_DT2_HOLD_N
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -41002,8 +51682,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x05A0    //TX_AMS_RESRV_01
-944    0x3C50    //TX_AMS_RESRV_02
-945    0x5DC0    //TX_AMS_RESRV_03
+944    0x36B0    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -41202,18 +51882,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41237,7 +51917,7 @@
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
 72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+73    0x2500    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41275,7 +51955,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -41301,18 +51981,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41336,7 +52016,7 @@
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
 72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+73    0x2500    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41374,7 +52054,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -41400,18 +52080,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41435,7 +52115,7 @@
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
 72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+73    0x2500    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41473,7 +52153,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -41499,18 +52179,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41534,7 +52214,7 @@
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
 72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+73    0x2500    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41572,7 +52252,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -41598,18 +52278,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41633,7 +52313,7 @@
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
 72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+73    0x2500    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41671,7 +52351,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -41697,18 +52377,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41732,7 +52412,7 @@
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
 72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+73    0x2500    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41770,7 +52450,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -41796,18 +52476,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0015    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5854    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+45    0x585C    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
-47    0x5C5C    //RX_FDEQ_GAIN_8
-48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+47    0x6868    //RX_FDEQ_GAIN_8
+48    0x6868    //RX_FDEQ_GAIN_9
+49    0x645C    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41831,7 +52511,7 @@
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
 72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+73    0x2500    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41869,7 +52549,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0131    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
 157    0x000C    //RX_RECVFUNC_MODE_0
@@ -42725,8 +53405,8 @@
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -42897,9 +53577,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0200    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -42925,11 +53605,11 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
+197    0x6978    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
 200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
+201    0x7FFF    //TX_DTD_THR1_4
 202    0x7F00    //TX_DTD_THR1_5
 203    0x7F00    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
@@ -43544,8 +54224,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -43594,7 +54274,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0550    //TX_TDDRC_DRC_GAIN
+866    0x05A0    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -43628,19 +54308,19 @@
 897    0x2329    //TX_SENDFUNC_REG_MICMUTE
 898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x0280    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000A    //TX_MICMUTE_CVG_TIME
+903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
 906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
+908    0x7FF6    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x5DC0    //TX_DTD_THR1_MICMUTE_0
-912    0x639C    //TX_DTD_THR1_MICMUTE_1
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x2000    //TX_DTD_THR2_MICMUTE_0
@@ -43650,11 +54330,11 @@
 919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
 920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0100    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -43673,7 +54353,7 @@
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x05A0    //TX_AMS_RESRV_01
 944    0xFFFF    //TX_AMS_RESRV_02
-945    0x1B58    //TX_AMS_RESRV_03
+945    0x7530    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -43872,14 +54552,14 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -43900,8 +54580,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -43910,9 +54590,9 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+76    0x1102    //RX_FDEQ_BIN_13
+77    0x0202    //RX_FDEQ_BIN_14
+78    0x020A    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -43971,14 +54651,14 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -43999,8 +54679,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -44009,9 +54689,9 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+76    0x1102    //RX_FDEQ_BIN_13
+77    0x0202    //RX_FDEQ_BIN_14
+78    0x020A    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -44070,14 +54750,14 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -44098,8 +54778,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -44108,9 +54788,9 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+76    0x1102    //RX_FDEQ_BIN_13
+77    0x0202    //RX_FDEQ_BIN_14
+78    0x020A    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -44169,14 +54849,14 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -44197,8 +54877,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -44207,9 +54887,9 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+76    0x1102    //RX_FDEQ_BIN_13
+77    0x0202    //RX_FDEQ_BIN_14
+78    0x020A    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -44268,14 +54948,14 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -44296,8 +54976,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -44306,9 +54986,9 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+76    0x1102    //RX_FDEQ_BIN_13
+77    0x0202    //RX_FDEQ_BIN_14
+78    0x020A    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -44367,14 +55047,14 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -44395,8 +55075,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -44405,9 +55085,9 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+76    0x1102    //RX_FDEQ_BIN_13
+77    0x0202    //RX_FDEQ_BIN_14
+78    0x020A    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -44466,14 +55146,14 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
+40    0x4850    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
+44    0x5C58    //RX_FDEQ_GAIN_5
+45    0x5858    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
@@ -44494,8 +55174,8 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0402    //RX_FDEQ_BIN_2
-66    0x0505    //RX_FDEQ_BIN_3
-67    0x0505    //RX_FDEQ_BIN_4
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
 68    0x0505    //RX_FDEQ_BIN_5
 69    0x0505    //RX_FDEQ_BIN_6
 70    0x0505    //RX_FDEQ_BIN_7
@@ -44504,9 +55184,9 @@
 73    0x0E0F    //RX_FDEQ_BIN_10
 74    0x0F10    //RX_FDEQ_BIN_11
 75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
+76    0x1102    //RX_FDEQ_BIN_13
+77    0x0202    //RX_FDEQ_BIN_14
+78    0x020A    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -45395,8 +56075,8 @@
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -45548,7 +56228,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
+150    0x7500    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0400    //TX_MIN_EQ_RE_EST_0
 153    0x0400    //TX_MIN_EQ_RE_EST_1
@@ -45569,7 +56249,7 @@
 168    0x4000    //TX_GAIN_NP
 169    0x01C0    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0030    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -45595,13 +56275,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7530    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
 205    0x2000    //TX_DTD_THR2_1
 206    0x2000    //TX_DTD_THR2_2
@@ -45609,7 +56289,7 @@
 208    0x1000    //TX_DTD_THR2_4
 209    0x1000    //TX_DTD_THR2_5
 210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
+211    0x7FD0    //TX_DTD_THR3
 212    0x0177    //TX_SPK_CUT_K
 213    0x1B58    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
@@ -45698,7 +56378,7 @@
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
+300    0x1400    //TX_SNRI_SUP_0
 301    0x2000    //TX_SNRI_SUP_1
 302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
@@ -45745,8 +56425,8 @@
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
 349    0x1D4C    //TX_K_PEPPER_HF
 350    0x0400    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -45777,7 +56457,7 @@
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x6D60    //TX_RATIODTL_CUT_TH
@@ -45804,11 +56484,11 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
-410    0x07D0    //TX_NS_FP_K_METAL
+410    0x0080    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -45977,9 +56657,9 @@
 576    0x4848    //TX_FDEQ_GAIN_9
 577    0x4A49    //TX_FDEQ_GAIN_10
 578    0x4642    //TX_FDEQ_GAIN_11
-579    0x4432    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x3C54    //TX_FDEQ_GAIN_14
+579    0x382C    //TX_FDEQ_GAIN_12
+580    0x3830    //TX_FDEQ_GAIN_13
+581    0x3054    //TX_FDEQ_GAIN_14
 582    0x5270    //TX_FDEQ_GAIN_15
 583    0x4858    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
@@ -46214,8 +56894,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -46264,7 +56944,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x05F5    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -46287,7 +56967,7 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
@@ -46297,20 +56977,20 @@
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2329    //TX_SENDFUNC_REG_MICMUTE
 898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03E8    //TX_MICMUTE_RATIO_THR
-900    0x01A4    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B2    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
 906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FE2    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x2000    //TX_DTD_THR2_MICMUTE_0
@@ -46320,10 +57000,10 @@
 919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
 920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
 926    0x0064    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
@@ -46342,8 +57022,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x05A0    //TX_AMS_RESRV_01
-944    0x3800    //TX_AMS_RESRV_02
-945    0x4268    //TX_AMS_RESRV_03
+944    0x3C8C    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -46542,16 +57222,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -46583,7 +57263,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -46615,7 +57295,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -46641,16 +57321,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -46682,7 +57362,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -46714,7 +57394,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -46740,16 +57420,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -46781,7 +57461,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -46813,7 +57493,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -46839,16 +57519,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -46880,7 +57560,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -46912,7 +57592,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -46938,16 +57618,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -46979,7 +57659,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -47011,7 +57691,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -47037,16 +57717,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -47078,7 +57758,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -47110,7 +57790,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -47136,16 +57816,16 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -47177,7 +57857,7 @@
 76    0x1E1E    //RX_FDEQ_BIN_13
 77    0x1E1E    //RX_FDEQ_BIN_14
 78    0x202C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
+79    0x0A14    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
 82    0x0000    //RX_FDEQ_BIN_19
@@ -47209,7 +57889,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
 157    0x000C    //RX_RECVFUNC_MODE_0
@@ -48065,8 +58745,8 @@
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -50733,10690 +61413,10 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET-RESERVE2-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x002C    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x494D    //TX_FDEQ_GAIN_3
-571    0x4442    //TX_FDEQ_GAIN_4
-572    0x4448    //TX_FDEQ_GAIN_5
-573    0x4C53    //TX_FDEQ_GAIN_6
-574    0x6244    //TX_FDEQ_GAIN_7
-575    0x4348    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4A49    //TX_FDEQ_GAIN_10
-578    0x4E4A    //TX_FDEQ_GAIN_11
-579    0x4840    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x4054    //TX_FDEQ_GAIN_14
-582    0x687A    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0E0D    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x111B    //TX_FDEQ_BIN_12
-604    0x291E    //TX_FDEQ_BIN_13
-605    0x1E10    //TX_FDEQ_BIN_14
-606    0x1810    //TX_FDEQ_BIN_15
-607    0x1021    //TX_FDEQ_BIN_16
-608    0x1000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
-644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
-645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
-646    0x0F09    //TX_PREEQ_BIN_MIC0_5
-647    0x0909    //TX_PREEQ_BIN_MIC0_6
-648    0x0908    //TX_PREEQ_BIN_MIC0_7
-649    0x070F    //TX_PREEQ_BIN_MIC0_8
-650    0x1F08    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0920    //TX_PREEQ_BIN_MIC0_11
-653    0x2020    //TX_PREEQ_BIN_MIC0_12
-654    0x2021    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4849    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
-675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5354    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x5653    //TX_PREEQ_GAIN_MIC1_14
-681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
-682    0x4444    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0006    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0650    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x243C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x05AA    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x5064    //RX_FDEQ_GAIN_3
-43    0x7076    //RX_FDEQ_GAIN_4
-44    0x897A    //RX_FDEQ_GAIN_5
-45    0x7C80    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x96A4    //RX_FDEQ_GAIN_9
-49    0xA9A0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D80    //RX_FDEQ_GAIN_14
-54    0x8890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0551    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1450    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0850    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x869A    //RX_FDEQ_GAIN_4
-44    0x9A98    //RX_FDEQ_GAIN_5
-45    0x8C90    //RX_FDEQ_GAIN_6
-46    0x948C    //RX_FDEQ_GAIN_7
-47    0x9EA6    //RX_FDEQ_GAIN_8
-48    0xA0B0    //RX_FDEQ_GAIN_9
-49    0xC2C2    //RX_FDEQ_GAIN_10
-50    0x998D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6468    //RX_FDEQ_GAIN_13
-53    0x707C    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x869A    //RX_FDEQ_GAIN_4
-44    0x9A98    //RX_FDEQ_GAIN_5
-45    0x8C90    //RX_FDEQ_GAIN_6
-46    0x948C    //RX_FDEQ_GAIN_7
-47    0x9EA6    //RX_FDEQ_GAIN_8
-48    0xA0B0    //RX_FDEQ_GAIN_9
-49    0xC2C2    //RX_FDEQ_GAIN_10
-50    0x998D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6468    //RX_FDEQ_GAIN_13
-53    0x707C    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x869A    //RX_FDEQ_GAIN_4
-44    0x9A98    //RX_FDEQ_GAIN_5
-45    0x8C90    //RX_FDEQ_GAIN_6
-46    0x948C    //RX_FDEQ_GAIN_7
-47    0x9EA6    //RX_FDEQ_GAIN_8
-48    0xA0B0    //RX_FDEQ_GAIN_9
-49    0xC2C2    //RX_FDEQ_GAIN_10
-50    0x998D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6468    //RX_FDEQ_GAIN_13
-53    0x707C    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x869A    //RX_FDEQ_GAIN_4
-44    0x9A98    //RX_FDEQ_GAIN_5
-45    0x8C90    //RX_FDEQ_GAIN_6
-46    0x948C    //RX_FDEQ_GAIN_7
-47    0x9EA6    //RX_FDEQ_GAIN_8
-48    0xA0B0    //RX_FDEQ_GAIN_9
-49    0xC2C2    //RX_FDEQ_GAIN_10
-50    0x998D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6468    //RX_FDEQ_GAIN_13
-53    0x707C    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x869A    //RX_FDEQ_GAIN_4
-44    0x9A98    //RX_FDEQ_GAIN_5
-45    0x8C90    //RX_FDEQ_GAIN_6
-46    0x948C    //RX_FDEQ_GAIN_7
-47    0x9EA6    //RX_FDEQ_GAIN_8
-48    0xA0B0    //RX_FDEQ_GAIN_9
-49    0xC2C2    //RX_FDEQ_GAIN_10
-50    0x998D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6468    //RX_FDEQ_GAIN_13
-53    0x707C    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0047    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x869A    //RX_FDEQ_GAIN_4
-44    0x9A98    //RX_FDEQ_GAIN_5
-45    0x8C90    //RX_FDEQ_GAIN_6
-46    0x948C    //RX_FDEQ_GAIN_7
-47    0x9EA6    //RX_FDEQ_GAIN_8
-48    0xA0B0    //RX_FDEQ_GAIN_9
-49    0xC2C2    //RX_FDEQ_GAIN_10
-50    0x998D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6468    //RX_FDEQ_GAIN_13
-53    0x707C    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0076    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x05A0    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x869A    //RX_FDEQ_GAIN_4
-44    0x9A98    //RX_FDEQ_GAIN_5
-45    0x8C90    //RX_FDEQ_GAIN_6
-46    0x948C    //RX_FDEQ_GAIN_7
-47    0x9EA6    //RX_FDEQ_GAIN_8
-48    0xA0B0    //RX_FDEQ_GAIN_9
-49    0xC2C2    //RX_FDEQ_GAIN_10
-50    0x998D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6468    //RX_FDEQ_GAIN_13
-53    0x707C    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x05AA    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0010    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0032    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0047    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0076    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-CUSTOM1-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F76    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x00A3    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x002C    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x494D    //TX_FDEQ_GAIN_3
-571    0x4442    //TX_FDEQ_GAIN_4
-572    0x4448    //TX_FDEQ_GAIN_5
-573    0x4C53    //TX_FDEQ_GAIN_6
-574    0x6244    //TX_FDEQ_GAIN_7
-575    0x4348    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4A49    //TX_FDEQ_GAIN_10
-578    0x4E4A    //TX_FDEQ_GAIN_11
-579    0x4840    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x4054    //TX_FDEQ_GAIN_14
-582    0x687A    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0E0D    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x111B    //TX_FDEQ_BIN_12
-604    0x291E    //TX_FDEQ_BIN_13
-605    0x1E10    //TX_FDEQ_BIN_14
-606    0x1810    //TX_FDEQ_BIN_15
-607    0x1021    //TX_FDEQ_BIN_16
-608    0x1000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
-644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
-645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
-646    0x0F09    //TX_PREEQ_BIN_MIC0_5
-647    0x0909    //TX_PREEQ_BIN_MIC0_6
-648    0x0908    //TX_PREEQ_BIN_MIC0_7
-649    0x070F    //TX_PREEQ_BIN_MIC0_8
-650    0x1F08    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0920    //TX_PREEQ_BIN_MIC0_11
-653    0x2020    //TX_PREEQ_BIN_MIC0_12
-654    0x2021    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x494A    //TX_PREEQ_GAIN_MIC1_6
-673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
-674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
-675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
-676    0x5355    //TX_PREEQ_GAIN_MIC1_10
-677    0x585C    //TX_PREEQ_GAIN_MIC1_11
-678    0x616A    //TX_PREEQ_GAIN_MIC1_12
-679    0x726E    //TX_PREEQ_GAIN_MIC1_13
-680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
-681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1719    //TX_PREEQ_BIN_MIC1_11
-702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
-704    0x1E28    //TX_PREEQ_BIN_MIC1_14
-705    0x3042    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0006    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0650    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x203C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x05AA    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x5064    //RX_FDEQ_GAIN_3
-43    0x7076    //RX_FDEQ_GAIN_4
-44    0x897A    //RX_FDEQ_GAIN_5
-45    0x7C80    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x96A4    //RX_FDEQ_GAIN_9
-49    0xA9A0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D80    //RX_FDEQ_GAIN_14
-54    0x8890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0551    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0047    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0076    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x05AA    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0010    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0032    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0047    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0076    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-CUSTOM2-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F5E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x00A3    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x002C    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x494D    //TX_FDEQ_GAIN_3
-571    0x4442    //TX_FDEQ_GAIN_4
-572    0x4448    //TX_FDEQ_GAIN_5
-573    0x4C53    //TX_FDEQ_GAIN_6
-574    0x6244    //TX_FDEQ_GAIN_7
-575    0x4348    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4A49    //TX_FDEQ_GAIN_10
-578    0x4E4A    //TX_FDEQ_GAIN_11
-579    0x4840    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x4054    //TX_FDEQ_GAIN_14
-582    0x687A    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0E0D    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x111B    //TX_FDEQ_BIN_12
-604    0x291E    //TX_FDEQ_BIN_13
-605    0x1E10    //TX_FDEQ_BIN_14
-606    0x1810    //TX_FDEQ_BIN_15
-607    0x1021    //TX_FDEQ_BIN_16
-608    0x1000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
-644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
-645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
-646    0x0F09    //TX_PREEQ_BIN_MIC0_5
-647    0x0909    //TX_PREEQ_BIN_MIC0_6
-648    0x0908    //TX_PREEQ_BIN_MIC0_7
-649    0x070F    //TX_PREEQ_BIN_MIC0_8
-650    0x1F08    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0920    //TX_PREEQ_BIN_MIC0_11
-653    0x2020    //TX_PREEQ_BIN_MIC0_12
-654    0x2021    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x494A    //TX_PREEQ_GAIN_MIC1_6
-673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
-674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
-675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
-676    0x5355    //TX_PREEQ_GAIN_MIC1_10
-677    0x585C    //TX_PREEQ_GAIN_MIC1_11
-678    0x616A    //TX_PREEQ_GAIN_MIC1_12
-679    0x726E    //TX_PREEQ_GAIN_MIC1_13
-680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
-681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1719    //TX_PREEQ_BIN_MIC1_11
-702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
-704    0x1E28    //TX_PREEQ_BIN_MIC1_14
-705    0x3042    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0006    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0650    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x203C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x05AA    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x5064    //RX_FDEQ_GAIN_3
-43    0x7076    //RX_FDEQ_GAIN_4
-44    0x897A    //RX_FDEQ_GAIN_5
-45    0x7C80    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x96A4    //RX_FDEQ_GAIN_9
-49    0xA9A0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D80    //RX_FDEQ_GAIN_14
-54    0x8890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0551    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0047    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0076    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x05AA    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0010    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0032    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0047    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0076    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-RESERVE1-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F56    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x00A3    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x002C    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x494D    //TX_FDEQ_GAIN_3
-571    0x4442    //TX_FDEQ_GAIN_4
-572    0x4448    //TX_FDEQ_GAIN_5
-573    0x4C53    //TX_FDEQ_GAIN_6
-574    0x6244    //TX_FDEQ_GAIN_7
-575    0x4348    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4A49    //TX_FDEQ_GAIN_10
-578    0x4E4A    //TX_FDEQ_GAIN_11
-579    0x4840    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x4054    //TX_FDEQ_GAIN_14
-582    0x687A    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0E0D    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x111B    //TX_FDEQ_BIN_12
-604    0x291E    //TX_FDEQ_BIN_13
-605    0x1E10    //TX_FDEQ_BIN_14
-606    0x1810    //TX_FDEQ_BIN_15
-607    0x1021    //TX_FDEQ_BIN_16
-608    0x1000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x251A    //TX_PREEQ_BIN_MIC0_0
-642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
-643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
-644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
-645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
-646    0x0F09    //TX_PREEQ_BIN_MIC0_5
-647    0x0909    //TX_PREEQ_BIN_MIC0_6
-648    0x0908    //TX_PREEQ_BIN_MIC0_7
-649    0x070F    //TX_PREEQ_BIN_MIC0_8
-650    0x1F08    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0920    //TX_PREEQ_BIN_MIC0_11
-653    0x2020    //TX_PREEQ_BIN_MIC0_12
-654    0x2021    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x494A    //TX_PREEQ_GAIN_MIC1_6
-673    0x4B4C    //TX_PREEQ_GAIN_MIC1_7
-674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
-675    0x4F52    //TX_PREEQ_GAIN_MIC1_9
-676    0x5355    //TX_PREEQ_GAIN_MIC1_10
-677    0x585C    //TX_PREEQ_GAIN_MIC1_11
-678    0x616A    //TX_PREEQ_GAIN_MIC1_12
-679    0x726E    //TX_PREEQ_GAIN_MIC1_13
-680    0x5C48    //TX_PREEQ_GAIN_MIC1_14
-681    0x3B38    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1719    //TX_PREEQ_BIN_MIC1_11
-702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
-704    0x1E28    //TX_PREEQ_BIN_MIC1_14
-705    0x3042    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0006    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0650    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x203C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x05AA    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x5064    //RX_FDEQ_GAIN_3
-43    0x7076    //RX_FDEQ_GAIN_4
-44    0x897A    //RX_FDEQ_GAIN_5
-45    0x7C80    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x96A4    //RX_FDEQ_GAIN_9
-49    0xA9A0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D80    //RX_FDEQ_GAIN_14
-54    0x8890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0551    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0047    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0076    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x056F    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x8496    //RX_FDEQ_GAIN_4
-44    0x968E    //RX_FDEQ_GAIN_5
-45    0x8488    //RX_FDEQ_GAIN_6
-46    0x8884    //RX_FDEQ_GAIN_7
-47    0x9CA4    //RX_FDEQ_GAIN_8
-48    0x98A8    //RX_FDEQ_GAIN_9
-49    0xBEB8    //RX_FDEQ_GAIN_10
-50    0x918D    //RX_FDEQ_GAIN_11
-51    0x7566    //RX_FDEQ_GAIN_12
-52    0x6460    //RX_FDEQ_GAIN_13
-53    0x6174    //RX_FDEQ_GAIN_14
-54    0x7890    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D09    //RX_FDEQ_BIN_9
-73    0x0819    //RX_FDEQ_BIN_10
-74    0x1E19    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x05AA    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0010    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0032    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0047    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0076    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0551    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x483E    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x3E4C    //RX_FDEQ_GAIN_2
-199    0x5064    //RX_FDEQ_GAIN_3
-200    0x7076    //RX_FDEQ_GAIN_4
-201    0x897A    //RX_FDEQ_GAIN_5
-202    0x7C80    //RX_FDEQ_GAIN_6
-203    0x8888    //RX_FDEQ_GAIN_7
-204    0x949C    //RX_FDEQ_GAIN_8
-205    0x96A4    //RX_FDEQ_GAIN_9
-206    0xA9A0    //RX_FDEQ_GAIN_10
-207    0x9487    //RX_FDEQ_GAIN_11
-208    0x6F64    //RX_FDEQ_GAIN_12
-209    0x625A    //RX_FDEQ_GAIN_13
-210    0x5D80    //RX_FDEQ_GAIN_14
-211    0x8890    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0301    //RX_FDEQ_BIN_2
-223    0x0404    //RX_FDEQ_BIN_3
-224    0x0406    //RX_FDEQ_BIN_4
-225    0x0109    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B0F    //RX_FDEQ_BIN_12
-233    0x141E    //RX_FDEQ_BIN_13
-234    0x3728    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
 #CASE_NAME  HANDSET-HANDSET_HAC-RESERVE2-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -61568,7 +61568,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
+150    0x7500    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0400    //TX_MIN_EQ_RE_EST_0
 153    0x0400    //TX_MIN_EQ_RE_EST_1
@@ -61589,7 +61589,7 @@
 168    0x4000    //TX_GAIN_NP
 169    0x01C0    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0030    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -61615,13 +61615,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7530    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
+197    0x7B0C    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
 205    0x2000    //TX_DTD_THR2_1
 206    0x2000    //TX_DTD_THR2_2
@@ -61629,7 +61629,7 @@
 208    0x1000    //TX_DTD_THR2_4
 209    0x1000    //TX_DTD_THR2_5
 210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
+211    0x7FD0    //TX_DTD_THR3
 212    0x0177    //TX_SPK_CUT_K
 213    0x1B58    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
@@ -61718,7 +61718,7 @@
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
+300    0x1400    //TX_SNRI_SUP_0
 301    0x2000    //TX_SNRI_SUP_1
 302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
@@ -61765,8 +61765,8 @@
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
 349    0x1D4C    //TX_K_PEPPER_HF
 350    0x0400    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -61797,7 +61797,7 @@
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x6D60    //TX_RATIODTL_CUT_TH
@@ -61824,11 +61824,11 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
-410    0x07D0    //TX_NS_FP_K_METAL
+410    0x0080    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -61997,9 +61997,9 @@
 576    0x4848    //TX_FDEQ_GAIN_9
 577    0x4A49    //TX_FDEQ_GAIN_10
 578    0x4642    //TX_FDEQ_GAIN_11
-579    0x4432    //TX_FDEQ_GAIN_12
-580    0x4040    //TX_FDEQ_GAIN_13
-581    0x3C54    //TX_FDEQ_GAIN_14
+579    0x382C    //TX_FDEQ_GAIN_12
+580    0x3830    //TX_FDEQ_GAIN_13
+581    0x3054    //TX_FDEQ_GAIN_14
 582    0x5270    //TX_FDEQ_GAIN_15
 583    0x4858    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
@@ -62234,8 +62234,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -62284,7 +62284,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x05F5    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -62307,7 +62307,7 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
@@ -62317,20 +62317,20 @@
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2329    //TX_SENDFUNC_REG_MICMUTE
 898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03E8    //TX_MICMUTE_RATIO_THR
-900    0x01A4    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B2    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
 906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x0028    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x3000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7F00    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FE2    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x2000    //TX_DTD_THR2_MICMUTE_0
@@ -62340,10 +62340,10 @@
 919    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_3
 920    0x2000    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x7FFF    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
 926    0x0064    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
@@ -62362,8 +62362,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x05A0    //TX_AMS_RESRV_01
-944    0x3800    //TX_AMS_RESRV_02
-945    0x4268    //TX_AMS_RESRV_03
+944    0x3C8C    //TX_AMS_RESRV_02
+945    0x7FFF    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -62564,14 +62564,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -62635,7 +62635,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -62663,14 +62663,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -62734,7 +62734,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -62762,14 +62762,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -62833,7 +62833,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -62861,14 +62861,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -62932,7 +62932,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -62960,14 +62960,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -63031,7 +63031,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -63059,14 +63059,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -63130,7 +63130,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -63158,14 +63158,14 @@
 124    0x01E0    //RX_TDDRC_DRC_GAIN
 38    0x0022    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
-44    0x5254    //RX_FDEQ_GAIN_5
-45    0x5658    //RX_FDEQ_GAIN_6
-46    0x5C60    //RX_FDEQ_GAIN_7
-47    0x6468    //RX_FDEQ_GAIN_8
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x5450    //RX_FDEQ_GAIN_4
+44    0x525C    //RX_FDEQ_GAIN_5
+45    0x5C60    //RX_FDEQ_GAIN_6
+46    0x6464    //RX_FDEQ_GAIN_7
+47    0x6868    //RX_FDEQ_GAIN_8
 48    0x6C70    //RX_FDEQ_GAIN_9
 49    0x7474    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
@@ -63229,7 +63229,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0120    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
 157    0x000C    //RX_RECVFUNC_MODE_0
diff --git a/audio/lynx/tuning/fortemedia/HANDSFREE.dat b/audio/lynx/tuning/fortemedia/HANDSFREE.dat
index d2e1cbb..535d5b1 100644
Binary files a/audio/lynx/tuning/fortemedia/HANDSFREE.dat and b/audio/lynx/tuning/fortemedia/HANDSFREE.dat differ
diff --git a/audio/lynx/tuning/fortemedia/HANDSFREE.mods b/audio/lynx/tuning/fortemedia/HANDSFREE.mods
index 4129a55..11706f4 100644
--- a/audio/lynx/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/lynx/tuning/fortemedia/HANDSFREE.mods
@@ -1,8017 +1,7 @@
 #PLATFORM_NAME  gChip
 #EXPORT_FLAG  HANDSFREE
 #SINGLE_API_VER  1.2.1
-#SAVE_TIME  2022-07-29 15:48:32
-
-#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE1-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6B54    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A19    //TX_PGA_0
-28    0x0A19    //TX_PGA_1
-29    0x0A19    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x2000    //TX_MIN_EQ_RE_EST_1
-154    0x2000    //TX_MIN_EQ_RE_EST_2
-155    0x4000    //TX_MIN_EQ_RE_EST_3
-156    0x4000    //TX_MIN_EQ_RE_EST_4
-157    0x7FFF    //TX_MIN_EQ_RE_EST_5
-158    0x7FFF    //TX_MIN_EQ_RE_EST_6
-159    0x7FFF    //TX_MIN_EQ_RE_EST_7
-160    0x7FFF    //TX_MIN_EQ_RE_EST_8
-161    0x7FFF    //TX_MIN_EQ_RE_EST_9
-162    0x7FFF    //TX_MIN_EQ_RE_EST_10
-163    0x7FFF    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0CCD    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x09C4    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0DAC    //TX_DT_CUT_K
-214    0x0020    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1F40    //TX_DT_BINVAD_ENDF
-358    0x0100    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x59D8    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x2710    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x7999    //TX_RATIODTL_CUT_TH
-383    0x0119    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x4000    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x737B    //TX_FDEQ_GAIN_11
-579    0x7B9A    //TX_FDEQ_GAIN_12
-580    0x9AC4    //TX_FDEQ_GAIN_13
-581    0xC4C4    //TX_FDEQ_GAIN_14
-582    0xC4C4    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x484B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x484C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4C    //TX_PREEQ_GAIN_MIC0_11
-629    0x4038    //TX_PREEQ_GAIN_MIC0_12
-630    0x3838    //TX_PREEQ_GAIN_MIC0_13
-631    0x4840    //TX_PREEQ_GAIN_MIC0_14
-632    0x3848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0004    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0016    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0FDA    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x006C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x065B    //RX_PGA
-11    0x7E56    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF400    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x006C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-167    0x065B    //RX_PGA
-168    0x7E56    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF400    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x00C8    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0025    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM2-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6B5C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A19    //TX_PGA_0
-28    0x0A19    //TX_PGA_1
-29    0x0A19    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x2000    //TX_MIN_EQ_RE_EST_1
-154    0x2000    //TX_MIN_EQ_RE_EST_2
-155    0x4000    //TX_MIN_EQ_RE_EST_3
-156    0x4000    //TX_MIN_EQ_RE_EST_4
-157    0x7FFF    //TX_MIN_EQ_RE_EST_5
-158    0x7FFF    //TX_MIN_EQ_RE_EST_6
-159    0x7FFF    //TX_MIN_EQ_RE_EST_7
-160    0x7FFF    //TX_MIN_EQ_RE_EST_8
-161    0x7FFF    //TX_MIN_EQ_RE_EST_9
-162    0x7FFF    //TX_MIN_EQ_RE_EST_10
-163    0x7FFF    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0CCD    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x09C4    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0DAC    //TX_DT_CUT_K
-214    0x0020    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1F40    //TX_DT_BINVAD_ENDF
-358    0x0100    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x59D8    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x2710    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x7999    //TX_RATIODTL_CUT_TH
-383    0x0119    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x4000    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x737B    //TX_FDEQ_GAIN_11
-579    0x7B9A    //TX_FDEQ_GAIN_12
-580    0x9AC4    //TX_FDEQ_GAIN_13
-581    0xC4C4    //TX_FDEQ_GAIN_14
-582    0xC4C4    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4849    //TX_PREEQ_GAIN_MIC0_6
-624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4838    //TX_PREEQ_GAIN_MIC0_12
-630    0x3858    //TX_PREEQ_GAIN_MIC0_13
-631    0x7060    //TX_PREEQ_GAIN_MIC0_14
-632    0x9870    //TX_PREEQ_GAIN_MIC0_15
-633    0x5848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0004    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0016    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0FDA    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x006C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x065B    //RX_PGA
-11    0x7E56    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF400    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x006C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-167    0x065B    //RX_PGA
-168    0x7E56    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF400    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x00C8    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0025    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM1-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6B74    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A19    //TX_PGA_0
-28    0x0A19    //TX_PGA_1
-29    0x0A19    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x2000    //TX_MIN_EQ_RE_EST_1
-154    0x2000    //TX_MIN_EQ_RE_EST_2
-155    0x4000    //TX_MIN_EQ_RE_EST_3
-156    0x4000    //TX_MIN_EQ_RE_EST_4
-157    0x7FFF    //TX_MIN_EQ_RE_EST_5
-158    0x7FFF    //TX_MIN_EQ_RE_EST_6
-159    0x7FFF    //TX_MIN_EQ_RE_EST_7
-160    0x7FFF    //TX_MIN_EQ_RE_EST_8
-161    0x7FFF    //TX_MIN_EQ_RE_EST_9
-162    0x7FFF    //TX_MIN_EQ_RE_EST_10
-163    0x7FFF    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0CCD    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x09C4    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0DAC    //TX_DT_CUT_K
-214    0x0020    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1F40    //TX_DT_BINVAD_ENDF
-358    0x0100    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x59D8    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x2710    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x7999    //TX_RATIODTL_CUT_TH
-383    0x0119    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x4000    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x737B    //TX_FDEQ_GAIN_11
-579    0x7B9A    //TX_FDEQ_GAIN_12
-580    0x9AC4    //TX_FDEQ_GAIN_13
-581    0xC4C4    //TX_FDEQ_GAIN_14
-582    0xC4C4    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4849    //TX_PREEQ_GAIN_MIC0_6
-624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4838    //TX_PREEQ_GAIN_MIC0_12
-630    0x3858    //TX_PREEQ_GAIN_MIC0_13
-631    0x7060    //TX_PREEQ_GAIN_MIC0_14
-632    0x9870    //TX_PREEQ_GAIN_MIC0_15
-633    0x5848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0004    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0016    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0FDA    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x006C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x065B    //RX_PGA
-11    0x7E56    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF400    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x006C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-167    0x065B    //RX_PGA
-168    0x7E56    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF400    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x00C8    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0025    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
+#SAVE_TIME  2022-12-29 14:41:27
 
 #CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
@@ -8168,7 +158,7 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
+150    0x7000    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
 152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0200    //TX_MIN_EQ_RE_EST_1
@@ -8189,7 +179,7 @@
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0200    //TX_DT2_HOLD_N
+171    0x0050    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -8215,10 +205,10 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7700    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x7148    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
@@ -8243,16 +233,16 @@
 222    0x1000    //TX_ADPT_STRICT_H
 223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+225    0x1B58    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FF0    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x09C4    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -8262,8 +252,8 @@
 241    0x0000    //TX_DT_RESRV_9
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -8271,7 +261,7 @@
 250    0x0050    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0080    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x01A0    //TX_DELTA_THR_SN_EST_6
@@ -8285,12 +275,12 @@
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
+267    0x0018    //TX_INBEAM_T
 268    0x0041    //TX_INBEAMHOLDT
 269    0x2000    //TX_G_STRICT
 270    0x2000    //TX_EQ_THR_BF
 271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
+272    0x0800    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
 274    0x0800    //TX_MAINREFRTOH_TH_H
 275    0x0800    //TX_MAINREFRTOH_TH_L
@@ -8300,7 +290,7 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0017    //TX_NS_LVL_CTRL_1
+282    0x0015    //TX_NS_LVL_CTRL_1
 283    0x0015    //TX_NS_LVL_CTRL_2
 284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
@@ -8315,13 +305,13 @@
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
+297    0x2000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1000    //TX_SNRI_SUP_1
+301    0x2400    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -8333,8 +323,8 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
 317    0x1000    //TX_A_POST_FILT_S_3
 318    0x3000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
@@ -8343,7 +333,7 @@
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
 324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
+325    0x1400    //TX_B_POST_FILT_3
 326    0x3000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -8365,7 +355,7 @@
 344    0x7D00    //TX_LAMBDA_PFILT_S_5
 345    0x7900    //TX_LAMBDA_PFILT_S_6
 346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+347    0x0400    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -8376,7 +366,7 @@
 355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+358    0x0080    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -8385,13 +375,13 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0023    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
@@ -8834,8 +824,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -8894,7 +884,7 @@
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
 875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
@@ -8909,7 +899,7 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -8918,19 +908,19 @@
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0050    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x021C    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000C    //TX_MICMUTE_CVG_TIME
+903    0x0006    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7E90    //TX_DTD_THR1_MICMUTE_0
-912    0x7918    //TX_DTD_THR1_MICMUTE_1
+908    0x7B70    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x4000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7EF4    //TX_DTD_THR1_MICMUTE_0
+912    0x7D00    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
@@ -8962,8 +952,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE0C0    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3BF6    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -9003,9 +993,9 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
+24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
@@ -9109,7 +1099,7 @@
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0B50    //RX_MAX_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -9170,8 +1160,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -9235,7 +1225,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003D    //RX_SPK_VOL
+129    0x004E    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -9269,8 +1259,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -9334,7 +1324,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005C    //RX_SPK_VOL
+129    0x006F    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -9368,8 +1358,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -9433,7 +1423,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0087    //RX_SPK_VOL
+129    0x00A0    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -9467,8 +1457,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -9532,7 +1522,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00CE    //RX_SPK_VOL
+129    0x00E5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -9557,18 +1547,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x013B    //RX_TDDRC_DRC_GAIN
+124    0x0152    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x8484    //RX_FDEQ_GAIN_0
-40    0x805A    //RX_FDEQ_GAIN_1
-41    0x6060    //RX_FDEQ_GAIN_2
-42    0x707C    //RX_FDEQ_GAIN_3
-43    0x8681    //RX_FDEQ_GAIN_4
-44    0x776D    //RX_FDEQ_GAIN_5
-45    0x5E55    //RX_FDEQ_GAIN_6
-46    0x5448    //RX_FDEQ_GAIN_7
-47    0x484D    //RX_FDEQ_GAIN_8
-48    0x5254    //RX_FDEQ_GAIN_9
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x544F    //RX_FDEQ_GAIN_7
+47    0x4F4D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9656,18 +1646,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x020B    //RX_TDDRC_DRC_GAIN
+124    0x0217    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x8484    //RX_FDEQ_GAIN_0
-40    0x845A    //RX_FDEQ_GAIN_1
-41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6E7E    //RX_FDEQ_GAIN_3
-43    0x8486    //RX_FDEQ_GAIN_4
-44    0x816D    //RX_FDEQ_GAIN_5
-45    0x5E55    //RX_FDEQ_GAIN_6
-46    0x5448    //RX_FDEQ_GAIN_7
-47    0x484D    //RX_FDEQ_GAIN_8
-48    0x5254    //RX_FDEQ_GAIN_9
+40    0x8466    //RX_FDEQ_GAIN_1
+41    0x6C5C    //RX_FDEQ_GAIN_2
+42    0x6782    //RX_FDEQ_GAIN_3
+43    0x988F    //RX_FDEQ_GAIN_4
+44    0x978A    //RX_FDEQ_GAIN_5
+45    0x6854    //RX_FDEQ_GAIN_6
+46    0x4F48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4949    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9755,18 +1745,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x0382    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x7C7C    //RX_FDEQ_GAIN_0
-40    0x7C5E    //RX_FDEQ_GAIN_1
-41    0x6054    //RX_FDEQ_GAIN_2
-42    0x677A    //RX_FDEQ_GAIN_3
-43    0x908B    //RX_FDEQ_GAIN_4
-44    0x8B82    //RX_FDEQ_GAIN_5
-45    0x6450    //RX_FDEQ_GAIN_6
-46    0x4B41    //RX_FDEQ_GAIN_7
-47    0x3F41    //RX_FDEQ_GAIN_8
-48    0x5252    //RX_FDEQ_GAIN_9
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8466    //RX_FDEQ_GAIN_1
+41    0x6C5C    //RX_FDEQ_GAIN_2
+42    0x6782    //RX_FDEQ_GAIN_3
+43    0x988F    //RX_FDEQ_GAIN_4
+44    0x978A    //RX_FDEQ_GAIN_5
+45    0x6854    //RX_FDEQ_GAIN_6
+46    0x4F48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4949    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -10840,9 +2830,9 @@
 149    0x0800    //TX_AEC_REF_GAIN_2
 150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
 156    0x0200    //TX_MIN_EQ_RE_EST_4
 157    0x0200    //TX_MIN_EQ_RE_EST_5
@@ -10852,14 +2842,14 @@
 161    0x1000    //TX_MIN_EQ_RE_EST_9
 162    0x1000    //TX_MIN_EQ_RE_EST_10
 163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
+164    0x6000    //TX_MIN_EQ_RE_EST_12
 165    0x4000    //TX_LAMBDA_RE_EST
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
 169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x01B0    //TX_DT2_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -10885,8 +2875,8 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7FD5    //TX_DTD_THR1_0
+198    0x7EF4    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -10901,7 +2891,7 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x07D0    //TX_DT_CUT_K
+213    0x05DC    //TX_DT_CUT_K
 214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -10913,7 +2903,7 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
 226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
@@ -10922,7 +2912,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -10933,7 +2923,7 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -10989,12 +2979,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -11005,7 +2995,7 @@
 314    0x5000    //TX_A_POST_FILT_S_0
 315    0x4C00    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x6000    //TX_A_POST_FILT_S_6
@@ -11013,7 +3003,7 @@
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+325    0x2000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -11030,7 +3020,7 @@
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
 341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
+342    0x7800    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -11045,7 +3035,7 @@
 354    0x0200    //TX_DT_BINVAD_TH_1
 355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1388    //TX_DT_BINVAD_ENDF
+357    0x05DC    //TX_DT_BINVAD_ENDF
 358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
@@ -11058,12 +3048,12 @@
 367    0x0032    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
+370    0x0320    //TX_NOISE_TH_1
 371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
@@ -11504,8 +3494,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -11587,19 +3577,19 @@
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03C0    //TX_MICMUTE_RATIO_THR
-900    0x0122    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0276    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x6590    //TX_DTD_THR1_MICMUTE_0
+911    0x7DC8    //TX_DTD_THR1_MICMUTE_0
 912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
@@ -11614,7 +3604,7 @@
 923    0x0001    //TX_MICMUTE_DT_CUT_THR
 924    0x03E8    //TX_MICMUTE_DT_CUT_K2
 925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -11632,8 +3622,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0xE0C0    //TX_AMS_RESRV_02
+945    0x2710    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -11673,9 +3663,9 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
+24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
@@ -11779,7 +3769,7 @@
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0B50    //RX_MAX_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -11905,7 +3895,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x0049    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -12004,7 +3994,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0055    //RX_SPK_VOL
+129    0x006B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -12103,7 +4093,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0082    //RX_SPK_VOL
+129    0x0097    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -12202,7 +4192,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00C0    //RX_SPK_VOL
+129    0x00D5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -12227,7 +4217,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x012F    //RX_TDDRC_DRC_GAIN
+124    0x013A    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x845C    //RX_FDEQ_GAIN_0
 40    0x5050    //RX_FDEQ_GAIN_1
@@ -12326,21 +4316,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01FF    //RX_TDDRC_DRC_GAIN
+124    0x01D8    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5A5D    //RX_FDEQ_GAIN_2
-42    0x7078    //RX_FDEQ_GAIN_3
-43    0x8078    //RX_FDEQ_GAIN_4
-44    0x7272    //RX_FDEQ_GAIN_5
-45    0x6761    //RX_FDEQ_GAIN_6
-46    0x635D    //RX_FDEQ_GAIN_7
-47    0x5A5E    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x605C    //RX_FDEQ_GAIN_10
-50    0x5858    //RX_FDEQ_GAIN_11
-51    0x6460    //RX_FDEQ_GAIN_12
+39    0x7C5C    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5C53    //RX_FDEQ_GAIN_2
+42    0x5C6A    //RX_FDEQ_GAIN_3
+43    0x8186    //RX_FDEQ_GAIN_4
+44    0x8681    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x505B    //RX_FDEQ_GAIN_8
+48    0x5A51    //RX_FDEQ_GAIN_9
+49    0x4F4F    //RX_FDEQ_GAIN_10
+50    0x4F58    //RX_FDEQ_GAIN_11
+51    0x645B    //RX_FDEQ_GAIN_12
 52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -12358,7 +4348,7 @@
 66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
 68    0x0605    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
+69    0x0A0A    //RX_FDEQ_BIN_6
 70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
@@ -12427,18 +4417,18 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x032A    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x4F4F    //RX_FDEQ_GAIN_1
-41    0x5457    //RX_FDEQ_GAIN_2
-42    0x5C66    //RX_FDEQ_GAIN_3
-43    0x7982    //RX_FDEQ_GAIN_4
-44    0x827D    //RX_FDEQ_GAIN_5
+39    0x7C5C    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5C53    //RX_FDEQ_GAIN_2
+42    0x5C6A    //RX_FDEQ_GAIN_3
+43    0x8186    //RX_FDEQ_GAIN_4
+44    0x8681    //RX_FDEQ_GAIN_5
 45    0x6A52    //RX_FDEQ_GAIN_6
-46    0x5352    //RX_FDEQ_GAIN_7
-47    0x585F    //RX_FDEQ_GAIN_8
-48    0x5E55    //RX_FDEQ_GAIN_9
-49    0x5353    //RX_FDEQ_GAIN_10
-50    0x5358    //RX_FDEQ_GAIN_11
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x505B    //RX_FDEQ_GAIN_8
+48    0x5A51    //RX_FDEQ_GAIN_9
+49    0x4F4F    //RX_FDEQ_GAIN_10
+50    0x4F58    //RX_FDEQ_GAIN_11
 51    0x645B    //RX_FDEQ_GAIN_12
 52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
@@ -13508,9 +5498,9 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
+152    0x0600    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
 154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x3000    //TX_MIN_EQ_RE_EST_3
@@ -13524,12 +5514,12 @@
 163    0x7800    //TX_MIN_EQ_RE_EST_11
 164    0x7800    //TX_MIN_EQ_RE_EST_12
 165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
 169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -13555,8 +5545,8 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -13571,8 +5561,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -13583,8 +5573,8 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
@@ -13592,7 +5582,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -13603,15 +5593,15 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+245    0xF600    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0100    //TX_DELTA_THR_SN_EST_6
@@ -13647,10 +5637,10 @@
 286    0x0011    //TX_NS_LVL_CTRL_5
 287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
 291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
+292    0x0018    //TX_MIN_GAIN_S_3
 293    0x0020    //TX_MIN_GAIN_S_4
 294    0x0020    //TX_MIN_GAIN_S_5
 295    0x0020    //TX_MIN_GAIN_S_6
@@ -13659,12 +5649,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -13673,17 +5663,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x7FFF    //TX_A_POST_FILT_S_4
 319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
 324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
+325    0x1000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -13705,7 +5695,7 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -13715,8 +5705,8 @@
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
 356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -13730,9 +5720,9 @@
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
+372    0x300C    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
@@ -13937,10 +5927,10 @@
 576    0x4E45    //TX_FDEQ_GAIN_9
 577    0x494A    //TX_FDEQ_GAIN_10
 578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5C6E    //TX_FDEQ_GAIN_13
-581    0x687E    //TX_FDEQ_GAIN_14
-582    0x8890    //TX_FDEQ_GAIN_15
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -14174,8 +6164,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -14258,21 +6248,21 @@
 897    0x2379    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x01C2    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
 911    0x7918    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x3A98    //TX_DTD_THR1_MICMUTE_2
-914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
 916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
 917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
@@ -14302,8 +6292,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -14449,7 +6439,7 @@
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0B50    //RX_MAX_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0058    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -14575,7 +6565,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x004D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -14674,7 +6664,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0054    //RX_SPK_VOL
+129    0x0073    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -14773,7 +6763,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0085    //RX_SPK_VOL
+129    0x00A2    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -14872,7 +6862,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00C7    //RX_SPK_VOL
+129    0x00E5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -14897,7 +6887,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0134    //RX_TDDRC_DRC_GAIN
+124    0x017B    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x8458    //RX_FDEQ_GAIN_0
 40    0x4B4B    //RX_FDEQ_GAIN_1
@@ -14971,7 +6961,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x00D7    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -14998,21 +6988,21 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01EE    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x5150    //RX_FDEQ_GAIN_1
-41    0x555C    //RX_FDEQ_GAIN_2
-42    0x6E75    //RX_FDEQ_GAIN_3
-43    0x8077    //RX_FDEQ_GAIN_4
-44    0x756D    //RX_FDEQ_GAIN_5
-45    0x6667    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
 54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -15098,20 +7088,20 @@
 124    0x035A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x8468    //RX_FDEQ_GAIN_0
-40    0x4F4F    //RX_FDEQ_GAIN_1
-41    0x555A    //RX_FDEQ_GAIN_2
-42    0x6069    //RX_FDEQ_GAIN_3
-43    0x7D86    //RX_FDEQ_GAIN_4
-44    0x8682    //RX_FDEQ_GAIN_5
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
 45    0x7461    //RX_FDEQ_GAIN_6
 46    0x5352    //RX_FDEQ_GAIN_7
-47    0x5860    //RX_FDEQ_GAIN_8
+47    0x5460    //RX_FDEQ_GAIN_8
 48    0x5D5F    //RX_FDEQ_GAIN_9
-49    0x5A52    //RX_FDEQ_GAIN_10
-50    0x535A    //RX_FDEQ_GAIN_11
-51    0x6654    //RX_FDEQ_GAIN_12
-52    0x6068    //RX_FDEQ_GAIN_13
-53    0x6F69    //RX_FDEQ_GAIN_14
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
 54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -15172,14 +7162,14 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
+157    0x247C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 167    0x0800    //RX_PGA
@@ -15201,32 +7191,32 @@
 183    0x0190    //RX_FENS_RESRV_1
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15235,22 +7225,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15284,24 +7274,24 @@
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03FC    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -15426,7 +7416,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0039    //RX_SPK_VOL
+286    0x004D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -15525,7 +7515,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0054    //RX_SPK_VOL
+286    0x0073    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -15624,7 +7614,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0085    //RX_SPK_VOL
+286    0x00A2    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -15723,7 +7713,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x00C7    //RX_SPK_VOL
+286    0x00E5    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -15748,7 +7738,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0134    //RX_TDDRC_DRC_GAIN
+281    0x017B    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x8458    //RX_FDEQ_GAIN_0
 197    0x4B4B    //RX_FDEQ_GAIN_1
@@ -15822,7 +7812,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
+286    0x00A2    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -15849,21 +7839,21 @@
 280    0x0CCD    //RX_TDDRC_SMT_W
 281    0x01EE    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8464    //RX_FDEQ_GAIN_0
-197    0x5150    //RX_FDEQ_GAIN_1
-198    0x555C    //RX_FDEQ_GAIN_2
-199    0x6E75    //RX_FDEQ_GAIN_3
-200    0x8077    //RX_FDEQ_GAIN_4
-201    0x756D    //RX_FDEQ_GAIN_5
-202    0x6667    //RX_FDEQ_GAIN_6
-203    0x6D68    //RX_FDEQ_GAIN_7
-204    0x5E6A    //RX_FDEQ_GAIN_8
-205    0x6668    //RX_FDEQ_GAIN_9
-206    0x645A    //RX_FDEQ_GAIN_10
-207    0x5A5E    //RX_FDEQ_GAIN_11
-208    0x6A58    //RX_FDEQ_GAIN_12
-209    0x646E    //RX_FDEQ_GAIN_13
-210    0x787C    //RX_FDEQ_GAIN_14
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x858A    //RX_FDEQ_GAIN_4
+201    0x8A86    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5460    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A56    //RX_FDEQ_GAIN_10
+207    0x575A    //RX_FDEQ_GAIN_11
+208    0x624C    //RX_FDEQ_GAIN_12
+209    0x5C64    //RX_FDEQ_GAIN_13
+210    0x6761    //RX_FDEQ_GAIN_14
 211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -15946,23 +7936,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03AD    //RX_TDDRC_DRC_GAIN
+281    0x035A    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x8468    //RX_FDEQ_GAIN_0
-197    0x4F4F    //RX_FDEQ_GAIN_1
-198    0x555A    //RX_FDEQ_GAIN_2
-199    0x6069    //RX_FDEQ_GAIN_3
-200    0x7D86    //RX_FDEQ_GAIN_4
-201    0x8682    //RX_FDEQ_GAIN_5
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x858A    //RX_FDEQ_GAIN_4
+201    0x8A86    //RX_FDEQ_GAIN_5
 202    0x7461    //RX_FDEQ_GAIN_6
 203    0x5352    //RX_FDEQ_GAIN_7
-204    0x5860    //RX_FDEQ_GAIN_8
+204    0x5460    //RX_FDEQ_GAIN_8
 205    0x5D5F    //RX_FDEQ_GAIN_9
-206    0x5A52    //RX_FDEQ_GAIN_10
-207    0x535A    //RX_FDEQ_GAIN_11
-208    0x6654    //RX_FDEQ_GAIN_12
-209    0x6068    //RX_FDEQ_GAIN_13
-210    0x6F69    //RX_FDEQ_GAIN_14
+206    0x5A56    //RX_FDEQ_GAIN_10
+207    0x575A    //RX_FDEQ_GAIN_11
+208    0x624C    //RX_FDEQ_GAIN_12
+209    0x5C64    //RX_FDEQ_GAIN_13
+210    0x6761    //RX_FDEQ_GAIN_14
 211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18693,7 +10683,7 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE2-SWB
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM1-SWB
 #PARAM_MODE  FULL
 #PARAM_TYPE TX+2RX
 #TOTAL_CUSTOM_STEP 7+7
@@ -18701,7 +10691,7 @@
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x00F3    //TX_PATCH_REG
-3    0x6F7D    //TX_SENDFUNC_MODE_0
+3    0x6F75    //TX_SENDFUNC_MODE_0
 4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
@@ -18848,9 +10838,9 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
+152    0x0600    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
 154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x3000    //TX_MIN_EQ_RE_EST_3
@@ -18864,12 +10854,12 @@
 163    0x7800    //TX_MIN_EQ_RE_EST_11
 164    0x7800    //TX_MIN_EQ_RE_EST_12
 165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
 169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -18895,8 +10885,8 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -18911,8 +10901,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -18923,8 +10913,8 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
@@ -18932,7 +10922,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -19045,7 +11035,7 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -19055,8 +11045,8 @@
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
 356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -19514,8 +11504,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -19661,7 +11651,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x247C    //RX_RECVFUNC_MODE_0
+0    0x007C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -19915,7 +11905,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x004D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -20014,7 +12004,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0054    //RX_SPK_VOL
+129    0x0073    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -20113,7 +12103,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0085    //RX_SPK_VOL
+129    0x00A2    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -20212,7 +12202,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00C7    //RX_SPK_VOL
+129    0x00E5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -20237,7 +12227,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0134    //RX_TDDRC_DRC_GAIN
+124    0x017B    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x8458    //RX_FDEQ_GAIN_0
 40    0x4B4B    //RX_FDEQ_GAIN_1
@@ -20311,7 +12301,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x00A2    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -20338,21 +12328,21 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01EE    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x5150    //RX_FDEQ_GAIN_1
-41    0x555C    //RX_FDEQ_GAIN_2
-42    0x6E75    //RX_FDEQ_GAIN_3
-43    0x8077    //RX_FDEQ_GAIN_4
-44    0x756D    //RX_FDEQ_GAIN_5
-45    0x6667    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
 54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -20438,20 +12428,20 @@
 124    0x035A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x8468    //RX_FDEQ_GAIN_0
-40    0x4F4F    //RX_FDEQ_GAIN_1
-41    0x555A    //RX_FDEQ_GAIN_2
-42    0x6069    //RX_FDEQ_GAIN_3
-43    0x7D86    //RX_FDEQ_GAIN_4
-44    0x8682    //RX_FDEQ_GAIN_5
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
 45    0x7461    //RX_FDEQ_GAIN_6
 46    0x5352    //RX_FDEQ_GAIN_7
-47    0x5860    //RX_FDEQ_GAIN_8
+47    0x5460    //RX_FDEQ_GAIN_8
 48    0x5D5F    //RX_FDEQ_GAIN_9
-49    0x5A52    //RX_FDEQ_GAIN_10
-50    0x535A    //RX_FDEQ_GAIN_11
-51    0x6654    //RX_FDEQ_GAIN_12
-52    0x6068    //RX_FDEQ_GAIN_13
-53    0x6F69    //RX_FDEQ_GAIN_14
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
 54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -20512,14 +12502,14 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
+157    0x007C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 167    0x0800    //RX_PGA
@@ -20541,32 +12531,32 @@
 183    0x0190    //RX_FENS_RESRV_1
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -20575,22 +12565,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -20624,24 +12614,24 @@
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03FC    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x0B50    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -21363,19 +13353,19 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM1-SWB
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM1-FB
 #PARAM_MODE  FULL
 #PARAM_TYPE TX+2RX
 #TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0073    //TX_PATCH_REG
+2    0x0033    //TX_PATCH_REG
 3    0x6B74    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
 9    0x000A    //TX_FRAME_SZ
 10    0x0000    //TX_DELAY_OPT
@@ -21389,15 +13379,15 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0019    //TX_DIST2REF_02
+21    0x0096    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
 30    0x0000    //TX_PGA_3
 31    0x0000    //TX_PGA_4
 32    0x0000    //TX_PGA_5
@@ -21409,8 +13399,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -21496,11 +13486,11 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
+128    0x7E56    //TX_A_HP
 129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
 133    0x0008    //TX_PITCH_BFR_LEN
 134    0x0003    //TX_SBD_PITCH_DET
 135    0x0050    //TX_TD_AEC_L
@@ -21515,31 +13505,31 @@
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
 146    0x0028    //TX_TAIL_LENGTH
-147    0x0400    //TX_AEC_REF_GAIN_0
+147    0x0300    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
 165    0x4000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -21565,24 +13555,24 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
+197    0x7D00    //TX_DTD_THR1_0
 198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -21593,17 +13583,17 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
-226    0x5014    //TX_RATIO_DT_H_TH_HIGH
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
+232    0x0063    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
 238    0x0000    //TX_DTD_THR2_7
@@ -21613,18 +13603,18 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
+256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -21650,21 +13640,21 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x003C    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x003C    //TX_NS_LVL_CTRL_3
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x003C    //TX_NS_LVL_CTRL_6
+287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
-291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
-293    0x0020    //TX_MIN_GAIN_S_4
-294    0x0020    //TX_MIN_GAIN_S_5
-295    0x0020    //TX_MIN_GAIN_S_6
-296    0x0020    //TX_MIN_GAIN_S_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
@@ -21673,27 +13663,27 @@
 302    0x4000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
+305    0x50C0    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
+307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
-314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
-318    0x7FFF    //TX_A_POST_FILT_S_4
-319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
-321    0x7FFF    //TX_A_POST_FILT_S_7
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -21706,29 +13696,29 @@
 335    0x6000    //TX_B_LESSCUT_RTO_S_5
 336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7F00    //TX_LAMBDA_PFILT
-339    0x7F00    //TX_LAMBDA_PFILT_S_0
-340    0x7F00    //TX_LAMBDA_PFILT_S_1
-341    0x7F00    //TX_LAMBDA_PFILT_S_2
-342    0x7F00    //TX_LAMBDA_PFILT_S_3
-343    0x7F00    //TX_LAMBDA_PFILT_S_4
-344    0x7F00    //TX_LAMBDA_PFILT_S_5
-345    0x7F00    //TX_LAMBDA_PFILT_S_6
-346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x0040    //TX_DT_BINVAD_TH_0
-354    0x0040    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
+360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
 362    0x0005    //TX_BF_DVG_TH
 363    0x001E    //TX_SN_C_F
@@ -21739,19 +13729,19 @@
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
-371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
-373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0DAC    //TX_NOISE_TH_6
-379    0x0050    //TX_MINENOISE_TH
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x07D0    //TX_DT_CUT_K1
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -21767,16 +13757,16 @@
 396    0x0000    //TX_MASK_G_R
 397    0x0002    //TX_EXTRA_NS_L
 398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0050    //TX_MINENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4000    //TX_MIN_G_CTRL_SSNS
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
 410    0x4848    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
@@ -21867,17 +13857,17 @@
 496    0x0000    //TX_DOA_TRACK_NEW
 497    0x0230    //TX_NOR_OFF_THR
 498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
+499    0x2000    //TX_MU_BF_ADPT_NS
 500    0x0000    //TX_ADAPT_LEN
 501    0x2000    //TX_MORE_SNS
 502    0x0000    //TX_NOR_OFF_TH1
 503    0x0000    //TX_WIDE_MASK_TH
 504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
+505    0x7FFF    //TX_C_POST_FLT_CUT
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
+509    0x0000    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -21937,20 +13927,20 @@
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4850    //TX_FDEQ_GAIN_2
-570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4B48    //TX_FDEQ_GAIN_4
-572    0x484B    //TX_FDEQ_GAIN_5
-573    0x4B5C    //TX_FDEQ_GAIN_6
-574    0x564E    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x4E45    //TX_FDEQ_GAIN_9
-577    0x494A    //TX_FDEQ_GAIN_10
-578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C57    //TX_FDEQ_GAIN_12
-580    0x5667    //TX_FDEQ_GAIN_13
-581    0x6778    //TX_FDEQ_GAIN_14
-582    0x8087    //TX_FDEQ_GAIN_15
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -21961,20 +13951,20 @@
 590    0x4848    //TX_FDEQ_GAIN_23
 591    0x0202    //TX_FDEQ_BIN_0
 592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
 608    0x0000    //TX_FDEQ_BIN_17
 609    0x0000    //TX_FDEQ_BIN_18
@@ -21991,17 +13981,17 @@
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
 636    0x4848    //TX_PREEQ_GAIN_MIC0_19
@@ -22025,7 +14015,7 @@
 654    0x1E14    //TX_PREEQ_BIN_MIC0_13
 655    0x1414    //TX_PREEQ_BIN_MIC0_14
 656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x401E    //TX_PREEQ_BIN_MIC0_16
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -22041,16 +14031,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4849    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
-675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5354    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x5653    //TX_PREEQ_GAIN_MIC1_14
-681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
-682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -22058,23 +14048,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -22089,16 +14079,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x494B    //TX_PREEQ_GAIN_MIC2_6
-722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
-723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
-724    0x5051    //TX_PREEQ_GAIN_MIC2_9
-725    0x5255    //TX_PREEQ_GAIN_MIC2_10
-726    0x5754    //TX_PREEQ_GAIN_MIC2_11
-727    0x5454    //TX_PREEQ_GAIN_MIC2_12
-728    0x544F    //TX_PREEQ_GAIN_MIC2_13
-729    0x463D    //TX_PREEQ_GAIN_MIC2_14
-730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -22107,22 +14097,22 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0203    //TX_PREEQ_BIN_MIC2_0
-740    0x0303    //TX_PREEQ_BIN_MIC2_1
-741    0x0304    //TX_PREEQ_BIN_MIC2_2
-742    0x0405    //TX_PREEQ_BIN_MIC2_3
-743    0x0506    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0809    //TX_PREEQ_BIN_MIC2_6
-746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
-747    0x0C10    //TX_PREEQ_BIN_MIC2_8
-748    0x1013    //TX_PREEQ_BIN_MIC2_9
-749    0x1414    //TX_PREEQ_BIN_MIC2_10
-750    0x261E    //TX_PREEQ_BIN_MIC2_11
-751    0x1E14    //TX_PREEQ_BIN_MIC2_12
-752    0x1414    //TX_PREEQ_BIN_MIC2_13
-753    0x2814    //TX_PREEQ_BIN_MIC2_14
-754    0x4022    //TX_PREEQ_BIN_MIC2_15
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -22132,29 +14122,29 @@
 761    0x0000    //TX_PREEQ_BIN_MIC2_22
 762    0x0000    //TX_PREEQ_BIN_MIC2_23
 763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
 770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
 780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
 781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
 782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
 787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
@@ -22221,20 +14211,20 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0E21    //TX_TDDRC_DRC_GAIN
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -22256,10 +14246,10 @@
 885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
+888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -22331,18 +14321,18 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x206C    //RX_RECVFUNC_MODE_0
+0    0x006C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7652    //RX_A_HP
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
 14    0x7000    //RX_THR_PITCH_DET_1
@@ -22353,10 +14343,10 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
+25    0x00C8    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -22364,28 +14354,28 @@
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -22397,9 +14387,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -22421,9 +14411,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -22443,24 +14433,24 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -22489,46 +14479,46 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -22540,9 +14530,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -22564,9 +14554,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -22585,49 +14575,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -22639,9 +14629,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -22663,9 +14653,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -22684,49 +14674,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
+129    0x001A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -22738,9 +14728,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -22762,9 +14752,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -22783,49 +14773,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0029    //RX_SPK_VOL
+129    0x0025    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -22837,9 +14827,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -22861,9 +14851,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -22882,49 +14872,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x0034    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -22936,9 +14926,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -22960,9 +14950,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -22981,49 +14971,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005F    //RX_SPK_VOL
+129    0x004D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -23035,9 +15025,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -23059,9 +15049,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -23080,49 +15070,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x008E    //RX_SPK_VOL
+129    0x0074    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -23134,9 +15124,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -23158,9 +15148,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -23182,18 +15172,18 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
+157    0x006C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7652    //RX_A_HP
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
 171    0x7000    //RX_THR_PITCH_DET_1
@@ -23204,10 +15194,10 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
+182    0x00C8    //RX_FENS_RESRV_0
 183    0x0190    //RX_FENS_RESRV_1
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -23215,7 +15205,7 @@
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
@@ -23224,19 +15214,19 @@
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23248,9 +15238,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -23272,9 +15262,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -23294,24 +15284,24 @@
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x2000    //RX_TPKA_FP
 284    0x2000    //RX_MIN_G_FP
 285    0x0080    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
+286    0x0012    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -23340,46 +15330,46 @@
 312    0x0000    //RX_BWE_RESRV_1
 313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23391,9 +15381,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -23415,9 +15405,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -23436,49 +15426,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x0012    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23490,9 +15480,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -23514,9 +15504,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -23535,49 +15525,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001D    //RX_SPK_VOL
+286    0x001A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23589,9 +15579,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -23613,9 +15603,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -23634,49 +15624,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0029    //RX_SPK_VOL
+286    0x0025    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23688,9 +15678,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -23712,9 +15702,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -23733,49 +15723,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0039    //RX_SPK_VOL
+286    0x0034    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23787,9 +15777,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -23811,9 +15801,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -23832,49 +15822,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005F    //RX_SPK_VOL
+286    0x004D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23886,9 +15876,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -23910,9 +15900,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -23931,49 +15921,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x008E    //RX_SPK_VOL
+286    0x0074    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -23985,9 +15975,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -24009,9 +15999,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -24040,9 +16030,9 @@
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0073    //TX_PATCH_REG
-3    0x6B5C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -24188,9 +16178,9 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
+152    0x0600    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
 154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x3000    //TX_MIN_EQ_RE_EST_3
@@ -24203,13 +16193,13 @@
 162    0x7800    //TX_MIN_EQ_RE_EST_10
 163    0x7800    //TX_MIN_EQ_RE_EST_11
 164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -24236,7 +16226,7 @@
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
 197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+198    0x6D60    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -24251,8 +16241,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -24261,18 +16251,18 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
-226    0x5014    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -24320,12 +16310,12 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x003C    //TX_NS_LVL_CTRL_1
+282    0x001A    //TX_NS_LVL_CTRL_1
 283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x003C    //TX_NS_LVL_CTRL_3
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x003C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x0020    //TX_MIN_GAIN_S_0
 290    0x0020    //TX_MIN_GAIN_S_1
@@ -24335,39 +16325,39 @@
 294    0x0020    //TX_MIN_GAIN_S_5
 295    0x0020    //TX_MIN_GAIN_S_6
 296    0x0020    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
+297    0x7FFF    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
+299    0x7FFF    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
-318    0x7FFF    //TX_A_POST_FILT_S_4
-319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
-321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
+312    0x0000    //TX_A_POST_FILT_0
+313    0x0000    //TX_A_POST_FILT_1
+314    0x0000    //TX_A_POST_FILT_S_0
+315    0x0000    //TX_A_POST_FILT_S_1
+316    0x0000    //TX_A_POST_FILT_S_2
+317    0x0000    //TX_A_POST_FILT_S_3
+318    0x0000    //TX_A_POST_FILT_S_4
+319    0x0000    //TX_A_POST_FILT_S_5
+320    0x0000    //TX_A_POST_FILT_S_6
+321    0x0000    //TX_A_POST_FILT_S_7
+322    0x0000    //TX_B_POST_FILT_0
+323    0x0000    //TX_B_POST_FILT_1
+324    0x0000    //TX_B_POST_FILT_2
+325    0x0000    //TX_B_POST_FILT_3
+326    0x0000    //TX_B_POST_FILT_4
+327    0x0000    //TX_B_POST_FILT_5
+328    0x0000    //TX_B_POST_FILT_6
+329    0x0000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
 332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
@@ -24385,7 +16375,7 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -24394,9 +16384,9 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -24439,7 +16429,7 @@
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -24610,17 +16600,17 @@
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
 571    0x4B48    //TX_FDEQ_GAIN_4
-572    0x484B    //TX_FDEQ_GAIN_5
-573    0x4B5C    //TX_FDEQ_GAIN_6
-574    0x564E    //TX_FDEQ_GAIN_7
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E60    //TX_FDEQ_GAIN_6
+574    0x5C52    //TX_FDEQ_GAIN_7
 575    0x4C4E    //TX_FDEQ_GAIN_8
 576    0x4E45    //TX_FDEQ_GAIN_9
 577    0x494A    //TX_FDEQ_GAIN_10
 578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C57    //TX_FDEQ_GAIN_12
-580    0x5667    //TX_FDEQ_GAIN_13
-581    0x6778    //TX_FDEQ_GAIN_14
-582    0x8087    //TX_FDEQ_GAIN_15
+579    0x5C5C    //TX_FDEQ_GAIN_12
+580    0x5C6E    //TX_FDEQ_GAIN_13
+581    0x687E    //TX_FDEQ_GAIN_14
+582    0x8890    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -24808,12 +16798,12 @@
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
+775    0x000F    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
@@ -24854,6 +16844,2676 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x007C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0073    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00E5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017B    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x035A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x007C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03FC    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x0B50    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0054    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0085    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00C7    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0134    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01EE    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8464    //RX_FDEQ_GAIN_0
+197    0x5150    //RX_FDEQ_GAIN_1
+198    0x555C    //RX_FDEQ_GAIN_2
+199    0x6E75    //RX_FDEQ_GAIN_3
+200    0x8077    //RX_FDEQ_GAIN_4
+201    0x756D    //RX_FDEQ_GAIN_5
+202    0x6667    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03AD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F4F    //RX_FDEQ_GAIN_1
+198    0x555A    //RX_FDEQ_GAIN_2
+199    0x6069    //RX_FDEQ_GAIN_3
+200    0x7D86    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5860    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A52    //RX_FDEQ_GAIN_10
+207    0x535A    //RX_FDEQ_GAIN_11
+208    0x6654    //RX_FDEQ_GAIN_12
+209    0x6068    //RX_FDEQ_GAIN_13
+210    0x6F69    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM2-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B5C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0063    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
 816    0x0010    //TX_DEADMIC_SILENCE_TH
 817    0x0600    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
@@ -24891,20 +19551,20 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0E21    //TX_TDDRC_DRC_GAIN
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -24926,10 +19586,10 @@
 885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
+888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -25001,18 +19661,18 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x206C    //RX_RECVFUNC_MODE_0
+0    0x006C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7652    //RX_A_HP
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
 14    0x7000    //RX_THR_PITCH_DET_1
@@ -25023,10 +19683,10 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
+25    0x00C8    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -25034,28 +19694,28 @@
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25067,9 +19727,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25091,9 +19751,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25113,24 +19773,24 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -25159,46 +19819,46 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25210,9 +19870,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25234,9 +19894,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25255,49 +19915,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25309,9 +19969,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25333,9 +19993,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25354,49 +20014,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
+129    0x001A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25408,9 +20068,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25432,9 +20092,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25453,49 +20113,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0029    //RX_SPK_VOL
+129    0x0025    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25507,9 +20167,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25531,9 +20191,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25552,49 +20212,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x0034    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25606,9 +20266,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25630,9 +20290,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25651,49 +20311,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005F    //RX_SPK_VOL
+129    0x004D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25705,9 +20365,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25729,9 +20389,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25750,49 +20410,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x008E    //RX_SPK_VOL
+129    0x0074    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -25804,9 +20464,9 @@
 63    0x0202    //RX_FDEQ_BIN_0
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
 69    0x0808    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -25828,9 +20488,9 @@
 87    0x4000    //RX_FDEQ_RESRV_0
 88    0x0320    //RX_FDEQ_RESRV_1
 89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
 93    0x0004    //RX_FDDRC_BLOCK_EXP
 94    0x5000    //RX_FDDRC_THRD_2_0
 95    0x5000    //RX_FDDRC_THRD_2_1
@@ -25852,18 +20512,18 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
+157    0x006C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7652    //RX_A_HP
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
 171    0x7000    //RX_THR_PITCH_DET_1
@@ -25874,10 +20534,10 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
+182    0x00C8    //RX_FENS_RESRV_0
 183    0x0190    //RX_FENS_RESRV_1
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
@@ -25885,7 +20545,7 @@
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
@@ -25894,19 +20554,19 @@
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -25918,9 +20578,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -25942,9 +20602,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -25964,24 +20624,24 @@
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x2000    //RX_TPKA_FP
 284    0x2000    //RX_MIN_G_FP
 285    0x0080    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
+286    0x0012    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -26010,46 +20670,46 @@
 312    0x0000    //RX_BWE_RESRV_1
 313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -26061,9 +20721,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -26085,9 +20745,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -26106,49 +20766,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x0012    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -26160,9 +20820,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -26184,9 +20844,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -26205,49 +20865,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001D    //RX_SPK_VOL
+286    0x001A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -26259,9 +20919,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -26283,9 +20943,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -26304,49 +20964,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0029    //RX_SPK_VOL
+286    0x0025    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
+199    0x4870    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -26358,9 +21018,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -26382,9 +21042,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -26403,49 +21063,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0039    //RX_SPK_VOL
+286    0x0034    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -26457,9 +21117,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -26481,9 +21141,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -26502,49 +21162,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005F    //RX_SPK_VOL
+286    0x004D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -26556,9 +21216,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -26580,9 +21240,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -26601,49 +21261,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x008E    //RX_SPK_VOL
+286    0x0074    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03C3    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
 202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -26655,9 +21315,9 @@
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
 226    0x0808    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
@@ -26679,9 +21339,9 @@
 244    0x4000    //RX_FDEQ_RESRV_0
 245    0x0320    //RX_FDEQ_RESRV_1
 246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
 250    0x0004    //RX_FDDRC_BLOCK_EXP
 251    0x5000    //RX_FDDRC_THRD_2_0
 252    0x5000    //RX_FDDRC_THRD_2_1
@@ -26710,9 +21370,9 @@
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0073    //TX_PATCH_REG
-3    0x6B54    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F55    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -26858,9 +21518,9 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
+152    0x0600    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
 154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x3000    //TX_MIN_EQ_RE_EST_3
@@ -26873,13 +21533,13 @@
 162    0x7800    //TX_MIN_EQ_RE_EST_10
 163    0x7800    //TX_MIN_EQ_RE_EST_11
 164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -26906,7 +21566,7 @@
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
 197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+198    0x6D60    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -26921,8 +21581,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -26931,18 +21591,18 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
-226    0x5014    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -26990,12 +21650,12 @@
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x003C    //TX_NS_LVL_CTRL_1
+282    0x001A    //TX_NS_LVL_CTRL_1
 283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x003C    //TX_NS_LVL_CTRL_3
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x003C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x0020    //TX_MIN_GAIN_S_0
 290    0x0020    //TX_MIN_GAIN_S_1
@@ -27055,7 +21715,7 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -27064,9 +21724,9 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -27109,7 +21769,7 @@
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -27280,17 +21940,17 @@
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
 571    0x4B48    //TX_FDEQ_GAIN_4
-572    0x484B    //TX_FDEQ_GAIN_5
-573    0x4B5C    //TX_FDEQ_GAIN_6
-574    0x564E    //TX_FDEQ_GAIN_7
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E60    //TX_FDEQ_GAIN_6
+574    0x5C52    //TX_FDEQ_GAIN_7
 575    0x4C4E    //TX_FDEQ_GAIN_8
 576    0x4E45    //TX_FDEQ_GAIN_9
 577    0x494A    //TX_FDEQ_GAIN_10
 578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C57    //TX_FDEQ_GAIN_12
-580    0x5667    //TX_FDEQ_GAIN_13
-581    0x6778    //TX_FDEQ_GAIN_14
-582    0x8087    //TX_FDEQ_GAIN_15
+579    0x5C5C    //TX_FDEQ_GAIN_12
+580    0x5C6E    //TX_FDEQ_GAIN_13
+581    0x687E    //TX_FDEQ_GAIN_14
+582    0x8890    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -27478,12 +22138,12 @@
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
+775    0x000F    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
@@ -27524,6 +22184,2676 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x01C2    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x3A98    //TX_DTD_THR1_MICMUTE_2
+914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0xE4A8    //TX_AMS_RESRV_02
+945    0x1770    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x007C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0B50    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0073    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00E5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017B    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x035A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x007C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03FC    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x0B50    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0054    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0085    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00C7    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0134    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01EE    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8464    //RX_FDEQ_GAIN_0
+197    0x5150    //RX_FDEQ_GAIN_1
+198    0x555C    //RX_FDEQ_GAIN_2
+199    0x6E75    //RX_FDEQ_GAIN_3
+200    0x8077    //RX_FDEQ_GAIN_4
+201    0x756D    //RX_FDEQ_GAIN_5
+202    0x6667    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03AD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F4F    //RX_FDEQ_GAIN_1
+198    0x555A    //RX_FDEQ_GAIN_2
+199    0x6069    //RX_FDEQ_GAIN_3
+200    0x7D86    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5860    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A52    //RX_FDEQ_GAIN_10
+207    0x535A    //RX_FDEQ_GAIN_11
+208    0x6654    //RX_FDEQ_GAIN_12
+209    0x6068    //RX_FDEQ_GAIN_13
+210    0x6F69    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE1-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B54    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0063    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x484B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x484C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4C    //TX_PREEQ_GAIN_MIC0_11
+629    0x4038    //TX_PREEQ_GAIN_MIC0_12
+630    0x3838    //TX_PREEQ_GAIN_MIC0_13
+631    0x4840    //TX_PREEQ_GAIN_MIC0_14
+632    0x3848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
 816    0x0010    //TX_DEADMIC_SILENCE_TH
 817    0x0600    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
@@ -27561,20 +24891,20 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0E21    //TX_TDDRC_DRC_GAIN
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -27596,10 +24926,10 @@
 885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
+888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -27671,14 +25001,2684 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x206C    //RX_RECVFUNC_MODE_0
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0074    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x00C8    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0600    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0018    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E60    //TX_FDEQ_GAIN_6
+574    0x5C52    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 10    0x0800    //RX_PGA
@@ -27700,32 +27700,32 @@
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -27734,22 +27734,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -27783,24 +27783,24 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03FC    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -27830,45 +27830,45 @@
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -27877,22 +27877,517 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0073    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00E5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017B    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00D7    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -27927,542 +28422,47 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0029    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005F    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x008E    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x035A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5568    //RX_FDEQ_GAIN_9
-49    0x7460    //RX_FDEQ_GAIN_10
-50    0x544E    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x484A    //RX_FDEQ_GAIN_13
-53    0x5155    //RX_FDEQ_GAIN_14
-54    0x577B    //RX_FDEQ_GAIN_15
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -28471,22 +28471,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -28522,14 +28522,14 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
+157    0x047C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 167    0x0800    //RX_PGA
@@ -28551,32 +28551,32 @@
 183    0x0190    //RX_FENS_RESRV_1
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -28585,22 +28585,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -28634,24 +28634,24 @@
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03FC    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -28681,45 +28681,45 @@
 313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -28728,22 +28728,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -28776,49 +28776,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x004D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -28827,22 +28827,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -28875,49 +28875,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001D    //RX_SPK_VOL
+286    0x0073    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -28926,22 +28926,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -28974,49 +28974,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0029    //RX_SPK_VOL
+286    0x00A2    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -29025,22 +29025,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -29073,49 +29073,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0039    //RX_SPK_VOL
+286    0x00E5    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
+269    0x0000    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x017B    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -29124,22 +29124,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -29172,49 +29172,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005F    //RX_SPK_VOL
+286    0x00D7    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
+269    0x0000    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x01EE    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x858A    //RX_FDEQ_GAIN_4
+201    0x8A86    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5460    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A56    //RX_FDEQ_GAIN_10
+207    0x575A    //RX_FDEQ_GAIN_11
+208    0x624C    //RX_FDEQ_GAIN_12
+209    0x5C64    //RX_FDEQ_GAIN_13
+210    0x6761    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -29223,22 +29223,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -29271,49 +29271,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x008E    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x035A    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x858A    //RX_FDEQ_GAIN_4
+201    0x8A86    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5460    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A56    //RX_FDEQ_GAIN_10
+207    0x575A    //RX_FDEQ_GAIN_11
+208    0x624C    //RX_FDEQ_GAIN_12
+209    0x5C64    //RX_FDEQ_GAIN_13
+210    0x6761    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -29322,22 +29322,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
diff --git a/audio/lynx/tuning/fortemedia/HEADSET.dat b/audio/lynx/tuning/fortemedia/HEADSET.dat
index 97a88f5..1654217 100644
Binary files a/audio/lynx/tuning/fortemedia/HEADSET.dat and b/audio/lynx/tuning/fortemedia/HEADSET.dat differ
diff --git a/audio/lynx/tuning/fortemedia/HEADSET.mods b/audio/lynx/tuning/fortemedia/HEADSET.mods
index ede3de1..60129aa 100644
--- a/audio/lynx/tuning/fortemedia/HEADSET.mods
+++ b/audio/lynx/tuning/fortemedia/HEADSET.mods
@@ -1,12 +1,12 @@
 #PLATFORM_NAME  gChip
 #EXPORT_FLAG  HEADSET
 #SINGLE_API_VER  1.2.1
-#SAVE_TIME  2022-07-29 15:48:08
+#SAVE_TIME  2022-12-29 14:20:45
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -971,7 +971,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x243C    //RX_RECVFUNC_MODE_0
+0    0xA43C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -993,7 +993,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -1822,7 +1822,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x243C    //RX_RECVFUNC_MODE_0
+157    0xA43C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -1844,7 +1844,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -2675,8 +2675,8 @@
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -3641,7 +3641,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x243C    //RX_RECVFUNC_MODE_0
+0    0xA43C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -3663,7 +3663,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -4492,7 +4492,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x243C    //RX_RECVFUNC_MODE_0
+157    0xA43C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -4514,7 +4514,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -5345,8 +5345,8 @@
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -7162,7 +7162,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x243C    //RX_RECVFUNC_MODE_0
+157    0x043C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -8015,8 +8015,8 @@
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -10683,10 +10683,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-USB_BLACKBIRD-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6F68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6D60    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF700    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0009    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x5000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7000    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x00FA    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x2904    //TX_NOISE_TH_3
+373    0x07D0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0064    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4040    //TX_FDEQ_GAIN_6
+574    0x4040    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3838    //TX_FDEQ_GAIN_10
+578    0x3828    //TX_FDEQ_GAIN_11
+579    0x2828    //TX_FDEQ_GAIN_12
+580    0x2828    //TX_FDEQ_GAIN_13
+581    0x1C1C    //TX_FDEQ_GAIN_14
+582    0x1C1C    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x284A    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0050    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0020    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x0D90    //RX_TPKA_FP
+127    0x032D    //RX_MIN_G_FP
+128    0x0A00    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0011    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0030    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0050    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0089    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E52    //RX_FDEQ_GAIN_0
+197    0x5252    //RX_FDEQ_GAIN_1
+198    0x5252    //RX_FDEQ_GAIN_2
+199    0x5250    //RX_FDEQ_GAIN_3
+200    0x4C46    //RX_FDEQ_GAIN_4
+201    0x4748    //RX_FDEQ_GAIN_5
+202    0x5768    //RX_FDEQ_GAIN_6
+203    0x6162    //RX_FDEQ_GAIN_7
+204    0x5252    //RX_FDEQ_GAIN_8
+205    0x5256    //RX_FDEQ_GAIN_9
+206    0x5248    //RX_FDEQ_GAIN_10
+207    0x3434    //RX_FDEQ_GAIN_11
+208    0x3436    //RX_FDEQ_GAIN_12
+209    0x2A18    //RX_FDEQ_GAIN_13
+210    0x1830    //RX_FDEQ_GAIN_14
+211    0x3648    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x023E    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x0D90    //RX_TPKA_FP
+284    0x032D    //RX_MIN_G_FP
+285    0x0A00    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0030    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0089    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -11651,7 +14321,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA02C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -11673,7 +14343,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -12502,7 +15172,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA02C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -12524,7 +15194,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -13355,8 +16025,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -14321,7 +16991,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA02C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -14343,7 +17013,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -15172,7 +17842,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA02C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -15194,7 +17864,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -16025,8 +18695,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -17842,7 +20512,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0x002C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -18695,8 +21365,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -21363,5350 +24033,10 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-NB
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-RESERVE2-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B80    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x7CCC    //TX_THR_PITCH_DET_0
-131    0x7000    //TX_THR_PITCH_DET_1
-132    0x6333    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0010    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x1000    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x2000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x0064    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x5000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7F00    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x2000    //TX_DTD_THR2_3
-208    0x2000    //TX_DTD_THR2_4
-209    0x2000    //TX_DTD_THR2_5
-210    0x2000    //TX_DTD_THR2_6
-211    0x4100    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x1000    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0010    //TX_EPD_OFFSET_00
-233    0x0010    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xFA00    //TX_THR_SN_EST_6
-249    0xFA00    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
-252    0x0000    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0000    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x0400    //TX_B_POST_FLT_0
-280    0x0400    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0010    //TX_NS_LVL_CTRL_1
-283    0x0010    //TX_NS_LVL_CTRL_2
-284    0x0010    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000D    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x000D    //TX_MIN_GAIN_S_2
-292    0x000D    //TX_MIN_GAIN_S_3
-293    0x000D    //TX_MIN_GAIN_S_4
-294    0x000D    //TX_MIN_GAIN_S_5
-295    0x000D    //TX_MIN_GAIN_S_6
-296    0x000D    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0014    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x1000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x4000    //TX_A_POST_FILT_S_7
-322    0x0400    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x0400    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x0FA0    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x003B    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x02BC    //TX_NOISE_TH_1
-371    0x1F40    //TX_NOISE_TH_2
-372    0x4650    //TX_NOISE_TH_3
-373    0x7148    //TX_NOISE_TH_4
-374    0x044C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x0032    //TX_NOISE_TH_6
-379    0x00C8    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0032    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0280    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2400    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x2000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0064    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0014    //TX_FDEQ_SUBNUM
-567    0x6048    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4844    //TX_FDEQ_GAIN_6
-574    0x4444    //TX_FDEQ_GAIN_7
-575    0x4040    //TX_FDEQ_GAIN_8
-576    0x3C3C    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0401    //TX_FDEQ_BIN_0
-592    0x0103    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0010    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0802    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0010    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0802    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0010    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0802    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x000B    //TX_GAIN_LIMIT_0
-774    0x000B    //TX_GAIN_LIMIT_1
-775    0x000B    //TX_GAIN_LIMIT_2
-776    0x000B    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0001    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0013    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0020    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-WB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B80    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0102    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x00F8    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x00DC    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x5850    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0302    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D07    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1119    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0001    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0013    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0020    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -27671,7 +25001,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0x002C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -28522,7 +25852,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0x002C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -29373,2680 +26703,10 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0009    //TX_OPERATION_MODE_1
-2    0x0020    //TX_PATCH_REG
-3    0x6B6A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B4C    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0200    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x61A8    //TX_EAD_THR
-151    0x0400    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x3000    //TX_MIN_EQ_RE_EST_1
-154    0x4000    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x6000    //TX_MIN_EQ_RE_EST_6
-159    0x6000    //TX_MIN_EQ_RE_EST_7
-160    0x6000    //TX_MIN_EQ_RE_EST_8
-161    0x6000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x4000    //TX_MIN_EQ_RE_EST_11
-164    0x4000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x3000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x0800    //TX_DTD_THR1_0
-198    0x0800    //TX_DTD_THR1_1
-199    0x0800    //TX_DTD_THR1_2
-200    0x0800    //TX_DTD_THR1_3
-201    0x0800    //TX_DTD_THR1_4
-202    0x0800    //TX_DTD_THR1_5
-203    0x0800    //TX_DTD_THR1_6
-204    0x0800    //TX_DTD_THR2_0
-205    0x0800    //TX_DTD_THR2_1
-206    0x0800    //TX_DTD_THR2_2
-207    0x0800    //TX_DTD_THR2_3
-208    0x0800    //TX_DTD_THR2_4
-209    0x0100    //TX_DTD_THR2_5
-210    0x0100    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00C0    //TX_EPD_OFFSET_00
-233    0x00C0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
-243    0xFB00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF700    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF600    //TX_THR_SN_EST_5
-248    0xF600    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0400    //TX_DELTA_THR_SN_EST_1
-252    0x0300    //TX_DELTA_THR_SN_EST_2
-253    0x0600    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0019    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0011    //TX_MIN_GAIN_S_6
-296    0x000C    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7000    //TX_SNRI_SUP_0
-301    0x7000    //TX_SNRI_SUP_1
-302    0x7000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0016    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x6000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x6000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7CCD    //TX_LAMBDA_PFILT_S_0
-340    0x7CCD    //TX_LAMBDA_PFILT_S_1
-341    0x7CCD    //TX_LAMBDA_PFILT_S_2
-342    0x7CCD    //TX_LAMBDA_PFILT_S_3
-343    0x7CCD    //TX_LAMBDA_PFILT_S_4
-344    0x7CCD    //TX_LAMBDA_PFILT_S_5
-345    0x7CCD    //TX_LAMBDA_PFILT_S_6
-346    0x7CCD    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0500    //TX_A_PEPPER
-349    0x1600    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x04E8    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x02A6    //TX_NOISE_TH_1
-371    0x04B0    //TX_NOISE_TH_2
-372    0x3194    //TX_NOISE_TH_3
-373    0x0960    //TX_NOISE_TH_4
-374    0x5555    //TX_NOISE_TH_5
-375    0x3FF4    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x02BC    //TX_NOISE_TH_6
-379    0x02BC    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x04E7    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0001    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7B02    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0013    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0020    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7B02    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0500    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
-180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -32198,7 +26858,7 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
+150    0x7000    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
 152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0200    //TX_MIN_EQ_RE_EST_1
@@ -32219,7 +26879,7 @@
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0200    //TX_DT2_HOLD_N
+171    0x0050    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -32245,10 +26905,10 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7700    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x7148    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
@@ -32273,16 +26933,16 @@
 222    0x1000    //TX_ADPT_STRICT_H
 223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+225    0x1B58    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FF0    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x09C4    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -32292,8 +26952,8 @@
 241    0x0000    //TX_DT_RESRV_9
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -32301,7 +26961,7 @@
 250    0x0050    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0080    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x01A0    //TX_DELTA_THR_SN_EST_6
@@ -32315,12 +26975,12 @@
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
+267    0x0018    //TX_INBEAM_T
 268    0x0041    //TX_INBEAMHOLDT
 269    0x2000    //TX_G_STRICT
 270    0x2000    //TX_EQ_THR_BF
 271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
+272    0x0800    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
 274    0x0800    //TX_MAINREFRTOH_TH_H
 275    0x0800    //TX_MAINREFRTOH_TH_L
@@ -32330,7 +26990,7 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0017    //TX_NS_LVL_CTRL_1
+282    0x0015    //TX_NS_LVL_CTRL_1
 283    0x0015    //TX_NS_LVL_CTRL_2
 284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
@@ -32345,13 +27005,13 @@
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
+297    0x2000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1000    //TX_SNRI_SUP_1
+301    0x2400    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -32363,8 +27023,8 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
 317    0x1000    //TX_A_POST_FILT_S_3
 318    0x3000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
@@ -32373,7 +27033,7 @@
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
 324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
+325    0x1400    //TX_B_POST_FILT_3
 326    0x3000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -32395,7 +27055,7 @@
 344    0x7D00    //TX_LAMBDA_PFILT_S_5
 345    0x7900    //TX_LAMBDA_PFILT_S_6
 346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+347    0x0400    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -32406,7 +27066,7 @@
 355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+358    0x0080    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -32415,13 +27075,13 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0023    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
@@ -32864,8 +27524,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -32924,7 +27584,7 @@
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
 875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
@@ -32939,7 +27599,7 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -32948,19 +27608,19 @@
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0050    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x021C    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000C    //TX_MICMUTE_CVG_TIME
+903    0x0006    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7E90    //TX_DTD_THR1_MICMUTE_0
-912    0x7918    //TX_DTD_THR1_MICMUTE_1
+908    0x7B70    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x4000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7EF4    //TX_DTD_THR1_MICMUTE_0
+912    0x7D00    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
@@ -32992,8 +27652,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE0C0    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3BF6    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -33011,7 +27671,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA02C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -33033,7 +27693,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -33862,7 +28522,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA02C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -33884,7 +28544,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -34715,8 +29375,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -34870,9 +29530,9 @@
 149    0x0800    //TX_AEC_REF_GAIN_2
 150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
 156    0x0200    //TX_MIN_EQ_RE_EST_4
 157    0x0200    //TX_MIN_EQ_RE_EST_5
@@ -34882,14 +29542,14 @@
 161    0x1000    //TX_MIN_EQ_RE_EST_9
 162    0x1000    //TX_MIN_EQ_RE_EST_10
 163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
+164    0x6000    //TX_MIN_EQ_RE_EST_12
 165    0x4000    //TX_LAMBDA_RE_EST
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
 169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x01B0    //TX_DT2_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -34915,10 +29575,10 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x6D60    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
@@ -34931,7 +29591,7 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x07D0    //TX_DT_CUT_K
+213    0x05DC    //TX_DT_CUT_K
 214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -34943,7 +29603,7 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
 226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
@@ -34952,7 +29612,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -34963,7 +29623,7 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -35019,12 +29679,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -35035,7 +29695,7 @@
 314    0x5000    //TX_A_POST_FILT_S_0
 315    0x4C00    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x6000    //TX_A_POST_FILT_S_6
@@ -35043,7 +29703,7 @@
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+325    0x2000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -35060,7 +29720,7 @@
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
 341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
+342    0x7800    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -35075,7 +29735,7 @@
 354    0x0200    //TX_DT_BINVAD_TH_1
 355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1388    //TX_DT_BINVAD_ENDF
+357    0x05DC    //TX_DT_BINVAD_ENDF
 358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
@@ -35088,12 +29748,12 @@
 367    0x0032    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
+370    0x0320    //TX_NOISE_TH_1
 371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
@@ -35534,8 +30194,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -35617,19 +30277,19 @@
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03C0    //TX_MICMUTE_RATIO_THR
-900    0x0122    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0276    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x6590    //TX_DTD_THR1_MICMUTE_0
+911    0x7DC8    //TX_DTD_THR1_MICMUTE_0
 912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
@@ -35644,7 +30304,7 @@
 923    0x0001    //TX_MICMUTE_DT_CUT_THR
 924    0x03E8    //TX_MICMUTE_DT_CUT_K2
 925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -35663,7 +30323,7 @@
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
 944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+945    0x7EF4    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -35681,7 +30341,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA02C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -35703,7 +30363,7 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
@@ -36532,7 +31192,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA02C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -36554,7 +31214,7 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
@@ -37385,8 +32045,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -37538,9 +32198,9 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
+152    0x0600    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
 154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x3000    //TX_MIN_EQ_RE_EST_3
@@ -37554,12 +32214,12 @@
 163    0x7800    //TX_MIN_EQ_RE_EST_11
 164    0x7800    //TX_MIN_EQ_RE_EST_12
 165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
 169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -37585,8 +32245,8 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -37601,8 +32261,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -37613,8 +32273,8 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
@@ -37622,7 +32282,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -37633,15 +32293,15 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+245    0xF600    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0100    //TX_DELTA_THR_SN_EST_6
@@ -37677,10 +32337,10 @@
 286    0x0011    //TX_NS_LVL_CTRL_5
 287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
 291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
+292    0x0018    //TX_MIN_GAIN_S_3
 293    0x0020    //TX_MIN_GAIN_S_4
 294    0x0020    //TX_MIN_GAIN_S_5
 295    0x0020    //TX_MIN_GAIN_S_6
@@ -37689,12 +32349,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -37703,17 +32363,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x7FFF    //TX_A_POST_FILT_S_4
 319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
 324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
+325    0x1000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -37735,7 +32395,7 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -37745,8 +32405,8 @@
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
 356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -37760,9 +32420,9 @@
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
+372    0x300C    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
@@ -37967,10 +32627,10 @@
 576    0x4E45    //TX_FDEQ_GAIN_9
 577    0x494A    //TX_FDEQ_GAIN_10
 578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5C6E    //TX_FDEQ_GAIN_13
-581    0x687E    //TX_FDEQ_GAIN_14
-582    0x8890    //TX_FDEQ_GAIN_15
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -38204,8 +32864,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -38288,21 +32948,21 @@
 897    0x2379    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x01C2    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
 911    0x7918    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x3A98    //TX_DTD_THR1_MICMUTE_2
-914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
 916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
 917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
@@ -38332,8 +32992,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -39202,7 +33862,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0x002C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -40055,8 +34715,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -42723,10 +37383,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0600    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0018    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E60    //TX_FDEQ_GAIN_6
+574    0x5C52    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x002C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -43691,7 +41021,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x2024    //RX_RECVFUNC_MODE_0
+0    0xA024    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -44542,7 +41872,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2024    //RX_RECVFUNC_MODE_0
+157    0xA024    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -45395,8 +42725,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
@@ -46361,7 +43691,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x2024    //RX_RECVFUNC_MODE_0
+0    0xA024    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -47212,7 +44542,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2024    //RX_RECVFUNC_MODE_0
+157    0xA024    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -48065,8 +45395,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -49882,7 +47212,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2024    //RX_RECVFUNC_MODE_0
+157    0x0024    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -50735,8 +48065,8 @@
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
@@ -53403,10 +50733,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x0024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0021    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0021    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0037    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -54393,9 +54393,9 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
+24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
@@ -54499,7 +54499,7 @@
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0B50    //RX_MAX_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -54560,8 +54560,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -54625,7 +54625,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003D    //RX_SPK_VOL
+129    0x004E    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -54659,8 +54659,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -54724,7 +54724,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005C    //RX_SPK_VOL
+129    0x006F    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -54758,8 +54758,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -54823,7 +54823,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0087    //RX_SPK_VOL
+129    0x00A0    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -54857,8 +54857,8 @@
 43    0x8E89    //RX_FDEQ_GAIN_4
 44    0x7B71    //RX_FDEQ_GAIN_5
 45    0x6655    //RX_FDEQ_GAIN_6
-46    0x544F    //RX_FDEQ_GAIN_7
-47    0x4F4D    //RX_FDEQ_GAIN_8
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
 48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
@@ -54922,7 +54922,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00CE    //RX_SPK_VOL
+129    0x00E5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -54947,18 +54947,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x013B    //RX_TDDRC_DRC_GAIN
+124    0x0152    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x8484    //RX_FDEQ_GAIN_0
-40    0x805A    //RX_FDEQ_GAIN_1
-41    0x6060    //RX_FDEQ_GAIN_2
-42    0x707C    //RX_FDEQ_GAIN_3
-43    0x8681    //RX_FDEQ_GAIN_4
-44    0x776D    //RX_FDEQ_GAIN_5
-45    0x5E55    //RX_FDEQ_GAIN_6
-46    0x5448    //RX_FDEQ_GAIN_7
-47    0x484D    //RX_FDEQ_GAIN_8
-48    0x5254    //RX_FDEQ_GAIN_9
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x544F    //RX_FDEQ_GAIN_7
+47    0x4F4D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -55046,18 +55046,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x020B    //RX_TDDRC_DRC_GAIN
+124    0x0217    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x8484    //RX_FDEQ_GAIN_0
-40    0x845A    //RX_FDEQ_GAIN_1
-41    0x6060    //RX_FDEQ_GAIN_2
-42    0x6E7E    //RX_FDEQ_GAIN_3
-43    0x8486    //RX_FDEQ_GAIN_4
-44    0x816D    //RX_FDEQ_GAIN_5
-45    0x5E55    //RX_FDEQ_GAIN_6
-46    0x5448    //RX_FDEQ_GAIN_7
-47    0x484D    //RX_FDEQ_GAIN_8
-48    0x5254    //RX_FDEQ_GAIN_9
+40    0x8466    //RX_FDEQ_GAIN_1
+41    0x6C5C    //RX_FDEQ_GAIN_2
+42    0x6782    //RX_FDEQ_GAIN_3
+43    0x988F    //RX_FDEQ_GAIN_4
+44    0x978A    //RX_FDEQ_GAIN_5
+45    0x6854    //RX_FDEQ_GAIN_6
+46    0x4F48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4949    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -55145,18 +55145,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x0382    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x7C7C    //RX_FDEQ_GAIN_0
-40    0x7C5E    //RX_FDEQ_GAIN_1
-41    0x6054    //RX_FDEQ_GAIN_2
-42    0x677A    //RX_FDEQ_GAIN_3
-43    0x908B    //RX_FDEQ_GAIN_4
-44    0x8B82    //RX_FDEQ_GAIN_5
-45    0x6450    //RX_FDEQ_GAIN_6
-46    0x4B41    //RX_FDEQ_GAIN_7
-47    0x3F41    //RX_FDEQ_GAIN_8
-48    0x5252    //RX_FDEQ_GAIN_9
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8466    //RX_FDEQ_GAIN_1
+41    0x6C5C    //RX_FDEQ_GAIN_2
+42    0x6782    //RX_FDEQ_GAIN_3
+43    0x988F    //RX_FDEQ_GAIN_4
+44    0x978A    //RX_FDEQ_GAIN_5
+45    0x6854    //RX_FDEQ_GAIN_6
+46    0x4F48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4949    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -56075,8 +56075,8 @@
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -57063,9 +57063,9 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
+24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
@@ -57169,7 +57169,7 @@
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0B50    //RX_MAX_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -57295,7 +57295,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x0049    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -57394,7 +57394,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0055    //RX_SPK_VOL
+129    0x006B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -57493,7 +57493,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0082    //RX_SPK_VOL
+129    0x0097    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -57592,7 +57592,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00C0    //RX_SPK_VOL
+129    0x00D5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -57617,7 +57617,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x012F    //RX_TDDRC_DRC_GAIN
+124    0x013A    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
 39    0x845C    //RX_FDEQ_GAIN_0
 40    0x5050    //RX_FDEQ_GAIN_1
@@ -57716,21 +57716,21 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01FF    //RX_TDDRC_DRC_GAIN
+124    0x01D8    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x5454    //RX_FDEQ_GAIN_1
-41    0x5A5D    //RX_FDEQ_GAIN_2
-42    0x7078    //RX_FDEQ_GAIN_3
-43    0x8078    //RX_FDEQ_GAIN_4
-44    0x7272    //RX_FDEQ_GAIN_5
-45    0x6761    //RX_FDEQ_GAIN_6
-46    0x635D    //RX_FDEQ_GAIN_7
-47    0x5A5E    //RX_FDEQ_GAIN_8
-48    0x6060    //RX_FDEQ_GAIN_9
-49    0x605C    //RX_FDEQ_GAIN_10
-50    0x5858    //RX_FDEQ_GAIN_11
-51    0x6460    //RX_FDEQ_GAIN_12
+39    0x7C5C    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5C53    //RX_FDEQ_GAIN_2
+42    0x5C6A    //RX_FDEQ_GAIN_3
+43    0x8186    //RX_FDEQ_GAIN_4
+44    0x8681    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x505B    //RX_FDEQ_GAIN_8
+48    0x5A51    //RX_FDEQ_GAIN_9
+49    0x4F4F    //RX_FDEQ_GAIN_10
+50    0x4F58    //RX_FDEQ_GAIN_11
+51    0x645B    //RX_FDEQ_GAIN_12
 52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -57748,7 +57748,7 @@
 66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
 68    0x0605    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
+69    0x0A0A    //RX_FDEQ_BIN_6
 70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
@@ -57817,18 +57817,18 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x032A    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x4F4F    //RX_FDEQ_GAIN_1
-41    0x5457    //RX_FDEQ_GAIN_2
-42    0x5C66    //RX_FDEQ_GAIN_3
-43    0x7982    //RX_FDEQ_GAIN_4
-44    0x827D    //RX_FDEQ_GAIN_5
+39    0x7C5C    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5C53    //RX_FDEQ_GAIN_2
+42    0x5C6A    //RX_FDEQ_GAIN_3
+43    0x8186    //RX_FDEQ_GAIN_4
+44    0x8681    //RX_FDEQ_GAIN_5
 45    0x6A52    //RX_FDEQ_GAIN_6
-46    0x5352    //RX_FDEQ_GAIN_7
-47    0x585F    //RX_FDEQ_GAIN_8
-48    0x5E55    //RX_FDEQ_GAIN_9
-49    0x5353    //RX_FDEQ_GAIN_10
-50    0x5358    //RX_FDEQ_GAIN_11
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x505B    //RX_FDEQ_GAIN_8
+48    0x5A51    //RX_FDEQ_GAIN_9
+49    0x4F4F    //RX_FDEQ_GAIN_10
+50    0x4F58    //RX_FDEQ_GAIN_11
 51    0x645B    //RX_FDEQ_GAIN_12
 52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
@@ -58745,8 +58745,8 @@
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -59839,7 +59839,7 @@
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0B50    //RX_MAX_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0058    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -59965,7 +59965,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x004D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -60064,7 +60064,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0054    //RX_SPK_VOL
+129    0x0073    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -60163,7 +60163,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0085    //RX_SPK_VOL
+129    0x00A2    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -60262,7 +60262,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00C7    //RX_SPK_VOL
+129    0x00E5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -60287,7 +60287,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0134    //RX_TDDRC_DRC_GAIN
+124    0x017B    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x8458    //RX_FDEQ_GAIN_0
 40    0x4B4B    //RX_FDEQ_GAIN_1
@@ -60361,7 +60361,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
+129    0x00D7    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -60388,21 +60388,21 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01EE    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x5150    //RX_FDEQ_GAIN_1
-41    0x555C    //RX_FDEQ_GAIN_2
-42    0x6E75    //RX_FDEQ_GAIN_3
-43    0x8077    //RX_FDEQ_GAIN_4
-44    0x756D    //RX_FDEQ_GAIN_5
-45    0x6667    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
 54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -60488,20 +60488,20 @@
 124    0x035A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x8468    //RX_FDEQ_GAIN_0
-40    0x4F4F    //RX_FDEQ_GAIN_1
-41    0x555A    //RX_FDEQ_GAIN_2
-42    0x6069    //RX_FDEQ_GAIN_3
-43    0x7D86    //RX_FDEQ_GAIN_4
-44    0x8682    //RX_FDEQ_GAIN_5
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
 45    0x7461    //RX_FDEQ_GAIN_6
 46    0x5352    //RX_FDEQ_GAIN_7
-47    0x5860    //RX_FDEQ_GAIN_8
+47    0x5460    //RX_FDEQ_GAIN_8
 48    0x5D5F    //RX_FDEQ_GAIN_9
-49    0x5A52    //RX_FDEQ_GAIN_10
-50    0x535A    //RX_FDEQ_GAIN_11
-51    0x6654    //RX_FDEQ_GAIN_12
-52    0x6068    //RX_FDEQ_GAIN_13
-53    0x6F69    //RX_FDEQ_GAIN_14
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
 54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -61415,8 +61415,8 @@
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -64083,10 +64083,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-TTY_HCO-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0000    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0073    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00E5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017B    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x6768    //RX_FDEQ_GAIN_6
+46    0x6D68    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x6668    //RX_FDEQ_GAIN_9
+49    0x645A    //RX_FDEQ_GAIN_10
+50    0x5A5E    //RX_FDEQ_GAIN_11
+51    0x6A58    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00D7    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01EE    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x035A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x858A    //RX_FDEQ_GAIN_4
+44    0x8A86    //RX_FDEQ_GAIN_5
+45    0x7461    //RX_FDEQ_GAIN_6
+46    0x5352    //RX_FDEQ_GAIN_7
+47    0x5460    //RX_FDEQ_GAIN_8
+48    0x5D5F    //RX_FDEQ_GAIN_9
+49    0x5A56    //RX_FDEQ_GAIN_10
+50    0x575A    //RX_FDEQ_GAIN_11
+51    0x624C    //RX_FDEQ_GAIN_12
+52    0x5C64    //RX_FDEQ_GAIN_13
+53    0x6761    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x7468    //RX_FDEQ_GAIN_9
+206    0x6060    //RX_FDEQ_GAIN_10
+207    0x6060    //RX_FDEQ_GAIN_11
+208    0x5C54    //RX_FDEQ_GAIN_12
+209    0x5450    //RX_FDEQ_GAIN_13
+210    0x5050    //RX_FDEQ_GAIN_14
+211    0x5860    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0308    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7EB8    //RX_TDDRC_SLANT_0
+274    0x2500    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0550    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0014    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0039    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0054    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0085    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00C7    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0134    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x6768    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01EE    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8464    //RX_FDEQ_GAIN_0
+197    0x5150    //RX_FDEQ_GAIN_1
+198    0x555C    //RX_FDEQ_GAIN_2
+199    0x6E75    //RX_FDEQ_GAIN_3
+200    0x8077    //RX_FDEQ_GAIN_4
+201    0x756D    //RX_FDEQ_GAIN_5
+202    0x6667    //RX_FDEQ_GAIN_6
+203    0x6D68    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x6668    //RX_FDEQ_GAIN_9
+206    0x645A    //RX_FDEQ_GAIN_10
+207    0x5A5E    //RX_FDEQ_GAIN_11
+208    0x6A58    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03AD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F4F    //RX_FDEQ_GAIN_1
+198    0x555A    //RX_FDEQ_GAIN_2
+199    0x6069    //RX_FDEQ_GAIN_3
+200    0x7D86    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7461    //RX_FDEQ_GAIN_6
+203    0x5352    //RX_FDEQ_GAIN_7
+204    0x5860    //RX_FDEQ_GAIN_8
+205    0x5D5F    //RX_FDEQ_GAIN_9
+206    0x5A52    //RX_FDEQ_GAIN_10
+207    0x535A    //RX_FDEQ_GAIN_11
+208    0x6654    //RX_FDEQ_GAIN_12
+209    0x6068    //RX_FDEQ_GAIN_13
+210    0x6F69    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -64238,7 +66908,7 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
+150    0x7000    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
 152    0x0200    //TX_MIN_EQ_RE_EST_0
 153    0x0200    //TX_MIN_EQ_RE_EST_1
@@ -64259,7 +66929,7 @@
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0200    //TX_DT2_HOLD_N
+171    0x0050    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -64285,10 +66955,10 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7700    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x7148    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
@@ -64313,16 +66983,16 @@
 222    0x1000    //TX_ADPT_STRICT_H
 223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+225    0x1B58    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FF0    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+234    0x09C4    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -64332,8 +67002,8 @@
 241    0x0000    //TX_DT_RESRV_9
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -64341,7 +67011,7 @@
 250    0x0050    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0080    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x01A0    //TX_DELTA_THR_SN_EST_6
@@ -64355,12 +67025,12 @@
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
+267    0x0018    //TX_INBEAM_T
 268    0x0041    //TX_INBEAMHOLDT
 269    0x2000    //TX_G_STRICT
 270    0x2000    //TX_EQ_THR_BF
 271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
+272    0x0800    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
 274    0x0800    //TX_MAINREFRTOH_TH_H
 275    0x0800    //TX_MAINREFRTOH_TH_L
@@ -64370,7 +67040,7 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0017    //TX_NS_LVL_CTRL_1
+282    0x0015    //TX_NS_LVL_CTRL_1
 283    0x0015    //TX_NS_LVL_CTRL_2
 284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
@@ -64385,13 +67055,13 @@
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
+297    0x2000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1000    //TX_SNRI_SUP_1
+301    0x2400    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -64403,8 +67073,8 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
 317    0x1000    //TX_A_POST_FILT_S_3
 318    0x3000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
@@ -64413,7 +67083,7 @@
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
 324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
+325    0x1400    //TX_B_POST_FILT_3
 326    0x3000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -64435,7 +67105,7 @@
 344    0x7D00    //TX_LAMBDA_PFILT_S_5
 345    0x7900    //TX_LAMBDA_PFILT_S_6
 346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
+347    0x0400    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -64446,7 +67116,7 @@
 355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+358    0x0080    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -64455,13 +67125,13 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
+367    0x0023    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
@@ -64904,8 +67574,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -64964,7 +67634,7 @@
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
 875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
@@ -64979,7 +67649,7 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -64988,19 +67658,19 @@
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x0050    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x021C    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x000C    //TX_MICMUTE_CVG_TIME
+903    0x0006    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7E90    //TX_DTD_THR1_MICMUTE_0
-912    0x7918    //TX_DTD_THR1_MICMUTE_1
+908    0x7B70    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x4000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7EF4    //TX_DTD_THR1_MICMUTE_0
+912    0x7D00    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
@@ -65032,8 +67702,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE0C0    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3BF6    //TX_AMS_RESRV_02
+945    0x7F26    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -66755,8 +69425,8 @@
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -66910,9 +69580,9 @@
 149    0x0800    //TX_AEC_REF_GAIN_2
 150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
 156    0x0200    //TX_MIN_EQ_RE_EST_4
 157    0x0200    //TX_MIN_EQ_RE_EST_5
@@ -66922,14 +69592,14 @@
 161    0x1000    //TX_MIN_EQ_RE_EST_9
 162    0x1000    //TX_MIN_EQ_RE_EST_10
 163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
+164    0x6000    //TX_MIN_EQ_RE_EST_12
 165    0x4000    //TX_LAMBDA_RE_EST
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
 169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x01B0    //TX_DT2_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -66955,10 +69625,10 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x6D60    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
@@ -66971,7 +69641,7 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x07D0    //TX_DT_CUT_K
+213    0x05DC    //TX_DT_CUT_K
 214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -66983,7 +69653,7 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01CC    //TX_RATIO_DT_L_TH_HIGH
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
 226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
@@ -66992,7 +69662,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x015E    //TX_RATIO_DT_L0_TH_HIGH
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -67003,7 +69673,7 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -67059,12 +69729,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x4000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -67075,7 +69745,7 @@
 314    0x5000    //TX_A_POST_FILT_S_0
 315    0x4C00    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x6000    //TX_A_POST_FILT_S_6
@@ -67083,7 +69753,7 @@
 322    0x2000    //TX_B_POST_FILT_0
 323    0x2000    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+325    0x2000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -67100,7 +69770,7 @@
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
 340    0x7C00    //TX_LAMBDA_PFILT_S_1
 341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
+342    0x7800    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -67115,7 +69785,7 @@
 354    0x0200    //TX_DT_BINVAD_TH_1
 355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1388    //TX_DT_BINVAD_ENDF
+357    0x05DC    //TX_DT_BINVAD_ENDF
 358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
@@ -67128,12 +69798,12 @@
 367    0x0032    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
+370    0x0320    //TX_NOISE_TH_1
 371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
@@ -67574,8 +70244,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -67657,19 +70327,19 @@
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
-899    0x03C0    //TX_MICMUTE_RATIO_THR
-900    0x0122    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0276    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x6590    //TX_DTD_THR1_MICMUTE_0
+911    0x7DC8    //TX_DTD_THR1_MICMUTE_0
 912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
@@ -67684,7 +70354,7 @@
 923    0x0001    //TX_MICMUTE_DT_CUT_THR
 924    0x03E8    //TX_MICMUTE_DT_CUT_K2
 925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
@@ -67703,7 +70373,7 @@
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
 944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+945    0x7EF4    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -69425,8 +72095,8 @@
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -69578,9 +72248,9 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
+152    0x0600    //TX_MIN_EQ_RE_EST_0
 153    0x0600    //TX_MIN_EQ_RE_EST_1
 154    0x3000    //TX_MIN_EQ_RE_EST_2
 155    0x3000    //TX_MIN_EQ_RE_EST_3
@@ -69594,12 +72264,12 @@
 163    0x7800    //TX_MIN_EQ_RE_EST_11
 164    0x7800    //TX_MIN_EQ_RE_EST_12
 165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
 169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -69625,8 +72295,8 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
@@ -69641,8 +72311,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -69653,8 +72323,8 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
 228    0x7FFF    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
@@ -69662,7 +72332,7 @@
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -69673,15 +72343,15 @@
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+245    0xF600    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0100    //TX_DELTA_THR_SN_EST_6
@@ -69717,10 +72387,10 @@
 286    0x0011    //TX_NS_LVL_CTRL_5
 287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
 291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
+292    0x0018    //TX_MIN_GAIN_S_3
 293    0x0020    //TX_MIN_GAIN_S_4
 294    0x0020    //TX_MIN_GAIN_S_5
 295    0x0020    //TX_MIN_GAIN_S_6
@@ -69729,12 +72399,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -69743,17 +72413,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x7FFF    //TX_A_POST_FILT_S_4
 319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
 324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
+325    0x1000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -69775,7 +72445,7 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0400    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
@@ -69785,8 +72455,8 @@
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
 356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -69800,9 +72470,9 @@
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
+372    0x300C    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
@@ -70007,10 +72677,10 @@
 576    0x4E45    //TX_FDEQ_GAIN_9
 577    0x494A    //TX_FDEQ_GAIN_10
 578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5C6E    //TX_FDEQ_GAIN_13
-581    0x687E    //TX_FDEQ_GAIN_14
-582    0x8890    //TX_FDEQ_GAIN_15
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -70244,8 +72914,8 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
@@ -70328,21 +72998,21 @@
 897    0x2379    //TX_SENDFUNC_REG_MICMUTE
 898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
 899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x01C2    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
 911    0x7918    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x3A98    //TX_DTD_THR1_MICMUTE_2
-914    0x32C8    //TX_DTD_THR1_MICMUTE_3
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
 916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
 917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
@@ -70372,8 +73042,8 @@
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
 943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
 946    0x0000    //TX_AMS_RESRV_04
 947    0x0000    //TX_AMS_RESRV_05
 948    0x0000    //TX_AMS_RESRV_06
@@ -71242,7 +73912,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2040    //RX_RECVFUNC_MODE_0
+157    0x0040    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -72095,8 +74765,8 @@
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -74763,10 +77433,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-TTY_VCO-RESERVE2-SWB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00F3    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0600    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0300    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x6D60    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x09C4    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0708    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0024    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0018    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0018    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x07D0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E60    //TX_FDEQ_GAIN_6
+574    0x5C52    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4E45    //TX_FDEQ_GAIN_9
+577    0x494A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x5C50    //TX_FDEQ_GAIN_12
+580    0x5466    //TX_FDEQ_GAIN_13
+581    0x6076    //TX_FDEQ_GAIN_14
+582    0x8088    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0320    //TX_MICMUTE_RATIO_THR
+900    0x02B0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7918    //TX_DTD_THR1_MICMUTE_0
+912    0x797C    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_AMS_RESRV_01
+944    0x3B38    //TX_AMS_RESRV_02
+945    0x7E2C    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x2040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-NB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -77435,8 +82775,8 @@
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-WB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -80105,8 +85445,8 @@
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -81922,7 +87262,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2040    //RX_RECVFUNC_MODE_0
+157    0x0040    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -82775,8 +88115,8 @@
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-FB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
@@ -85443,19 +90783,5359 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-USB_BLACKBIRD-RESERVE2-SWB
+#CASE_NAME  HEADSET-TTY_FULL-RESERVE2-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0000    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x2040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0000    //RX_FENS_RESRV_1
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-NB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
+1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x6F68    //TX_SENDFUNC_MODE_0
+3    0x2B68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7CCC    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6333    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0010    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x1000    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x0064    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x2000    //TX_DTD_THR2_3
+208    0x2000    //TX_DTD_THR2_4
+209    0x2000    //TX_DTD_THR2_5
+210    0x2000    //TX_DTD_THR2_6
+211    0x4100    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x1000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0010    //TX_EPD_OFFSET_00
+233    0x0010    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xFA00    //TX_THR_SN_EST_6
+249    0xFA00    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0000    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0400    //TX_B_POST_FLT_0
+280    0x0400    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0010    //TX_NS_LVL_CTRL_1
+283    0x0010    //TX_NS_LVL_CTRL_2
+284    0x0010    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000D    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000D    //TX_MIN_GAIN_S_3
+293    0x000D    //TX_MIN_GAIN_S_4
+294    0x000D    //TX_MIN_GAIN_S_5
+295    0x000D    //TX_MIN_GAIN_S_6
+296    0x000D    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0014    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x4000    //TX_A_POST_FILT_S_7
+322    0x0400    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x0400    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x003B    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x02BC    //TX_NOISE_TH_1
+371    0x1F40    //TX_NOISE_TH_2
+372    0x4650    //TX_NOISE_TH_3
+373    0x7148    //TX_NOISE_TH_4
+374    0x044C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0032    //TX_NOISE_TH_6
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0280    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2400    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x6048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4844    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0401    //TX_FDEQ_BIN_0
+592    0x0103    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0010    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0802    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0010    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0802    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0010    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0802    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x000B    //TX_GAIN_LIMIT_0
+774    0x000B    //TX_GAIN_LIMIT_1
+775    0x000B    //TX_GAIN_LIMIT_2
+776    0x000B    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0xA02C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA02C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-WB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
 9    0x000A    //TX_FRAME_SZ
 10    0x0000    //TX_DELAY_OPT
@@ -85576,11 +96256,11 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
+128    0x7D83    //TX_A_HP
 129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
 133    0x0008    //TX_PITCH_BFR_LEN
 134    0x0003    //TX_SBD_PITCH_DET
 135    0x0050    //TX_TD_AEC_L
@@ -85598,7 +96278,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6D60    //TX_EAD_THR
+150    0x7000    //TX_EAD_THR
 151    0x0800    //TX_THR_RE_EST
 152    0x0800    //TX_MIN_EQ_RE_EST_0
 153    0x0800    //TX_MIN_EQ_RE_EST_1
@@ -85645,21 +96325,21 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x6590    //TX_DTD_THR1_0
-198    0x7D00    //TX_DTD_THR1_1
-199    0x6590    //TX_DTD_THR1_2
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
 200    0x7FFF    //TX_DTD_THR1_3
 201    0x7FFF    //TX_DTD_THR1_4
 202    0x7FFF    //TX_DTD_THR1_5
 203    0x7FFF    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
 213    0x0BB8    //TX_DT_CUT_K
 214    0x0CCD    //TX_DT_CUT_THR
@@ -85680,8 +96360,8 @@
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
 234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
@@ -85691,20 +96371,20 @@
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
 242    0xFA00    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xF700    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
 247    0xF400    //TX_THR_SN_EST_5
 248    0xF400    //TX_THR_SN_EST_6
 249    0xF600    //TX_THR_SN_EST_7
 250    0x0000    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
+256    0x0000    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x6000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -85730,17 +96410,17 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0012    //TX_NS_LVL_CTRL_3
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x001C    //TX_NS_LVL_CTRL_6
+287    0x000F    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
 290    0x000F    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x0009    //TX_MIN_GAIN_S_3
+292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
 295    0x000C    //TX_MIN_GAIN_S_6
@@ -85749,12 +96429,12 @@
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x5000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
 304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x3000    //TX_SNRI_SUP_6
+306    0x7FFF    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x000E    //TX_G_LFNS
@@ -85772,7 +96452,7 @@
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
 323    0x1000    //TX_B_POST_FILT_1
-324    0x3000    //TX_B_POST_FILT_2
+324    0x1000    //TX_B_POST_FILT_2
 325    0x1000    //TX_B_POST_FILT_3
 326    0x1000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
@@ -85789,14 +96469,14 @@
 338    0x7CCD    //TX_LAMBDA_PFILT
 339    0x7B00    //TX_LAMBDA_PFILT_S_0
 340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7000    //TX_LAMBDA_PFILT_S_2
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
 342    0x7B00    //TX_LAMBDA_PFILT_S_3
 343    0x7B00    //TX_LAMBDA_PFILT_S_4
 344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7F00    //TX_LAMBDA_PFILT_S_6
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
 346    0x7B00    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
+348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0800    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -85815,19 +96495,19 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x00FA    //TX_NOISE_TH_0
+367    0x0102    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x0C80    //TX_NOISE_TH_1
+370    0x07D0    //TX_NOISE_TH_1
 371    0x00C8    //TX_NOISE_TH_2
-372    0x2904    //TX_NOISE_TH_3
-373    0x07D0    //TX_NOISE_TH_4
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
 374    0x157C    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x7FFF    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x044C    //TX_NOISE_TH_6
-379    0x044C    //TX_MINENOISE_TH
+379    0x00F8    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x3A98    //TX_RATIODTL_CUT_TH
@@ -85849,18 +96529,18 @@
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
+401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0064    //TX_MINENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
 414    0x1800    //TX_RHO_UPB
 415    0x0BB8    //TX_N_HOLD_HS
@@ -85945,8 +96625,8 @@
 494    0x0000    //TX_DFLT_SRC_LOC_2
 495    0x038E    //TX_DOA_TRACK_VADTH
 496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
 499    0x2000    //TX_MU_BF_ADPT_NS
 500    0x0000    //TX_ADAPT_LEN
 501    0x6666    //TX_MORE_SNS
@@ -86014,23 +96694,23 @@
 563    0x0000    //TX_BVE_OUT_N
 564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x5850    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4040    //TX_FDEQ_GAIN_6
-574    0x4040    //TX_FDEQ_GAIN_7
-575    0x4040    //TX_FDEQ_GAIN_8
-576    0x3838    //TX_FDEQ_GAIN_9
-577    0x3838    //TX_FDEQ_GAIN_10
-578    0x3828    //TX_FDEQ_GAIN_11
-579    0x2828    //TX_FDEQ_GAIN_12
-580    0x2828    //TX_FDEQ_GAIN_13
-581    0x1C1C    //TX_FDEQ_GAIN_14
-582    0x1C1C    //TX_FDEQ_GAIN_15
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -86040,7 +96720,7 @@
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
 591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
+592    0x0302    //TX_FDEQ_BIN_1
 593    0x0303    //TX_FDEQ_BIN_2
 594    0x0304    //TX_FDEQ_BIN_3
 595    0x0405    //TX_FDEQ_BIN_4
@@ -86048,13 +96728,13 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x284A    //TX_FDEQ_BIN_15
+600    0x0D07    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1119    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
 608    0x0000    //TX_FDEQ_BIN_17
 609    0x0000    //TX_FDEQ_BIN_18
@@ -86089,21 +96769,21 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
 656    0x0200    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
@@ -86138,21 +96818,21 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
 705    0x0200    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
@@ -86187,21 +96867,21 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
 754    0x0200    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
@@ -86218,28 +96898,28 @@
 767    0x0062    //TX_MIC_CALIBRATION_2
 768    0x0062    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0050    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0002    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
 780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
 781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
 782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
 787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -86281,7 +96961,7 @@
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
 832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
+833    0x0000    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
 836    0x4CCD    //TX_TPKA_FP_THD
@@ -86301,21 +96981,21 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
+853    0x0001    //TX_FILTINDX
 854    0x0000    //TX_TDDRC_THRD_0
-855    0x0020    //TX_TDDRC_THRD_1
+855    0x0000    //TX_TDDRC_THRD_1
 856    0x2000    //TX_TDDRC_THRD_2
 857    0x2000    //TX_TDDRC_THRD_3
 858    0x3000    //TX_TDDRC_SLANT_0
 859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
 870    0x0000    //TX_TFMASKLTHL
@@ -86323,13 +97003,13 @@
 872    0x0CCD    //TX_TFMASKLTH_BINVAD
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
 876    0x1000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
 880    0x5333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
 882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
 883    0x7333    //TX_FASTNS_OUTIN_TH
 884    0x0CCD    //TX_FASTNS_TFMASK_TH
@@ -86337,7 +97017,7 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0x8000    //TX_FASTNS_MASK5_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x4000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
@@ -86411,30 +97091,30 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x243C    //RX_RECVFUNC_MODE_0
+0    0xA02C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 10    0x0800    //RX_PGA
 11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
 16    0x0008    //RX_PITCH_BFR_LEN
 17    0x0003    //RX_SBD_PITCH_DET
 18    0x0100    //RX_PP_RESRV_0
 19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
+20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
 25    0x000A    //RX_FENS_RESRV_0
 26    0x0190    //RX_FENS_RESRV_1
@@ -86444,28 +97124,28 @@
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4E52    //RX_FDEQ_GAIN_0
-40    0x5252    //RX_FDEQ_GAIN_1
-41    0x5252    //RX_FDEQ_GAIN_2
-42    0x5250    //RX_FDEQ_GAIN_3
-43    0x4C46    //RX_FDEQ_GAIN_4
-44    0x4748    //RX_FDEQ_GAIN_5
-45    0x5768    //RX_FDEQ_GAIN_6
-46    0x6162    //RX_FDEQ_GAIN_7
-47    0x5252    //RX_FDEQ_GAIN_8
-48    0x5256    //RX_FDEQ_GAIN_9
-49    0x5248    //RX_FDEQ_GAIN_10
-50    0x3434    //RX_FDEQ_GAIN_11
-51    0x3436    //RX_FDEQ_GAIN_12
-52    0x2A18    //RX_FDEQ_GAIN_13
-53    0x1830    //RX_FDEQ_GAIN_14
-54    0x3648    //RX_FDEQ_GAIN_15
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -86484,12 +97164,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -86525,21 +97205,21 @@
 111    0x0002    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x023E    //RX_TDDRC_DRC_GAIN
+124    0x0196    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x0D90    //RX_TPKA_FP
-127    0x032D    //RX_MIN_G_FP
-128    0x0A00    //RX_MAX_G_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
 129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -86569,43 +97249,43 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7220    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04CA    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6270    //RX_FDEQ_GAIN_0
-40    0x7A70    //RX_FDEQ_GAIN_1
-41    0x7270    //RX_FDEQ_GAIN_2
-42    0x6A70    //RX_FDEQ_GAIN_3
-43    0x645A    //RX_FDEQ_GAIN_4
-44    0x5A5E    //RX_FDEQ_GAIN_5
-45    0x6E72    //RX_FDEQ_GAIN_6
-46    0x7268    //RX_FDEQ_GAIN_7
-47    0x665A    //RX_FDEQ_GAIN_8
-48    0x5A5A    //RX_FDEQ_GAIN_9
-49    0x5A64    //RX_FDEQ_GAIN_10
-50    0x6448    //RX_FDEQ_GAIN_11
-51    0x4949    //RX_FDEQ_GAIN_12
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -86627,12 +97307,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -86665,46 +97345,46 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7220    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04CA    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6270    //RX_FDEQ_GAIN_0
-40    0x7A70    //RX_FDEQ_GAIN_1
-41    0x7270    //RX_FDEQ_GAIN_2
-42    0x6A70    //RX_FDEQ_GAIN_3
-43    0x645A    //RX_FDEQ_GAIN_4
-44    0x5A5E    //RX_FDEQ_GAIN_5
-45    0x6E72    //RX_FDEQ_GAIN_6
-46    0x7268    //RX_FDEQ_GAIN_7
-47    0x665A    //RX_FDEQ_GAIN_8
-48    0x5A5A    //RX_FDEQ_GAIN_9
-49    0x5A64    //RX_FDEQ_GAIN_10
-50    0x6448    //RX_FDEQ_GAIN_11
-51    0x4949    //RX_FDEQ_GAIN_12
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -86726,12 +97406,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -86764,46 +97444,46 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0011    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7220    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04CA    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6270    //RX_FDEQ_GAIN_0
-40    0x7A70    //RX_FDEQ_GAIN_1
-41    0x7270    //RX_FDEQ_GAIN_2
-42    0x6A70    //RX_FDEQ_GAIN_3
-43    0x645A    //RX_FDEQ_GAIN_4
-44    0x5A5E    //RX_FDEQ_GAIN_5
-45    0x6E72    //RX_FDEQ_GAIN_6
-46    0x7268    //RX_FDEQ_GAIN_7
-47    0x665A    //RX_FDEQ_GAIN_8
-48    0x5A5A    //RX_FDEQ_GAIN_9
-49    0x5A64    //RX_FDEQ_GAIN_10
-50    0x6448    //RX_FDEQ_GAIN_11
-51    0x4949    //RX_FDEQ_GAIN_12
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -86825,12 +97505,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -86863,46 +97543,46 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7220    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04CA    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6270    //RX_FDEQ_GAIN_0
-40    0x7A70    //RX_FDEQ_GAIN_1
-41    0x7270    //RX_FDEQ_GAIN_2
-42    0x6A70    //RX_FDEQ_GAIN_3
-43    0x645A    //RX_FDEQ_GAIN_4
-44    0x5A5E    //RX_FDEQ_GAIN_5
-45    0x6E72    //RX_FDEQ_GAIN_6
-46    0x7268    //RX_FDEQ_GAIN_7
-47    0x665A    //RX_FDEQ_GAIN_8
-48    0x5A5A    //RX_FDEQ_GAIN_9
-49    0x5A64    //RX_FDEQ_GAIN_10
-50    0x6448    //RX_FDEQ_GAIN_11
-51    0x4949    //RX_FDEQ_GAIN_12
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -86924,12 +97604,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -86962,46 +97642,46 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0030    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7220    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04CA    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6270    //RX_FDEQ_GAIN_0
-40    0x7A70    //RX_FDEQ_GAIN_1
-41    0x7270    //RX_FDEQ_GAIN_2
-42    0x6A70    //RX_FDEQ_GAIN_3
-43    0x645A    //RX_FDEQ_GAIN_4
-44    0x5A5E    //RX_FDEQ_GAIN_5
-45    0x6E72    //RX_FDEQ_GAIN_6
-46    0x7268    //RX_FDEQ_GAIN_7
-47    0x665A    //RX_FDEQ_GAIN_8
-48    0x5A5A    //RX_FDEQ_GAIN_9
-49    0x5A64    //RX_FDEQ_GAIN_10
-50    0x6448    //RX_FDEQ_GAIN_11
-51    0x4949    //RX_FDEQ_GAIN_12
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -87023,12 +97703,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -87061,46 +97741,46 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
+129    0x005B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7220    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04CA    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6270    //RX_FDEQ_GAIN_0
-40    0x7A70    //RX_FDEQ_GAIN_1
-41    0x7270    //RX_FDEQ_GAIN_2
-42    0x6A70    //RX_FDEQ_GAIN_3
-43    0x645A    //RX_FDEQ_GAIN_4
-44    0x5A5E    //RX_FDEQ_GAIN_5
-45    0x6E72    //RX_FDEQ_GAIN_6
-46    0x7268    //RX_FDEQ_GAIN_7
-47    0x665A    //RX_FDEQ_GAIN_8
-48    0x5A5A    //RX_FDEQ_GAIN_9
-49    0x5A64    //RX_FDEQ_GAIN_10
-50    0x6448    //RX_FDEQ_GAIN_11
-51    0x4949    //RX_FDEQ_GAIN_12
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -87122,12 +97802,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -87160,46 +97840,46 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0089    //RX_SPK_VOL
+129    0x0099    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7220    //RX_TDDRC_LIMITER_THRD
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x04CA    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6270    //RX_FDEQ_GAIN_0
-40    0x7A70    //RX_FDEQ_GAIN_1
-41    0x7270    //RX_FDEQ_GAIN_2
-42    0x6A70    //RX_FDEQ_GAIN_3
-43    0x645A    //RX_FDEQ_GAIN_4
-44    0x5A5E    //RX_FDEQ_GAIN_5
-45    0x6E72    //RX_FDEQ_GAIN_6
-46    0x7268    //RX_FDEQ_GAIN_7
-47    0x665A    //RX_FDEQ_GAIN_8
-48    0x5A5A    //RX_FDEQ_GAIN_9
-49    0x5A64    //RX_FDEQ_GAIN_10
-50    0x6448    //RX_FDEQ_GAIN_11
-51    0x4949    //RX_FDEQ_GAIN_12
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -87221,12 +97901,12 @@
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x284A    //RX_FDEQ_BIN_15
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -87262,30 +97942,30 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x243C    //RX_RECVFUNC_MODE_0
+157    0xA02C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 167    0x0800    //RX_PGA
 168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
 173    0x0008    //RX_PITCH_BFR_LEN
 174    0x0003    //RX_SBD_PITCH_DET
 175    0x0100    //RX_PP_RESRV_0
 176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
+177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
 182    0x000A    //RX_FENS_RESRV_0
 183    0x0190    //RX_FENS_RESRV_1
@@ -87295,28 +97975,28 @@
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4E52    //RX_FDEQ_GAIN_0
-197    0x5252    //RX_FDEQ_GAIN_1
-198    0x5252    //RX_FDEQ_GAIN_2
-199    0x5250    //RX_FDEQ_GAIN_3
-200    0x4C46    //RX_FDEQ_GAIN_4
-201    0x4748    //RX_FDEQ_GAIN_5
-202    0x5768    //RX_FDEQ_GAIN_6
-203    0x6162    //RX_FDEQ_GAIN_7
-204    0x5252    //RX_FDEQ_GAIN_8
-205    0x5256    //RX_FDEQ_GAIN_9
-206    0x5248    //RX_FDEQ_GAIN_10
-207    0x3434    //RX_FDEQ_GAIN_11
-208    0x3436    //RX_FDEQ_GAIN_12
-209    0x2A18    //RX_FDEQ_GAIN_13
-210    0x1830    //RX_FDEQ_GAIN_14
-211    0x3648    //RX_FDEQ_GAIN_15
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -87335,12 +98015,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -87376,21 +98056,21 @@
 268    0x0002    //RX_FILTINDX
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x023E    //RX_TDDRC_DRC_GAIN
+281    0x0196    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x0D90    //RX_TPKA_FP
-284    0x032D    //RX_MIN_G_FP
-285    0x0A00    //RX_MAX_G_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
 286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
@@ -87420,43 +98100,43 @@
 312    0x0000    //RX_BWE_RESRV_1
 313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7220    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04CA    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6270    //RX_FDEQ_GAIN_0
-197    0x7A70    //RX_FDEQ_GAIN_1
-198    0x7270    //RX_FDEQ_GAIN_2
-199    0x6A70    //RX_FDEQ_GAIN_3
-200    0x645A    //RX_FDEQ_GAIN_4
-201    0x5A5E    //RX_FDEQ_GAIN_5
-202    0x6E72    //RX_FDEQ_GAIN_6
-203    0x7268    //RX_FDEQ_GAIN_7
-204    0x665A    //RX_FDEQ_GAIN_8
-205    0x5A5A    //RX_FDEQ_GAIN_9
-206    0x5A64    //RX_FDEQ_GAIN_10
-207    0x6448    //RX_FDEQ_GAIN_11
-208    0x4949    //RX_FDEQ_GAIN_12
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
 209    0x4848    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -87478,12 +98158,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -87516,46 +98196,46 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7220    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04CA    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6270    //RX_FDEQ_GAIN_0
-197    0x7A70    //RX_FDEQ_GAIN_1
-198    0x7270    //RX_FDEQ_GAIN_2
-199    0x6A70    //RX_FDEQ_GAIN_3
-200    0x645A    //RX_FDEQ_GAIN_4
-201    0x5A5E    //RX_FDEQ_GAIN_5
-202    0x6E72    //RX_FDEQ_GAIN_6
-203    0x7268    //RX_FDEQ_GAIN_7
-204    0x665A    //RX_FDEQ_GAIN_8
-205    0x5A5A    //RX_FDEQ_GAIN_9
-206    0x5A64    //RX_FDEQ_GAIN_10
-207    0x6448    //RX_FDEQ_GAIN_11
-208    0x4949    //RX_FDEQ_GAIN_12
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
 209    0x4848    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -87577,12 +98257,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -87615,46 +98295,46 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0011    //RX_SPK_VOL
+286    0x0013    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7220    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04CA    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6270    //RX_FDEQ_GAIN_0
-197    0x7A70    //RX_FDEQ_GAIN_1
-198    0x7270    //RX_FDEQ_GAIN_2
-199    0x6A70    //RX_FDEQ_GAIN_3
-200    0x645A    //RX_FDEQ_GAIN_4
-201    0x5A5E    //RX_FDEQ_GAIN_5
-202    0x6E72    //RX_FDEQ_GAIN_6
-203    0x7268    //RX_FDEQ_GAIN_7
-204    0x665A    //RX_FDEQ_GAIN_8
-205    0x5A5A    //RX_FDEQ_GAIN_9
-206    0x5A64    //RX_FDEQ_GAIN_10
-207    0x6448    //RX_FDEQ_GAIN_11
-208    0x4949    //RX_FDEQ_GAIN_12
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
 209    0x4848    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -87676,12 +98356,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -87714,46 +98394,46 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001D    //RX_SPK_VOL
+286    0x0020    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7220    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04CA    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6270    //RX_FDEQ_GAIN_0
-197    0x7A70    //RX_FDEQ_GAIN_1
-198    0x7270    //RX_FDEQ_GAIN_2
-199    0x6A70    //RX_FDEQ_GAIN_3
-200    0x645A    //RX_FDEQ_GAIN_4
-201    0x5A5E    //RX_FDEQ_GAIN_5
-202    0x6E72    //RX_FDEQ_GAIN_6
-203    0x7268    //RX_FDEQ_GAIN_7
-204    0x665A    //RX_FDEQ_GAIN_8
-205    0x5A5A    //RX_FDEQ_GAIN_9
-206    0x5A64    //RX_FDEQ_GAIN_10
-207    0x6448    //RX_FDEQ_GAIN_11
-208    0x4949    //RX_FDEQ_GAIN_12
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
 209    0x4848    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -87775,12 +98455,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -87813,46 +98493,46 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0030    //RX_SPK_VOL
+286    0x0036    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7220    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04CA    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6270    //RX_FDEQ_GAIN_0
-197    0x7A70    //RX_FDEQ_GAIN_1
-198    0x7270    //RX_FDEQ_GAIN_2
-199    0x6A70    //RX_FDEQ_GAIN_3
-200    0x645A    //RX_FDEQ_GAIN_4
-201    0x5A5E    //RX_FDEQ_GAIN_5
-202    0x6E72    //RX_FDEQ_GAIN_6
-203    0x7268    //RX_FDEQ_GAIN_7
-204    0x665A    //RX_FDEQ_GAIN_8
-205    0x5A5A    //RX_FDEQ_GAIN_9
-206    0x5A64    //RX_FDEQ_GAIN_10
-207    0x6448    //RX_FDEQ_GAIN_11
-208    0x4949    //RX_FDEQ_GAIN_12
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
 209    0x4848    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -87874,12 +98554,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -87912,46 +98592,46 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0050    //RX_SPK_VOL
+286    0x005B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7220    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04CA    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6270    //RX_FDEQ_GAIN_0
-197    0x7A70    //RX_FDEQ_GAIN_1
-198    0x7270    //RX_FDEQ_GAIN_2
-199    0x6A70    //RX_FDEQ_GAIN_3
-200    0x645A    //RX_FDEQ_GAIN_4
-201    0x5A5E    //RX_FDEQ_GAIN_5
-202    0x6E72    //RX_FDEQ_GAIN_6
-203    0x7268    //RX_FDEQ_GAIN_7
-204    0x665A    //RX_FDEQ_GAIN_8
-205    0x5A5A    //RX_FDEQ_GAIN_9
-206    0x5A64    //RX_FDEQ_GAIN_10
-207    0x6448    //RX_FDEQ_GAIN_11
-208    0x4949    //RX_FDEQ_GAIN_12
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
 209    0x4848    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -87973,12 +98653,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -88011,46 +98691,46 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0089    //RX_SPK_VOL
+286    0x0099    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7220    //RX_TDDRC_LIMITER_THRD
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04CA    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6270    //RX_FDEQ_GAIN_0
-197    0x7A70    //RX_FDEQ_GAIN_1
-198    0x7270    //RX_FDEQ_GAIN_2
-199    0x6A70    //RX_FDEQ_GAIN_3
-200    0x645A    //RX_FDEQ_GAIN_4
-201    0x5A5E    //RX_FDEQ_GAIN_5
-202    0x6E72    //RX_FDEQ_GAIN_6
-203    0x7268    //RX_FDEQ_GAIN_7
-204    0x665A    //RX_FDEQ_GAIN_8
-205    0x5A5A    //RX_FDEQ_GAIN_9
-206    0x5A64    //RX_FDEQ_GAIN_10
-207    0x6448    //RX_FDEQ_GAIN_11
-208    0x4949    //RX_FDEQ_GAIN_12
+281    0x0196    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
 209    0x4848    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -88072,12 +98752,12 @@
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x284A    //RX_FDEQ_BIN_15
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -88113,10 +98793,10 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-GOOGLE_CONDOR-RESERVE2-SWB
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-SWB
 #PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -89932,7 +100612,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0x002C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -90783,10 +101463,2680 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-FB
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x6B6A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x7000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x04E8    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_EXTRA_NS_L
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_N2_SN_EST
+934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
+935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
+936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
+937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_AMS_RESRV_01
+944    0x0000    //TX_AMS_RESRV_02
+945    0x0000    //TX_AMS_RESRV_03
+946    0x0000    //TX_AMS_RESRV_04
+947    0x0000    //TX_AMS_RESRV_05
+948    0x0000    //TX_AMS_RESRV_06
+949    0x0000    //TX_AMS_RESRV_07
+950    0x0000    //TX_AMS_RESRV_08
+951    0x0000    //TX_AMS_RESRV_09
+952    0x0000    //TX_AMS_RESRV_10
+953    0x0000    //TX_AMS_RESRV_11
+954    0x0000    //TX_AMS_RESRV_12
+955    0x0000    //TX_AMS_RESRV_13
+956    0x0000    //TX_AMS_RESRV_14
+957    0x0000    //TX_AMS_RESRV_15
+958    0x0000    //TX_AMS_RESRV_16
+959    0x0000    //TX_AMS_RESRV_17
+960    0x0000    //TX_AMS_RESRV_18
+961    0x0000    //TX_AMS_RESRV_19
+#RX
+0    0x202C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x202C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_FENS_RESRV_0
+183    0x0190    //RX_FENS_RESRV_1
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-RESERVE1-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
+#PARAM_MODE  FULL
+#PARAM_TYPE TX+2RX
+#TOTAL_CUSTOM_STEP 7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
@@ -91751,7 +105101,7 @@
 960    0x0000    //TX_AMS_RESRV_18
 961    0x0000    //TX_AMS_RESRV_19
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0x002C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -92602,7 +105952,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0x002C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -93453,13353 +106803,3 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x00F3    //TX_PATCH_REG
-3    0x6F7D    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0019    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0400    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0260    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0001    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
-227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x001A    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x001A    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
-291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
-293    0x0020    //TX_MIN_GAIN_S_4
-294    0x0020    //TX_MIN_GAIN_S_5
-295    0x0020    //TX_MIN_GAIN_S_6
-296    0x0020    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
-318    0x7FFF    //TX_A_POST_FILT_S_4
-319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
-321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7F00    //TX_LAMBDA_PFILT
-339    0x7F00    //TX_LAMBDA_PFILT_S_0
-340    0x7F00    //TX_LAMBDA_PFILT_S_1
-341    0x7F00    //TX_LAMBDA_PFILT_S_2
-342    0x7F00    //TX_LAMBDA_PFILT_S_3
-343    0x7F00    //TX_LAMBDA_PFILT_S_4
-344    0x7F00    //TX_LAMBDA_PFILT_S_5
-345    0x7F00    //TX_LAMBDA_PFILT_S_6
-346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0040    //TX_DT_BINVAD_TH_0
-354    0x0040    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
-373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0DAC    //TX_NOISE_TH_6
-379    0x0050    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x07D0    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0005    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0050    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4850    //TX_FDEQ_GAIN_2
-570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4B48    //TX_FDEQ_GAIN_4
-572    0x484E    //TX_FDEQ_GAIN_5
-573    0x4E60    //TX_FDEQ_GAIN_6
-574    0x5C52    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x4E45    //TX_FDEQ_GAIN_9
-577    0x494A    //TX_FDEQ_GAIN_10
-578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5C6E    //TX_FDEQ_GAIN_13
-581    0x687E    //TX_FDEQ_GAIN_14
-582    0x8890    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x401E    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4849    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
-675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5354    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x5653    //TX_PREEQ_GAIN_MIC1_14
-681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
-682    0x4444    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x494B    //TX_PREEQ_GAIN_MIC2_6
-722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
-723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
-724    0x5051    //TX_PREEQ_GAIN_MIC2_9
-725    0x5255    //TX_PREEQ_GAIN_MIC2_10
-726    0x5754    //TX_PREEQ_GAIN_MIC2_11
-727    0x5454    //TX_PREEQ_GAIN_MIC2_12
-728    0x544F    //TX_PREEQ_GAIN_MIC2_13
-729    0x463D    //TX_PREEQ_GAIN_MIC2_14
-730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0203    //TX_PREEQ_BIN_MIC2_0
-740    0x0303    //TX_PREEQ_BIN_MIC2_1
-741    0x0304    //TX_PREEQ_BIN_MIC2_2
-742    0x0405    //TX_PREEQ_BIN_MIC2_3
-743    0x0506    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0809    //TX_PREEQ_BIN_MIC2_6
-746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
-747    0x0C10    //TX_PREEQ_BIN_MIC2_8
-748    0x1013    //TX_PREEQ_BIN_MIC2_9
-749    0x1414    //TX_PREEQ_BIN_MIC2_10
-750    0x261E    //TX_PREEQ_BIN_MIC2_11
-751    0x1E14    //TX_PREEQ_BIN_MIC2_12
-752    0x1414    //TX_PREEQ_BIN_MIC2_13
-753    0x2814    //TX_PREEQ_BIN_MIC2_14
-754    0x4022    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x13F4    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2379    //TX_SENDFUNC_REG_MICMUTE
-898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x01C2    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7918    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x3A98    //TX_DTD_THR1_MICMUTE_2
-914    0x32C8    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0013    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0020    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B80    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0383    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x044C    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x02F3    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0x8000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2024    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x5000    //RX_TDDRC_ALPHA_UP_1
-7    0x5000    //RX_TDDRC_ALPHA_UP_2
-8    0x5000    //RX_TDDRC_ALPHA_UP_3
-9    0x2000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x65AD    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x5000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01C8    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2024    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0021    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0037    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x5000    //RX_TDDRC_ALPHA_UP_1
-164    0x5000    //RX_TDDRC_ALPHA_UP_2
-165    0x5000    //RX_TDDRC_ALPHA_UP_3
-166    0x2000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x65AD    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x5000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01C8    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-TTY_HCO-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0000    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0078    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0302    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0000    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0000    //TX_MICS_OF_PAIR0
-38    0x0000    //TX_MICS_OF_PAIR1
-39    0x0000    //TX_MICS_OF_PAIR2
-40    0x0000    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0003    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x0000    //TX_HD_BIN_MASK
-53    0x0000    //TX_HD_SUBAND_MASK
-54    0x0000    //TX_HD_FRAME_AVG_MASK
-55    0x0000    //TX_HD_MIN_FRQ
-56    0x0000    //TX_HD_ALPHA_PSD
-57    0x0000    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0x0000    //TX_T_PSDVAT
-63    0x0000    //TX_CNT
-64    0x0000    //TX_ANTI_HOWL_GAIN
-65    0x0000    //TX_MICFORBFMARK_0
-66    0x0000    //TX_MICFORBFMARK_1
-67    0x0000    //TX_MICFORBFMARK_2
-68    0x0000    //TX_MICFORBFMARK_3
-69    0x0000    //TX_MICFORBFMARK_4
-70    0x0000    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x0000    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x0000    //TX_ADCS_GAIN
-112    0x0000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x7FFF    //TX_BLMIC_BLKFACTOR
-116    0x7FFF    //TX_BRMIC_BLKFACTOR
-117    0x000A    //TX_MICBLK_START_BIN
-118    0x0041    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x0000    //TX_FE_ENER_TH_MTS
-124    0x0000    //TX_FE_ENER_TH_EXP
-125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0020    //TX_MIC_BLOCK_N
-128    0x7652    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x7800    //TX_THR_PITCH_DET_0
-131    0x7000    //TX_THR_PITCH_DET_1
-132    0x6000    //TX_THR_PITCH_DET_2
-133    0x0000    //TX_PITCH_BFR_LEN
-134    0x0000    //TX_SBD_PITCH_DET
-135    0x0000    //TX_TD_AEC_L
-136    0x0000    //TX_MU0_UNP_TD_AEC
-137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x2000    //TX_AEC_REF_GAIN_0
-148    0x2000    //TX_AEC_REF_GAIN_1
-149    0x2000    //TX_AEC_REF_GAIN_2
-150    0x4000    //TX_EAD_THR
-151    0x0200    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0100    //TX_MIN_EQ_RE_EST_3
-156    0x0100    //TX_MIN_EQ_RE_EST_4
-157    0x0100    //TX_MIN_EQ_RE_EST_5
-158    0x0100    //TX_MIN_EQ_RE_EST_6
-159    0x0100    //TX_MIN_EQ_RE_EST_7
-160    0x0100    //TX_MIN_EQ_RE_EST_8
-161    0x0100    //TX_MIN_EQ_RE_EST_9
-162    0x0100    //TX_MIN_EQ_RE_EST_10
-163    0x0100    //TX_MIN_EQ_RE_EST_11
-164    0x0100    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x0000    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0008    //TX_SE_HOLD_N
-170    0x0050    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x0000    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x0000    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0000    //TX_FRQ_LIN_LEN
-184    0x0000    //TX_FRQ_AEC_LEN_RHO
-185    0x0000    //TX_MU0_UNP_FRQ_AEC
-186    0x0000    //TX_MU0_PTD_FRQ_AEC
-187    0x0000    //TX_MINENOISETH
-188    0x0000    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x0000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7333    //TX_DTD_THR1_0
-198    0x7333    //TX_DTD_THR1_1
-199    0x7333    //TX_DTD_THR1_2
-200    0x7333    //TX_DTD_THR1_3
-201    0x7333    //TX_DTD_THR1_4
-202    0x7333    //TX_DTD_THR1_5
-203    0x7333    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0400    //TX_DT_CUT_K
-214    0x0000    //TX_DT_CUT_THR
-215    0x0000    //TX_COMFORT_G
-216    0x0000    //TX_POWER_YOUT_TH
-217    0x0000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x0800    //TX_B_POST_FILT_ECHO_H
-230    0x0000    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x0000    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0000    //TX_DT_RESRV_7
-240    0x0000    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF800    //TX_THR_SN_EST_2
-245    0xF600    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0A00    //TX_N_SN_EST
-267    0x0000    //TX_INBEAM_T
-268    0x0000    //TX_INBEAMHOLDT
-269    0x1FFF    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x1000    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x0000    //TX_B_POST_FLT_0
-280    0x0000    //TX_B_POST_FLT_1
-281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x000C    //TX_NS_LVL_CTRL_3
-285    0x000C    //TX_NS_LVL_CTRL_4
-286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x001A    //TX_NS_LVL_CTRL_6
-288    0x000C    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0014    //TX_MIN_GAIN_S_1
-291    0x0014    //TX_MIN_GAIN_S_2
-292    0x0014    //TX_MIN_GAIN_S_3
-293    0x0014    //TX_MIN_GAIN_S_4
-294    0x0014    //TX_MIN_GAIN_S_5
-295    0x0014    //TX_MIN_GAIN_S_6
-296    0x0014    //TX_MIN_GAIN_S_7
-297    0x0000    //TX_NMOS_SUP
-298    0x0064    //TX_NS_MAX_PRI_SNR_TH
-299    0x7FFF    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x1200    //TX_THR_LFNS
-309    0x0147    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x7FFF    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x7FFF    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x1000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
-317    0x6666    //TX_A_POST_FILT_S_3
-318    0x6666    //TX_A_POST_FILT_S_4
-319    0x6666    //TX_A_POST_FILT_S_5
-320    0x199A    //TX_A_POST_FILT_S_6
-321    0x6666    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7E00    //TX_LAMBDA_PFILT_S_0
-340    0x7E00    //TX_LAMBDA_PFILT_S_1
-341    0x7E00    //TX_LAMBDA_PFILT_S_2
-342    0x7E00    //TX_LAMBDA_PFILT_S_3
-343    0x7E00    //TX_LAMBDA_PFILT_S_4
-344    0x7E00    //TX_LAMBDA_PFILT_S_5
-345    0x7E00    //TX_LAMBDA_PFILT_S_6
-346    0x7E00    //TX_LAMBDA_PFILT_S_7
-347    0x0010    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
-349    0x0000    //TX_K_PEPPER_HF
-350    0x0000    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0000    //TX_DT_BINVAD_TH_0
-354    0x0000    //TX_DT_BINVAD_TH_1
-355    0x0000    //TX_DT_BINVAD_TH_2
-356    0x0000    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0001    //TX_BF_SGRAD_FLG
-362    0x0000    //TX_BF_DVG_TH
-363    0x0000    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x05A0    //TX_NDETCT
-367    0x0383    //TX_NOISE_TH_0
-368    0x1388    //TX_NOISE_TH_0_2
-369    0x3A98    //TX_NOISE_TH_0_3
-370    0x0C80    //TX_NOISE_TH_1
-371    0x0032    //TX_NOISE_TH_2
-372    0x3D54    //TX_NOISE_TH_3
-373    0x012C    //TX_NOISE_TH_4
-374    0x07D0    //TX_NOISE_TH_5
-375    0x6590    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x00C8    //TX_NOISE_TH_6
-379    0x044C    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
-385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x6400    //TX_OUT_ENER_S_TH_NOISY
-387    0x6400    //TX_OUT_ENER_TH_NOISE
-388    0x7D00    //TX_OUT_ENER_TH_SPEECH
-389    0x0000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0000    //TX_MIN_G_LOW300HZ
-401    0x0010    //TX_MAXLEVEL_CNG
-402    0x0000    //TX_STN_NOISE_TH
-403    0x0000    //TX_POST_MASK_SUP
-404    0x0000    //TX_POST_MASK_ADJUST
-405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x02F3    //TX_MINENOISE_MIC0_TH
-407    0x0226    //TX_MINENOISE_MIC0_S_TH
-408    0x2879    //TX_MIN_G_CTRL_SSNS
-409    0x0400    //TX_METAL_RTO_THR
-410    0x0080    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x2000    //TX_RHO_UPB
-415    0x0020    //TX_N_HOLD_HS
-416    0x0009    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x0219    //TX_THR_STD_PLH
-421    0x09C4    //TX_N_HOLD_STD
-422    0x0166    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
-428    0x2000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0064    //TX_DESIRED_TALK_HOLDT
-431    0x1000    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0000    //TX_HS_VAD_BIN
-435    0x0000    //TX_THR_VAD_HS
-436    0x0000    //TX_MEAN_RTO_MIN_TH2
-437    0x0000    //TX_SILENCE_T
-438    0x4000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x099A    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x001E    //TX_DOA_VAD_THR_1
-445    0x001E    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x005A    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x005A    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x005A    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0172    //TX_BF_HOLDOFF_T
-473    0x8000    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x071C    //TX_DOA_TRACK_HT
-477    0x0280    //TX_N1_HOLD_HF
-478    0x0140    //TX_N2_HOLD_HF
-479    0x2AAB    //TX_BF_RESET_THR_HF
-480    0x4000    //TX_DOA_SMOOTH
-481    0x0000    //TX_MU_BF
-482    0x0200    //TX_BF_MU_LF_B2
-483    0x0000    //TX_BF_FC_END_BIN_B2
-484    0x0000    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0000    //TX_N_DOA_SEED
-488    0x0000    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x0000    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x0000    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x0000    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0168    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0004    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0230    //TX_NOR_OFF_TH1
-503    0xD333    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x6666    //TX_MICTOBFGAIN0
-513    0x0014    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x0000    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0028    //TX_SNR_THR
-531    0x03E8    //TX_ENGY_THR
-532    0x0000    //TX_CORR_HIGH_TH
-533    0x0000    //TX_ENGY_THR_2
-534    0x0000    //TX_MEAN_RTO_THR
-535    0x0000    //TX_WNS_ENOISE_MIC0_TH
-536    0x0000    //TX_RATIOMICL_TH
-537    0x0000    //TX_CALIG_HS
-538    0x000A    //TX_LVL_CTRL
-539    0x0000    //TX_WIND_SUPRTO
-540    0x0000    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x0000    //TX_RATIOMICH_TH
-543    0x0000    //TX_WIND_INBEAM_L_TH
-544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0000    //TX_BVE_NOISE_FLOOR_1
-554    0x0000    //TX_BVE_NOISE_FLOOR_2
-555    0x0000    //TX_BVE_NOISE_FLOOR_3
-556    0x0000    //TX_BVE_NOISE_FLOOR_4
-557    0x0000    //TX_BVE_NOISE_FLOOR_5
-558    0x0000    //TX_BVE_NOISE_FLOOR_6
-559    0x0000    //TX_BVE_NOISE_FLOOR_7
-560    0x0000    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0000    //TX_FDEQ_BIN_0
-592    0x0000    //TX_FDEQ_BIN_1
-593    0x0000    //TX_FDEQ_BIN_2
-594    0x0000    //TX_FDEQ_BIN_3
-595    0x0000    //TX_FDEQ_BIN_4
-596    0x0000    //TX_FDEQ_BIN_5
-597    0x0000    //TX_FDEQ_BIN_6
-598    0x0000    //TX_FDEQ_BIN_7
-599    0x0000    //TX_FDEQ_BIN_8
-600    0x0000    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0000    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0000    //TX_PREEQ_BIN_MIC1_0
-691    0x0000    //TX_PREEQ_BIN_MIC1_1
-692    0x0000    //TX_PREEQ_BIN_MIC1_2
-693    0x0000    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0000    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0064    //TX_MIC_CALIBRATION_0
-766    0x006A    //TX_MIC_CALIBRATION_1
-767    0x006A    //TX_MIC_CALIBRATION_2
-768    0x006B    //TX_MIC_CALIBRATION_3
-769    0x0048    //TX_MIC_PWR_BIAS_0
-770    0x003C    //TX_MIC_PWR_BIAS_1
-771    0x003C    //TX_MIC_PWR_BIAS_2
-772    0x003C    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0009    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
-788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
-789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
-790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
-791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0002    //TX_DEADMIC_SILENCE_TH
-817    0x0147    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x0000    //TX_A_POST_FLT_FP
-835    0x0000    //TX_RTO_OUTBEAM_TH
-836    0x0000    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0000    //TX_FFP_RESRV_2
-849    0x0000    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x0E80    //TX_TDDRC_THRD_2
-857    0x3800    //TX_TDDRC_THRD_3
-858    0x2A00    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x0000    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0000    //TX_TDDRC_SMT_W
-866    0x0100    //TX_TDDRC_DRC_GAIN
-867    0x0000    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x1EB8    //TX_TFMASKLTH
-870    0x170A    //TX_TFMASKLTHL
-871    0x7FFF    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x4000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x0000    //TX_FASTNS_OUTIN_TH
-884    0x0000    //TX_FASTNS_TFMASK_TH
-885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0x8000    //TX_FASTNS_MASK5_TH
-890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x247C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7652    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x847C    //RX_FDEQ_GAIN_0
-40    0x5A56    //RX_FDEQ_GAIN_1
-41    0x6266    //RX_FDEQ_GAIN_2
-42    0x6E7A    //RX_FDEQ_GAIN_3
-43    0x8678    //RX_FDEQ_GAIN_4
-44    0x6D66    //RX_FDEQ_GAIN_5
-45    0x706E    //RX_FDEQ_GAIN_6
-46    0x6C64    //RX_FDEQ_GAIN_7
-47    0x5C6A    //RX_FDEQ_GAIN_8
-48    0x6268    //RX_FDEQ_GAIN_9
-49    0x6462    //RX_FDEQ_GAIN_10
-50    0x646E    //RX_FDEQ_GAIN_11
-51    0x6860    //RX_FDEQ_GAIN_12
-52    0x646A    //RX_FDEQ_GAIN_13
-53    0x7478    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0105    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x0CE0    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03FC    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x13E0    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0B50    //RX_MAX_G_FP
-129    0x0058    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x19C0    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8458    //RX_FDEQ_GAIN_0
-40    0x4B4B    //RX_FDEQ_GAIN_1
-41    0x5156    //RX_FDEQ_GAIN_2
-42    0x646C    //RX_FDEQ_GAIN_3
-43    0x7B73    //RX_FDEQ_GAIN_4
-44    0x6D66    //RX_FDEQ_GAIN_5
-45    0x6768    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x19C0    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8458    //RX_FDEQ_GAIN_0
-40    0x4B4B    //RX_FDEQ_GAIN_1
-41    0x5156    //RX_FDEQ_GAIN_2
-42    0x646C    //RX_FDEQ_GAIN_3
-43    0x7B73    //RX_FDEQ_GAIN_4
-44    0x6D66    //RX_FDEQ_GAIN_5
-45    0x6768    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0054    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x19C0    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8458    //RX_FDEQ_GAIN_0
-40    0x4B4B    //RX_FDEQ_GAIN_1
-41    0x5156    //RX_FDEQ_GAIN_2
-42    0x646C    //RX_FDEQ_GAIN_3
-43    0x7B73    //RX_FDEQ_GAIN_4
-44    0x6D66    //RX_FDEQ_GAIN_5
-45    0x6768    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0085    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x19C0    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8458    //RX_FDEQ_GAIN_0
-40    0x4B4B    //RX_FDEQ_GAIN_1
-41    0x5156    //RX_FDEQ_GAIN_2
-42    0x646C    //RX_FDEQ_GAIN_3
-43    0x7B73    //RX_FDEQ_GAIN_4
-44    0x6D66    //RX_FDEQ_GAIN_5
-45    0x6768    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x00C7    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x19C0    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0134    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8458    //RX_FDEQ_GAIN_0
-40    0x4B4B    //RX_FDEQ_GAIN_1
-41    0x5156    //RX_FDEQ_GAIN_2
-42    0x646C    //RX_FDEQ_GAIN_3
-43    0x7B73    //RX_FDEQ_GAIN_4
-44    0x6D66    //RX_FDEQ_GAIN_5
-45    0x6768    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x01EE    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8464    //RX_FDEQ_GAIN_0
-40    0x5150    //RX_FDEQ_GAIN_1
-41    0x555C    //RX_FDEQ_GAIN_2
-42    0x6E75    //RX_FDEQ_GAIN_3
-43    0x8077    //RX_FDEQ_GAIN_4
-44    0x756D    //RX_FDEQ_GAIN_5
-45    0x6667    //RX_FDEQ_GAIN_6
-46    0x6D68    //RX_FDEQ_GAIN_7
-47    0x5E6A    //RX_FDEQ_GAIN_8
-48    0x6668    //RX_FDEQ_GAIN_9
-49    0x645A    //RX_FDEQ_GAIN_10
-50    0x5A5E    //RX_FDEQ_GAIN_11
-51    0x6A58    //RX_FDEQ_GAIN_12
-52    0x646E    //RX_FDEQ_GAIN_13
-53    0x787C    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x6000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0006    //RX_TDDRC_THRD_1
-114    0x0340    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x0000    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x035A    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x8468    //RX_FDEQ_GAIN_0
-40    0x4F4F    //RX_FDEQ_GAIN_1
-41    0x555A    //RX_FDEQ_GAIN_2
-42    0x6069    //RX_FDEQ_GAIN_3
-43    0x7D86    //RX_FDEQ_GAIN_4
-44    0x8682    //RX_FDEQ_GAIN_5
-45    0x7461    //RX_FDEQ_GAIN_6
-46    0x5352    //RX_FDEQ_GAIN_7
-47    0x5860    //RX_FDEQ_GAIN_8
-48    0x5D5F    //RX_FDEQ_GAIN_9
-49    0x5A52    //RX_FDEQ_GAIN_10
-50    0x535A    //RX_FDEQ_GAIN_11
-51    0x6654    //RX_FDEQ_GAIN_12
-52    0x6068    //RX_FDEQ_GAIN_13
-53    0x6F69    //RX_FDEQ_GAIN_14
-54    0x9898    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0301    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0205    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0410    //RX_FDEQ_BIN_6
-70    0x050A    //RX_FDEQ_BIN_7
-71    0x0B07    //RX_FDEQ_BIN_8
-72    0x120E    //RX_FDEQ_BIN_9
-73    0x100E    //RX_FDEQ_BIN_10
-74    0x0E2D    //RX_FDEQ_BIN_11
-75    0x1923    //RX_FDEQ_BIN_12
-76    0x151E    //RX_FDEQ_BIN_13
-77    0x1E2D    //RX_FDEQ_BIN_14
-78    0x2D40    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7652    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x6000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x0340    //RX_TDDRC_THRD_2
-272    0x19C0    //RX_TDDRC_THRD_3
-273    0x0000    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8458    //RX_FDEQ_GAIN_0
-197    0x4B4B    //RX_FDEQ_GAIN_1
-198    0x5156    //RX_FDEQ_GAIN_2
-199    0x646C    //RX_FDEQ_GAIN_3
-200    0x7B73    //RX_FDEQ_GAIN_4
-201    0x6D66    //RX_FDEQ_GAIN_5
-202    0x6768    //RX_FDEQ_GAIN_6
-203    0x6D68    //RX_FDEQ_GAIN_7
-204    0x5E6A    //RX_FDEQ_GAIN_8
-205    0x6668    //RX_FDEQ_GAIN_9
-206    0x645A    //RX_FDEQ_GAIN_10
-207    0x5A5E    //RX_FDEQ_GAIN_11
-208    0x6A58    //RX_FDEQ_GAIN_12
-209    0x646E    //RX_FDEQ_GAIN_13
-210    0x787C    //RX_FDEQ_GAIN_14
-211    0x9898    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0301    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0205    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0410    //RX_FDEQ_BIN_6
-227    0x050A    //RX_FDEQ_BIN_7
-228    0x0B07    //RX_FDEQ_BIN_8
-229    0x120E    //RX_FDEQ_BIN_9
-230    0x100E    //RX_FDEQ_BIN_10
-231    0x0E2D    //RX_FDEQ_BIN_11
-232    0x1923    //RX_FDEQ_BIN_12
-233    0x151E    //RX_FDEQ_BIN_13
-234    0x1E2D    //RX_FDEQ_BIN_14
-235    0x2D40    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0039    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x6000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x0340    //RX_TDDRC_THRD_2
-272    0x19C0    //RX_TDDRC_THRD_3
-273    0x0000    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8458    //RX_FDEQ_GAIN_0
-197    0x4B4B    //RX_FDEQ_GAIN_1
-198    0x5156    //RX_FDEQ_GAIN_2
-199    0x646C    //RX_FDEQ_GAIN_3
-200    0x7B73    //RX_FDEQ_GAIN_4
-201    0x6D66    //RX_FDEQ_GAIN_5
-202    0x6768    //RX_FDEQ_GAIN_6
-203    0x6D68    //RX_FDEQ_GAIN_7
-204    0x5E6A    //RX_FDEQ_GAIN_8
-205    0x6668    //RX_FDEQ_GAIN_9
-206    0x645A    //RX_FDEQ_GAIN_10
-207    0x5A5E    //RX_FDEQ_GAIN_11
-208    0x6A58    //RX_FDEQ_GAIN_12
-209    0x646E    //RX_FDEQ_GAIN_13
-210    0x787C    //RX_FDEQ_GAIN_14
-211    0x9898    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0301    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0205    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0410    //RX_FDEQ_BIN_6
-227    0x050A    //RX_FDEQ_BIN_7
-228    0x0B07    //RX_FDEQ_BIN_8
-229    0x120E    //RX_FDEQ_BIN_9
-230    0x100E    //RX_FDEQ_BIN_10
-231    0x0E2D    //RX_FDEQ_BIN_11
-232    0x1923    //RX_FDEQ_BIN_12
-233    0x151E    //RX_FDEQ_BIN_13
-234    0x1E2D    //RX_FDEQ_BIN_14
-235    0x2D40    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0054    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x6000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x0340    //RX_TDDRC_THRD_2
-272    0x19C0    //RX_TDDRC_THRD_3
-273    0x0000    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8458    //RX_FDEQ_GAIN_0
-197    0x4B4B    //RX_FDEQ_GAIN_1
-198    0x5156    //RX_FDEQ_GAIN_2
-199    0x646C    //RX_FDEQ_GAIN_3
-200    0x7B73    //RX_FDEQ_GAIN_4
-201    0x6D66    //RX_FDEQ_GAIN_5
-202    0x6768    //RX_FDEQ_GAIN_6
-203    0x6D68    //RX_FDEQ_GAIN_7
-204    0x5E6A    //RX_FDEQ_GAIN_8
-205    0x6668    //RX_FDEQ_GAIN_9
-206    0x645A    //RX_FDEQ_GAIN_10
-207    0x5A5E    //RX_FDEQ_GAIN_11
-208    0x6A58    //RX_FDEQ_GAIN_12
-209    0x646E    //RX_FDEQ_GAIN_13
-210    0x787C    //RX_FDEQ_GAIN_14
-211    0x9898    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0301    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0205    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0410    //RX_FDEQ_BIN_6
-227    0x050A    //RX_FDEQ_BIN_7
-228    0x0B07    //RX_FDEQ_BIN_8
-229    0x120E    //RX_FDEQ_BIN_9
-230    0x100E    //RX_FDEQ_BIN_10
-231    0x0E2D    //RX_FDEQ_BIN_11
-232    0x1923    //RX_FDEQ_BIN_12
-233    0x151E    //RX_FDEQ_BIN_13
-234    0x1E2D    //RX_FDEQ_BIN_14
-235    0x2D40    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0085    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x6000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x0340    //RX_TDDRC_THRD_2
-272    0x19C0    //RX_TDDRC_THRD_3
-273    0x0000    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8458    //RX_FDEQ_GAIN_0
-197    0x4B4B    //RX_FDEQ_GAIN_1
-198    0x5156    //RX_FDEQ_GAIN_2
-199    0x646C    //RX_FDEQ_GAIN_3
-200    0x7B73    //RX_FDEQ_GAIN_4
-201    0x6D66    //RX_FDEQ_GAIN_5
-202    0x6768    //RX_FDEQ_GAIN_6
-203    0x6D68    //RX_FDEQ_GAIN_7
-204    0x5E6A    //RX_FDEQ_GAIN_8
-205    0x6668    //RX_FDEQ_GAIN_9
-206    0x645A    //RX_FDEQ_GAIN_10
-207    0x5A5E    //RX_FDEQ_GAIN_11
-208    0x6A58    //RX_FDEQ_GAIN_12
-209    0x646E    //RX_FDEQ_GAIN_13
-210    0x787C    //RX_FDEQ_GAIN_14
-211    0x9898    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0301    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0205    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0410    //RX_FDEQ_BIN_6
-227    0x050A    //RX_FDEQ_BIN_7
-228    0x0B07    //RX_FDEQ_BIN_8
-229    0x120E    //RX_FDEQ_BIN_9
-230    0x100E    //RX_FDEQ_BIN_10
-231    0x0E2D    //RX_FDEQ_BIN_11
-232    0x1923    //RX_FDEQ_BIN_12
-233    0x151E    //RX_FDEQ_BIN_13
-234    0x1E2D    //RX_FDEQ_BIN_14
-235    0x2D40    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x00C7    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x6000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x0340    //RX_TDDRC_THRD_2
-272    0x19C0    //RX_TDDRC_THRD_3
-273    0x0000    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0134    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8458    //RX_FDEQ_GAIN_0
-197    0x4B4B    //RX_FDEQ_GAIN_1
-198    0x5156    //RX_FDEQ_GAIN_2
-199    0x646C    //RX_FDEQ_GAIN_3
-200    0x7B73    //RX_FDEQ_GAIN_4
-201    0x6D66    //RX_FDEQ_GAIN_5
-202    0x6768    //RX_FDEQ_GAIN_6
-203    0x6D68    //RX_FDEQ_GAIN_7
-204    0x5E6A    //RX_FDEQ_GAIN_8
-205    0x6668    //RX_FDEQ_GAIN_9
-206    0x645A    //RX_FDEQ_GAIN_10
-207    0x5A5E    //RX_FDEQ_GAIN_11
-208    0x6A58    //RX_FDEQ_GAIN_12
-209    0x646E    //RX_FDEQ_GAIN_13
-210    0x787C    //RX_FDEQ_GAIN_14
-211    0x9898    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0301    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0205    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0410    //RX_FDEQ_BIN_6
-227    0x050A    //RX_FDEQ_BIN_7
-228    0x0B07    //RX_FDEQ_BIN_8
-229    0x120E    //RX_FDEQ_BIN_9
-230    0x100E    //RX_FDEQ_BIN_10
-231    0x0E2D    //RX_FDEQ_BIN_11
-232    0x1923    //RX_FDEQ_BIN_12
-233    0x151E    //RX_FDEQ_BIN_13
-234    0x1E2D    //RX_FDEQ_BIN_14
-235    0x2D40    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x6000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x0340    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x0000    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x01EE    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8464    //RX_FDEQ_GAIN_0
-197    0x5150    //RX_FDEQ_GAIN_1
-198    0x555C    //RX_FDEQ_GAIN_2
-199    0x6E75    //RX_FDEQ_GAIN_3
-200    0x8077    //RX_FDEQ_GAIN_4
-201    0x756D    //RX_FDEQ_GAIN_5
-202    0x6667    //RX_FDEQ_GAIN_6
-203    0x6D68    //RX_FDEQ_GAIN_7
-204    0x5E6A    //RX_FDEQ_GAIN_8
-205    0x6668    //RX_FDEQ_GAIN_9
-206    0x645A    //RX_FDEQ_GAIN_10
-207    0x5A5E    //RX_FDEQ_GAIN_11
-208    0x6A58    //RX_FDEQ_GAIN_12
-209    0x646E    //RX_FDEQ_GAIN_13
-210    0x787C    //RX_FDEQ_GAIN_14
-211    0x9898    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0301    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0205    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0410    //RX_FDEQ_BIN_6
-227    0x050A    //RX_FDEQ_BIN_7
-228    0x0B07    //RX_FDEQ_BIN_8
-229    0x120E    //RX_FDEQ_BIN_9
-230    0x100E    //RX_FDEQ_BIN_10
-231    0x0E2D    //RX_FDEQ_BIN_11
-232    0x1923    //RX_FDEQ_BIN_12
-233    0x151E    //RX_FDEQ_BIN_13
-234    0x1E2D    //RX_FDEQ_BIN_14
-235    0x2D40    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x6000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0006    //RX_TDDRC_THRD_1
-271    0x0340    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x0000    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03AD    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x8468    //RX_FDEQ_GAIN_0
-197    0x4F4F    //RX_FDEQ_GAIN_1
-198    0x555A    //RX_FDEQ_GAIN_2
-199    0x6069    //RX_FDEQ_GAIN_3
-200    0x7D86    //RX_FDEQ_GAIN_4
-201    0x8682    //RX_FDEQ_GAIN_5
-202    0x7461    //RX_FDEQ_GAIN_6
-203    0x5352    //RX_FDEQ_GAIN_7
-204    0x5860    //RX_FDEQ_GAIN_8
-205    0x5D5F    //RX_FDEQ_GAIN_9
-206    0x5A52    //RX_FDEQ_GAIN_10
-207    0x535A    //RX_FDEQ_GAIN_11
-208    0x6654    //RX_FDEQ_GAIN_12
-209    0x6068    //RX_FDEQ_GAIN_13
-210    0x6F69    //RX_FDEQ_GAIN_14
-211    0x9898    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0301    //RX_FDEQ_BIN_0
-221    0x0204    //RX_FDEQ_BIN_1
-222    0x0203    //RX_FDEQ_BIN_2
-223    0x0205    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0410    //RX_FDEQ_BIN_6
-227    0x050A    //RX_FDEQ_BIN_7
-228    0x0B07    //RX_FDEQ_BIN_8
-229    0x120E    //RX_FDEQ_BIN_9
-230    0x100E    //RX_FDEQ_BIN_10
-231    0x0E2D    //RX_FDEQ_BIN_11
-232    0x1923    //RX_FDEQ_BIN_12
-233    0x151E    //RX_FDEQ_BIN_13
-234    0x1E2D    //RX_FDEQ_BIN_14
-235    0x2D40    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-TTY_VCO-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x00F3    //TX_PATCH_REG
-3    0x6F7D    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0096    //TX_DIST2REF1
-22    0x0019    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0400    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0260    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x0680    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B0C    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0001    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x01F4    //TX_RATIO_DT_L_TH_HIGH
-226    0x59D8    //TX_RATIO_DT_H_TH_HIGH
-227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x00C8    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x001A    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x001A    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x001A    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0020    //TX_MIN_GAIN_S_0
-290    0x0020    //TX_MIN_GAIN_S_1
-291    0x0020    //TX_MIN_GAIN_S_2
-292    0x0020    //TX_MIN_GAIN_S_3
-293    0x0020    //TX_MIN_GAIN_S_4
-294    0x0020    //TX_MIN_GAIN_S_5
-295    0x0020    //TX_MIN_GAIN_S_6
-296    0x0020    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
-318    0x7FFF    //TX_A_POST_FILT_S_4
-319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
-321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7F00    //TX_LAMBDA_PFILT
-339    0x7F00    //TX_LAMBDA_PFILT_S_0
-340    0x7F00    //TX_LAMBDA_PFILT_S_1
-341    0x7F00    //TX_LAMBDA_PFILT_S_2
-342    0x7F00    //TX_LAMBDA_PFILT_S_3
-343    0x7F00    //TX_LAMBDA_PFILT_S_4
-344    0x7F00    //TX_LAMBDA_PFILT_S_5
-345    0x7F00    //TX_LAMBDA_PFILT_S_6
-346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x3E80    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0040    //TX_DT_BINVAD_TH_0
-354    0x0040    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x2000    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
-373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0DAC    //TX_NOISE_TH_6
-379    0x0050    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x07D0    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0005    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0050    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0070    //TX_BVE_NOISE_FLOOR_1
-554    0x0070    //TX_BVE_NOISE_FLOOR_2
-555    0x0010    //TX_BVE_NOISE_FLOOR_3
-556    0x0070    //TX_BVE_NOISE_FLOOR_4
-557    0x00B0    //TX_BVE_NOISE_FLOOR_5
-558    0x0E66    //TX_BVE_NOISE_FLOOR_6
-559    0x0050    //TX_BVE_NOISE_FLOOR_7
-560    0x770A    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4850    //TX_FDEQ_GAIN_2
-570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4B48    //TX_FDEQ_GAIN_4
-572    0x484E    //TX_FDEQ_GAIN_5
-573    0x4E60    //TX_FDEQ_GAIN_6
-574    0x5C52    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x4E45    //TX_FDEQ_GAIN_9
-577    0x494A    //TX_FDEQ_GAIN_10
-578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5C6E    //TX_FDEQ_GAIN_13
-581    0x687E    //TX_FDEQ_GAIN_14
-582    0x8890    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x401E    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4849    //TX_PREEQ_GAIN_MIC1_7
-674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
-675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
-676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
-677    0x5052    //TX_PREEQ_GAIN_MIC1_11
-678    0x5354    //TX_PREEQ_GAIN_MIC1_12
-679    0x5454    //TX_PREEQ_GAIN_MIC1_13
-680    0x5653    //TX_PREEQ_GAIN_MIC1_14
-681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
-682    0x4444    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x494B    //TX_PREEQ_GAIN_MIC2_6
-722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
-723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
-724    0x5051    //TX_PREEQ_GAIN_MIC2_9
-725    0x5255    //TX_PREEQ_GAIN_MIC2_10
-726    0x5754    //TX_PREEQ_GAIN_MIC2_11
-727    0x5454    //TX_PREEQ_GAIN_MIC2_12
-728    0x544F    //TX_PREEQ_GAIN_MIC2_13
-729    0x463D    //TX_PREEQ_GAIN_MIC2_14
-730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0203    //TX_PREEQ_BIN_MIC2_0
-740    0x0303    //TX_PREEQ_BIN_MIC2_1
-741    0x0304    //TX_PREEQ_BIN_MIC2_2
-742    0x0405    //TX_PREEQ_BIN_MIC2_3
-743    0x0506    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0809    //TX_PREEQ_BIN_MIC2_6
-746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
-747    0x0C10    //TX_PREEQ_BIN_MIC2_8
-748    0x1013    //TX_PREEQ_BIN_MIC2_9
-749    0x1414    //TX_PREEQ_BIN_MIC2_10
-750    0x261E    //TX_PREEQ_BIN_MIC2_11
-751    0x1E14    //TX_PREEQ_BIN_MIC2_12
-752    0x1414    //TX_PREEQ_BIN_MIC2_13
-753    0x2814    //TX_PREEQ_BIN_MIC2_14
-754    0x4022    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x13F4    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2379    //TX_SENDFUNC_REG_MICMUTE
-898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0320    //TX_MICMUTE_RATIO_THR
-900    0x01C2    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x7918    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x3A98    //TX_DTD_THR1_MICMUTE_2
-914    0x32C8    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
-940    0x0001    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0100    //TX_AMS_RESRV_01
-944    0xE4A8    //TX_AMS_RESRV_02
-945    0x1770    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2040    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x050D    //RX_PGA
-11    0x7652    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0000    //RX_PITCH_BFR_LEN
-17    0x0000    //RX_SBD_PITCH_DET
-18    0x0000    //RX_PP_RESRV_0
-19    0x0000    //RX_PP_RESRV_1
-20    0xF800    //RX_N_SN_EST
-21    0x0000    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-30    0x0000    //RX_EXTRA_NS_L
-31    0x0000    //RX_EXTRA_NS_A
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x0000    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0003    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0010    //RX_MAXLEVEL_CNG
-132    0x0000    //RX_BWE_UV_TH
-133    0x0000    //RX_BWE_UV_TH2
-134    0x0000    //RX_BWE_UV_TH3
-135    0x0000    //RX_BWE_V_TH
-136    0x0000    //RX_BWE_GAIN1_V_TH1
-137    0x0000    //RX_BWE_GAIN1_V_TH2
-138    0x0000    //RX_BWE_UV_EQ
-139    0x0000    //RX_BWE_V_EQ
-140    0x0000    //RX_BWE_TONE_TH
-141    0x0000    //RX_BWE_UV_HOLD_T
-142    0x0000    //RX_BWE_GAIN2_ALPHA
-143    0x0000    //RX_BWE_GAIN3_ALPHA
-144    0x0000    //RX_BWE_CUTOFF
-145    0x0000    //RX_BWE_GAINFILL
-146    0x0000    //RX_BWE_MAXTH_TONE
-147    0x0000    //RX_BWE_EQ_0
-148    0x0000    //RX_BWE_EQ_1
-149    0x0000    //RX_BWE_EQ_2
-150    0x0000    //RX_BWE_EQ_3
-151    0x0000    //RX_BWE_EQ_4
-152    0x0000    //RX_BWE_EQ_5
-153    0x0000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2040    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x050D    //RX_PGA
-168    0x7652    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0000    //RX_PITCH_BFR_LEN
-174    0x0000    //RX_SBD_PITCH_DET
-175    0x0000    //RX_PP_RESRV_0
-176    0x0000    //RX_PP_RESRV_1
-177    0xF800    //RX_N_SN_EST
-178    0x0000    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-187    0x0000    //RX_EXTRA_NS_L
-188    0x0000    //RX_EXTRA_NS_A
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x0000    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0003    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0010    //RX_MAXLEVEL_CNG
-289    0x0000    //RX_BWE_UV_TH
-290    0x0000    //RX_BWE_UV_TH2
-291    0x0000    //RX_BWE_UV_TH3
-292    0x0000    //RX_BWE_V_TH
-293    0x0000    //RX_BWE_GAIN1_V_TH1
-294    0x0000    //RX_BWE_GAIN1_V_TH2
-295    0x0000    //RX_BWE_UV_EQ
-296    0x0000    //RX_BWE_V_EQ
-297    0x0000    //RX_BWE_TONE_TH
-298    0x0000    //RX_BWE_UV_HOLD_T
-299    0x0000    //RX_BWE_GAIN2_ALPHA
-300    0x0000    //RX_BWE_GAIN3_ALPHA
-301    0x0000    //RX_BWE_CUTOFF
-302    0x0000    //RX_BWE_GAINFILL
-303    0x0000    //RX_BWE_MAXTH_TONE
-304    0x0000    //RX_BWE_EQ_0
-305    0x0000    //RX_BWE_EQ_1
-306    0x0000    //RX_BWE_EQ_2
-307    0x0000    //RX_BWE_EQ_3
-308    0x0000    //RX_BWE_EQ_4
-309    0x0000    //RX_BWE_EQ_5
-310    0x0000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-TTY_FULL-RESERVE2-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0000    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0000    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x0078    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0302    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0000    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0000    //TX_MICS_OF_PAIR0
-38    0x0000    //TX_MICS_OF_PAIR1
-39    0x0000    //TX_MICS_OF_PAIR2
-40    0x0000    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0003    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x0000    //TX_HD_BIN_MASK
-53    0x0000    //TX_HD_SUBAND_MASK
-54    0x0000    //TX_HD_FRAME_AVG_MASK
-55    0x0000    //TX_HD_MIN_FRQ
-56    0x0000    //TX_HD_ALPHA_PSD
-57    0x0000    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0x0000    //TX_T_PSDVAT
-63    0x0000    //TX_CNT
-64    0x0000    //TX_ANTI_HOWL_GAIN
-65    0x0000    //TX_MICFORBFMARK_0
-66    0x0000    //TX_MICFORBFMARK_1
-67    0x0000    //TX_MICFORBFMARK_2
-68    0x0000    //TX_MICFORBFMARK_3
-69    0x0000    //TX_MICFORBFMARK_4
-70    0x0000    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x0000    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x0000    //TX_ADCS_GAIN
-112    0x0000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x7FFF    //TX_BLMIC_BLKFACTOR
-116    0x7FFF    //TX_BRMIC_BLKFACTOR
-117    0x000A    //TX_MICBLK_START_BIN
-118    0x0041    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x0000    //TX_FE_ENER_TH_MTS
-124    0x0000    //TX_FE_ENER_TH_EXP
-125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0020    //TX_MIC_BLOCK_N
-128    0x7652    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x7800    //TX_THR_PITCH_DET_0
-131    0x7000    //TX_THR_PITCH_DET_1
-132    0x6000    //TX_THR_PITCH_DET_2
-133    0x0000    //TX_PITCH_BFR_LEN
-134    0x0000    //TX_SBD_PITCH_DET
-135    0x0000    //TX_TD_AEC_L
-136    0x0000    //TX_MU0_UNP_TD_AEC
-137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x2000    //TX_AEC_REF_GAIN_0
-148    0x2000    //TX_AEC_REF_GAIN_1
-149    0x2000    //TX_AEC_REF_GAIN_2
-150    0x4000    //TX_EAD_THR
-151    0x0200    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0100    //TX_MIN_EQ_RE_EST_3
-156    0x0100    //TX_MIN_EQ_RE_EST_4
-157    0x0100    //TX_MIN_EQ_RE_EST_5
-158    0x0100    //TX_MIN_EQ_RE_EST_6
-159    0x0100    //TX_MIN_EQ_RE_EST_7
-160    0x0100    //TX_MIN_EQ_RE_EST_8
-161    0x0100    //TX_MIN_EQ_RE_EST_9
-162    0x0100    //TX_MIN_EQ_RE_EST_10
-163    0x0100    //TX_MIN_EQ_RE_EST_11
-164    0x0100    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x0000    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0008    //TX_SE_HOLD_N
-170    0x0050    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x0000    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x0000    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0000    //TX_FRQ_LIN_LEN
-184    0x0000    //TX_FRQ_AEC_LEN_RHO
-185    0x0000    //TX_MU0_UNP_FRQ_AEC
-186    0x0000    //TX_MU0_PTD_FRQ_AEC
-187    0x0000    //TX_MINENOISETH
-188    0x0000    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x0000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7333    //TX_DTD_THR1_0
-198    0x7333    //TX_DTD_THR1_1
-199    0x7333    //TX_DTD_THR1_2
-200    0x7333    //TX_DTD_THR1_3
-201    0x7333    //TX_DTD_THR1_4
-202    0x7333    //TX_DTD_THR1_5
-203    0x7333    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0400    //TX_DT_CUT_K
-214    0x0000    //TX_DT_CUT_THR
-215    0x0000    //TX_COMFORT_G
-216    0x0000    //TX_POWER_YOUT_TH
-217    0x0000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x0800    //TX_B_POST_FILT_ECHO_H
-230    0x0000    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x0000    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0000    //TX_DT_RESRV_7
-240    0x0000    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF800    //TX_THR_SN_EST_2
-245    0xF600    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0A00    //TX_N_SN_EST
-267    0x0000    //TX_INBEAM_T
-268    0x0000    //TX_INBEAMHOLDT
-269    0x1FFF    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x1000    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x0000    //TX_B_POST_FLT_0
-280    0x0000    //TX_B_POST_FLT_1
-281    0x001A    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0014    //TX_NS_LVL_CTRL_2
-284    0x000C    //TX_NS_LVL_CTRL_3
-285    0x000C    //TX_NS_LVL_CTRL_4
-286    0x000C    //TX_NS_LVL_CTRL_5
-287    0x001A    //TX_NS_LVL_CTRL_6
-288    0x000C    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0014    //TX_MIN_GAIN_S_1
-291    0x0014    //TX_MIN_GAIN_S_2
-292    0x0014    //TX_MIN_GAIN_S_3
-293    0x0014    //TX_MIN_GAIN_S_4
-294    0x0014    //TX_MIN_GAIN_S_5
-295    0x0014    //TX_MIN_GAIN_S_6
-296    0x0014    //TX_MIN_GAIN_S_7
-297    0x0000    //TX_NMOS_SUP
-298    0x0064    //TX_NS_MAX_PRI_SNR_TH
-299    0x7FFF    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x1200    //TX_THR_LFNS
-309    0x0147    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x7FFF    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x7FFF    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x1000    //TX_A_POST_FILT_S_1
-316    0x1000    //TX_A_POST_FILT_S_2
-317    0x6666    //TX_A_POST_FILT_S_3
-318    0x6666    //TX_A_POST_FILT_S_4
-319    0x6666    //TX_A_POST_FILT_S_5
-320    0x199A    //TX_A_POST_FILT_S_6
-321    0x6666    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7E00    //TX_LAMBDA_PFILT_S_0
-340    0x7E00    //TX_LAMBDA_PFILT_S_1
-341    0x7E00    //TX_LAMBDA_PFILT_S_2
-342    0x7E00    //TX_LAMBDA_PFILT_S_3
-343    0x7E00    //TX_LAMBDA_PFILT_S_4
-344    0x7E00    //TX_LAMBDA_PFILT_S_5
-345    0x7E00    //TX_LAMBDA_PFILT_S_6
-346    0x7E00    //TX_LAMBDA_PFILT_S_7
-347    0x0010    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
-349    0x0000    //TX_K_PEPPER_HF
-350    0x0000    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0000    //TX_DT_BINVAD_TH_0
-354    0x0000    //TX_DT_BINVAD_TH_1
-355    0x0000    //TX_DT_BINVAD_TH_2
-356    0x0000    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0001    //TX_BF_SGRAD_FLG
-362    0x0000    //TX_BF_DVG_TH
-363    0x0000    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x05A0    //TX_NDETCT
-367    0x0383    //TX_NOISE_TH_0
-368    0x1388    //TX_NOISE_TH_0_2
-369    0x3A98    //TX_NOISE_TH_0_3
-370    0x0C80    //TX_NOISE_TH_1
-371    0x0032    //TX_NOISE_TH_2
-372    0x3D54    //TX_NOISE_TH_3
-373    0x012C    //TX_NOISE_TH_4
-374    0x07D0    //TX_NOISE_TH_5
-375    0x6590    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x00C8    //TX_NOISE_TH_6
-379    0x044C    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
-385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x6400    //TX_OUT_ENER_S_TH_NOISY
-387    0x6400    //TX_OUT_ENER_TH_NOISE
-388    0x7D00    //TX_OUT_ENER_TH_SPEECH
-389    0x0000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0000    //TX_MIN_G_LOW300HZ
-401    0x0010    //TX_MAXLEVEL_CNG
-402    0x0000    //TX_STN_NOISE_TH
-403    0x0000    //TX_POST_MASK_SUP
-404    0x0000    //TX_POST_MASK_ADJUST
-405    0x0014    //TX_NS_ENOISE_MIC0_TH
-406    0x02F3    //TX_MINENOISE_MIC0_TH
-407    0x0226    //TX_MINENOISE_MIC0_S_TH
-408    0x2879    //TX_MIN_G_CTRL_SSNS
-409    0x0400    //TX_METAL_RTO_THR
-410    0x0080    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x2000    //TX_RHO_UPB
-415    0x0020    //TX_N_HOLD_HS
-416    0x0009    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x0219    //TX_THR_STD_PLH
-421    0x09C4    //TX_N_HOLD_STD
-422    0x0166    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
-428    0x2000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0064    //TX_DESIRED_TALK_HOLDT
-431    0x1000    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0000    //TX_HS_VAD_BIN
-435    0x0000    //TX_THR_VAD_HS
-436    0x0000    //TX_MEAN_RTO_MIN_TH2
-437    0x0000    //TX_SILENCE_T
-438    0x4000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x099A    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x001E    //TX_DOA_VAD_THR_1
-445    0x001E    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x005A    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x005A    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x005A    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0172    //TX_BF_HOLDOFF_T
-473    0x8000    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x071C    //TX_DOA_TRACK_HT
-477    0x0280    //TX_N1_HOLD_HF
-478    0x0140    //TX_N2_HOLD_HF
-479    0x2AAB    //TX_BF_RESET_THR_HF
-480    0x4000    //TX_DOA_SMOOTH
-481    0x0000    //TX_MU_BF
-482    0x0200    //TX_BF_MU_LF_B2
-483    0x0000    //TX_BF_FC_END_BIN_B2
-484    0x0000    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0000    //TX_N_DOA_SEED
-488    0x0000    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x0000    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x0000    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x0000    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0168    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0004    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0230    //TX_NOR_OFF_TH1
-503    0xD333    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x6666    //TX_MICTOBFGAIN0
-513    0x0014    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x0000    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0028    //TX_SNR_THR
-531    0x03E8    //TX_ENGY_THR
-532    0x0000    //TX_CORR_HIGH_TH
-533    0x0000    //TX_ENGY_THR_2
-534    0x0000    //TX_MEAN_RTO_THR
-535    0x0000    //TX_WNS_ENOISE_MIC0_TH
-536    0x0000    //TX_RATIOMICL_TH
-537    0x0000    //TX_CALIG_HS
-538    0x000A    //TX_LVL_CTRL
-539    0x0000    //TX_WIND_SUPRTO
-540    0x0000    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x0000    //TX_RATIOMICH_TH
-543    0x0000    //TX_WIND_INBEAM_L_TH
-544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_BVE_NOISE_FLOOR_0
-553    0x0000    //TX_BVE_NOISE_FLOOR_1
-554    0x0000    //TX_BVE_NOISE_FLOOR_2
-555    0x0000    //TX_BVE_NOISE_FLOOR_3
-556    0x0000    //TX_BVE_NOISE_FLOOR_4
-557    0x0000    //TX_BVE_NOISE_FLOOR_5
-558    0x0000    //TX_BVE_NOISE_FLOOR_6
-559    0x0000    //TX_BVE_NOISE_FLOOR_7
-560    0x0000    //TX_BVE_NOISE_FLOOR_8
-561    0x0000    //TX_BVE_NOISE_FLOOR_9
-562    0x0000    //TX_BVE_IN_N
-563    0x0000    //TX_BVE_OUT_N
-564    0x0000    //TX_BVE_MICALPHA_DOWN
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0000    //TX_FDEQ_BIN_0
-592    0x0000    //TX_FDEQ_BIN_1
-593    0x0000    //TX_FDEQ_BIN_2
-594    0x0000    //TX_FDEQ_BIN_3
-595    0x0000    //TX_FDEQ_BIN_4
-596    0x0000    //TX_FDEQ_BIN_5
-597    0x0000    //TX_FDEQ_BIN_6
-598    0x0000    //TX_FDEQ_BIN_7
-599    0x0000    //TX_FDEQ_BIN_8
-600    0x0000    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0000    //TX_PREEQ_BIN_MIC0_0
-642    0x0000    //TX_PREEQ_BIN_MIC0_1
-643    0x0000    //TX_PREEQ_BIN_MIC0_2
-644    0x0000    //TX_PREEQ_BIN_MIC0_3
-645    0x0000    //TX_PREEQ_BIN_MIC0_4
-646    0x0000    //TX_PREEQ_BIN_MIC0_5
-647    0x0000    //TX_PREEQ_BIN_MIC0_6
-648    0x0000    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0000    //TX_PREEQ_BIN_MIC1_0
-691    0x0000    //TX_PREEQ_BIN_MIC1_1
-692    0x0000    //TX_PREEQ_BIN_MIC1_2
-693    0x0000    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0000    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0064    //TX_MIC_CALIBRATION_0
-766    0x006A    //TX_MIC_CALIBRATION_1
-767    0x006A    //TX_MIC_CALIBRATION_2
-768    0x006B    //TX_MIC_CALIBRATION_3
-769    0x0048    //TX_MIC_PWR_BIAS_0
-770    0x003C    //TX_MIC_PWR_BIAS_1
-771    0x003C    //TX_MIC_PWR_BIAS_2
-772    0x003C    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0009    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
-788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
-789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
-790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
-791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0002    //TX_DEADMIC_SILENCE_TH
-817    0x0147    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x0000    //TX_A_POST_FLT_FP
-835    0x0000    //TX_RTO_OUTBEAM_TH
-836    0x0000    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0000    //TX_FFP_RESRV_2
-849    0x0000    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x0E80    //TX_TDDRC_THRD_2
-857    0x3800    //TX_TDDRC_THRD_3
-858    0x2A00    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x0000    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0000    //TX_TDDRC_SMT_W
-866    0x0100    //TX_TDDRC_DRC_GAIN
-867    0x0000    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x1EB8    //TX_TFMASKLTH
-870    0x170A    //TX_TFMASKLTHL
-871    0x7FFF    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x4000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x0000    //TX_FASTNS_OUTIN_TH
-884    0x0000    //TX_FASTNS_TFMASK_TH
-885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0x8000    //TX_FASTNS_MASK5_TH
-890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2040    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x050D    //RX_PGA
-11    0x7652    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0000    //RX_PITCH_BFR_LEN
-17    0x0000    //RX_SBD_PITCH_DET
-18    0x0000    //RX_PP_RESRV_0
-19    0x0000    //RX_PP_RESRV_1
-20    0xF800    //RX_N_SN_EST
-21    0x0000    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-30    0x0000    //RX_EXTRA_NS_L
-31    0x0000    //RX_EXTRA_NS_A
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x0000    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0003    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0010    //RX_MAXLEVEL_CNG
-132    0x0000    //RX_BWE_UV_TH
-133    0x0000    //RX_BWE_UV_TH2
-134    0x0000    //RX_BWE_UV_TH3
-135    0x0000    //RX_BWE_V_TH
-136    0x0000    //RX_BWE_GAIN1_V_TH1
-137    0x0000    //RX_BWE_GAIN1_V_TH2
-138    0x0000    //RX_BWE_UV_EQ
-139    0x0000    //RX_BWE_V_EQ
-140    0x0000    //RX_BWE_TONE_TH
-141    0x0000    //RX_BWE_UV_HOLD_T
-142    0x0000    //RX_BWE_GAIN2_ALPHA
-143    0x0000    //RX_BWE_GAIN3_ALPHA
-144    0x0000    //RX_BWE_CUTOFF
-145    0x0000    //RX_BWE_GAINFILL
-146    0x0000    //RX_BWE_MAXTH_TONE
-147    0x0000    //RX_BWE_EQ_0
-148    0x0000    //RX_BWE_EQ_1
-149    0x0000    //RX_BWE_EQ_2
-150    0x0000    //RX_BWE_EQ_3
-151    0x0000    //RX_BWE_EQ_4
-152    0x0000    //RX_BWE_EQ_5
-153    0x0000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-33    0xDA9E    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x0E80    //RX_TDDRC_THRD_2
-115    0x3800    //RX_TDDRC_THRD_3
-116    0x2A00    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x0000    //RX_TDDRC_HMNC_GAIN
-122    0x0000    //RX_TDDRC_SMT_FLAG
-123    0x0000    //RX_TDDRC_SMT_W
-124    0x0100    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0000    //RX_FDEQ_BIN_0
-64    0x0000    //RX_FDEQ_BIN_1
-65    0x0000    //RX_FDEQ_BIN_2
-66    0x0000    //RX_FDEQ_BIN_3
-67    0x0000    //RX_FDEQ_BIN_4
-68    0x0000    //RX_FDEQ_BIN_5
-69    0x0000    //RX_FDEQ_BIN_6
-70    0x0000    //RX_FDEQ_BIN_7
-71    0x0000    //RX_FDEQ_BIN_8
-72    0x0000    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x0000    //RX_FDEQ_RESRV_0
-88    0x0000    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x2000    //RX_FDDRC_SLANT_1_0
-107    0x2000    //RX_FDDRC_SLANT_1_1
-108    0x2000    //RX_FDDRC_SLANT_1_2
-109    0x2000    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2040    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x050D    //RX_PGA
-168    0x7652    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0000    //RX_PITCH_BFR_LEN
-174    0x0000    //RX_SBD_PITCH_DET
-175    0x0000    //RX_PP_RESRV_0
-176    0x0000    //RX_PP_RESRV_1
-177    0xF800    //RX_N_SN_EST
-178    0x0000    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-187    0x0000    //RX_EXTRA_NS_L
-188    0x0000    //RX_EXTRA_NS_A
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x0000    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0003    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0010    //RX_MAXLEVEL_CNG
-289    0x0000    //RX_BWE_UV_TH
-290    0x0000    //RX_BWE_UV_TH2
-291    0x0000    //RX_BWE_UV_TH3
-292    0x0000    //RX_BWE_V_TH
-293    0x0000    //RX_BWE_GAIN1_V_TH1
-294    0x0000    //RX_BWE_GAIN1_V_TH2
-295    0x0000    //RX_BWE_UV_EQ
-296    0x0000    //RX_BWE_V_EQ
-297    0x0000    //RX_BWE_TONE_TH
-298    0x0000    //RX_BWE_UV_HOLD_T
-299    0x0000    //RX_BWE_GAIN2_ALPHA
-300    0x0000    //RX_BWE_GAIN3_ALPHA
-301    0x0000    //RX_BWE_CUTOFF
-302    0x0000    //RX_BWE_GAINFILL
-303    0x0000    //RX_BWE_MAXTH_TONE
-304    0x0000    //RX_BWE_EQ_0
-305    0x0000    //RX_BWE_EQ_1
-306    0x0000    //RX_BWE_EQ_2
-307    0x0000    //RX_BWE_EQ_3
-308    0x0000    //RX_BWE_EQ_4
-309    0x0000    //RX_BWE_EQ_5
-310    0x0000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
-185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
-186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
-189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
-190    0xDA9E    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x0E80    //RX_TDDRC_THRD_2
-272    0x3800    //RX_TDDRC_THRD_3
-273    0x2A00    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x0000    //RX_TDDRC_HMNC_GAIN
-279    0x0000    //RX_TDDRC_SMT_FLAG
-280    0x0000    //RX_TDDRC_SMT_W
-281    0x0100    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0000    //RX_FDEQ_BIN_0
-221    0x0000    //RX_FDEQ_BIN_1
-222    0x0000    //RX_FDEQ_BIN_2
-223    0x0000    //RX_FDEQ_BIN_3
-224    0x0000    //RX_FDEQ_BIN_4
-225    0x0000    //RX_FDEQ_BIN_5
-226    0x0000    //RX_FDEQ_BIN_6
-227    0x0000    //RX_FDEQ_BIN_7
-228    0x0000    //RX_FDEQ_BIN_8
-229    0x0000    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x0000    //RX_FDEQ_RESRV_0
-245    0x0000    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x2000    //RX_FDDRC_SLANT_1_0
-264    0x2000    //RX_FDDRC_SLANT_1_1
-265    0x2000    //RX_FDDRC_SLANT_1_2
-266    0x2000    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
diff --git a/audio/lynx/tuning/waves/waves_config.ini b/audio/lynx/tuning/waves/waves_config.ini
index ba12a8e..05c18e3 100644
--- a/audio/lynx/tuning/waves/waves_config.ini
+++ b/audio/lynx/tuning/waves/waves_config.ini
@@ -5,7 +5,7 @@
 # Putting any value other than 1 would be equivalent to not supported.
 ########################################################################################################
 [HAL_SUPPORTED_FEATURES]
-CUSTOM_ACTION_256=1
+CUSTOM_ACTION_260=1
 
 ########################################################################################################
 # This defined the options of supported sample rates.
@@ -26,10 +26,10 @@ OST_SPEAKER = 0:12,90:13,180:12,270:0|13
 # This should be configured by Waves only unless platform vendor is familiar with MPS structure.
 ########################################################################################################
 [HAL_SUPPORTED_PRESETS]
+SPEAKER_MUSIC_THROTTLE= OM:1,SM:3,OST:OST_SPEAKER
+SPEAKER_SAFE_MUSIC_THROTTLE = OM:10,SM:3,OST:OST_SPEAKER
 SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER
 SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER
-SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER
-HEADSET_MUSIC = OM:2,SM:2
 
 ########################################################################################################
 # This defines available CONTROL configurations. Only define the CONTROL if you need it.
@@ -37,9 +37,7 @@ HEADSET_MUSIC = OM:2,SM:2
 # This can be configured by Waves or platform vendor.
 ########################################################################################################
 [HAL_SUPPORTED_CONTROLS]
-SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL
-A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
-USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
+SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_MUSIC_THROTTLE|SPEAKER_SAFE_MUSIC_THROTTLE
 
 [COEFS_CONVERTER_SETTING]
 AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so
@@ -52,7 +50,12 @@ AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so
 #AudioFormatSampleSize=4
 #AudioFormatIncrement=8
 
-[CUSTOM_ACTION_256]
-CASE_1=PRIORITY:0,NUMBERS:2:0|1,PRESET:SPEAKER_MUSIC
-CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4,PRESET:SPEAKER_SAFE_CALL
-CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1,PRESET:SPEAKER_SAFE_MUSIC
+[CUSTOM_ACTION_260]
+CASE_1=PRIORITY:0,NUMBERS:2:0|1:1|2,PRESET:SPEAKER_MUSIC
+CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:1|2,PRESET:SPEAKER_SAFE_MUSIC
+CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1:1|2,PRESET:SPEAKER_SAFE_MUSIC
+CASE_4=PRIORITY:3,NUMBERS:2:0|1:0,PRESET:SPEAKER_MUSIC_THROTTLE
+CASE_5=PRIORITY:4,NUMBERS:1|2|4194304:2|3|4:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE
+CASE_6=PRIORITY:5,NUMBERS:1|4194304:0|1:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE
+# Action 260 parameters:  audio_devices_t, audio_mode_t, throttle_control_state_t
+# - throttle_control_state_t: 0 - Enabled, 1 - Disabled, 2 - Bypassed
diff --git a/audio/lynx/tuning/waves/waves_preset.mps b/audio/lynx/tuning/waves/waves_preset.mps
index dd74132..94f9166 100644
Binary files a/audio/lynx/tuning/waves/waves_preset.mps and b/audio/lynx/tuning/waves/waves_preset.mps differ
diff --git a/bluetooth/bluetooth_power_limits_L10_US.csv b/bluetooth/bluetooth_power_limits_Lynx.csv
similarity index 82%
rename from bluetooth/bluetooth_power_limits_L10_US.csv
rename to bluetooth/bluetooth_power_limits_Lynx.csv
index 9ec5ec9..65bd062 100644
--- a/bluetooth/bluetooth_power_limits_L10_US.csv
+++ b/bluetooth/bluetooth_power_limits_Lynx.csv
@@ -1,34 +1,34 @@
-Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
-off,off,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
-off,off,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76
-off,off,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
-off,off,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,off,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
-off,off,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,off,on,on,off,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,off,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,off,off,off,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,off,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,off,on,off,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,on,off,off,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,on,on,off,on,56,56,56,56,56,56,56,56,56,56,56,56
-off,on,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
-on,off,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,off,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,off,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,off,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,off,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,off,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,off,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,off,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
-on,on,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
-off,any,any,any,any,off,76,68,76,76,68,76,76,68,76,76,68,76
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
+off,off,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,off,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,off,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+on,off,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
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diff --git a/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_CA.csv b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_CA.csv
new file mode 100644
index 0000000..65bd062
--- /dev/null
+++ b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_CA.csv
@@ -0,0 +1,34 @@
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
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diff --git a/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_EU.csv b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_EU.csv
new file mode 100644
index 0000000..55ccb90
--- /dev/null
+++ b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_EU.csv
@@ -0,0 +1,34 @@
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
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+off,any,any,any,any,off,76,68,40,76,68,34,76,68,40,76,68,34
diff --git a/bluetooth/bluetooth_power_limits_L10_EU.csv b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_JP.csv
similarity index 63%
rename from bluetooth/bluetooth_power_limits_L10_EU.csv
rename to bluetooth/bluetooth_power_limits_Lynx_G0DZQ_JP.csv
index e16b5c2..6ee6354 100644
--- a/bluetooth/bluetooth_power_limits_L10_EU.csv
+++ b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_JP.csv
@@ -1,34 +1,34 @@
-Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
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-off,off,off,on,off,on,76,68,40,76,68,40,76,68,40,76,68,40
-off,off,off,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,off,on,off,off,on,76,68,40,76,68,40,76,68,40,76,68,40
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-off,on,off,off,off,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,off,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
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-on,on,on,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40
-off,any,any,any,any,off,76,68,40,76,68,40,76,68,40,76,68,40
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
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diff --git a/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_US.csv b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_US.csv
new file mode 100644
index 0000000..65bd062
--- /dev/null
+++ b/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_US.csv
@@ -0,0 +1,34 @@
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
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+on,on,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+off,any,any,any,any,off,76,68,76,76,68,76,76,68,76,76,68,76
diff --git a/bluetooth/bluetooth_power_limits_L10_JP.csv b/bluetooth/bluetooth_power_limits_Lynx_G82U8_JP.csv
similarity index 63%
rename from bluetooth/bluetooth_power_limits_L10_JP.csv
rename to bluetooth/bluetooth_power_limits_Lynx_G82U8_JP.csv
index e16b5c2..6ee6354 100644
--- a/bluetooth/bluetooth_power_limits_L10_JP.csv
+++ b/bluetooth/bluetooth_power_limits_Lynx_G82U8_JP.csv
@@ -1,34 +1,34 @@
-Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
-off,off,off,off,off,on,76,68,40,76,68,40,76,68,40,76,68,40
-off,off,off,off,on,on,76,68,40,76,68,40,76,68,40,76,68,40
-off,off,off,on,off,on,76,68,40,76,68,40,76,68,40,76,68,40
-off,off,off,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,off,on,off,off,on,76,68,40,76,68,40,76,68,40,76,68,40
-off,off,on,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,off,on,on,off,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,off,on,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,off,off,off,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,off,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,off,on,off,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,off,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,on,off,off,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,on,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,on,on,off,on,72,68,40,72,68,40,72,68,40,72,68,40
-off,on,on,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
-on,off,off,off,off,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,off,off,off,on,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,off,off,on,off,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,off,off,on,on,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,off,on,off,off,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,off,on,off,on,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,off,on,on,off,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,off,on,on,on,any,76,68,40,76,68,40,76,68,40,76,68,40
-on,on,off,off,off,any,72,68,40,72,68,40,72,68,40,72,68,40
-on,on,off,off,on,any,72,68,40,72,68,40,72,68,40,72,68,40
-on,on,off,on,off,any,72,68,40,72,68,40,72,68,40,72,68,40
-on,on,off,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40
-on,on,on,off,off,any,72,68,40,72,68,40,72,68,40,72,68,40
-on,on,on,off,on,any,72,68,40,72,68,40,72,68,40,72,68,40
-on,on,on,on,off,any,72,68,40,72,68,40,72,68,40,72,68,40
-on,on,on,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40
-off,any,any,any,any,off,76,68,40,76,68,40,76,68,40,76,68,40
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
+off,off,off,off,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,off,off,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,off,off,on,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,off,off,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,off,on,off,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,off,on,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,off,on,on,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,off,on,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,off,off,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,off,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,off,on,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,off,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,on,off,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,on,off,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,on,on,off,on,72,68,40,72,68,40,72,68,40,72,68,40
+off,on,on,on,on,on,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,off,off,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,off,off,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,off,on,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,off,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,on,off,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,on,off,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,on,on,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,off,on,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,off,off,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,off,off,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,off,on,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,off,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,on,off,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,on,off,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,on,on,off,any,72,68,40,72,68,40,72,68,40,72,68,40
+on,on,on,on,on,any,72,68,40,72,68,40,72,68,40,72,68,40
+off,any,any,any,any,off,72,68,40,72,68,40,72,68,40,72,68,40
diff --git a/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv b/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv
new file mode 100644
index 0000000..c58c015
--- /dev/null
+++ b/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv
@@ -0,0 +1,34 @@
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
+off,off,off,off,off,on,76,68,40,76,68,34,76,68,40,76,68,34
+off,off,off,off,on,on,76,68,40,76,68,34,76,68,40,76,68,34
+off,off,off,on,off,on,76,68,40,76,68,34,76,68,40,76,68,34
+off,off,off,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34
+off,off,on,off,off,on,76,68,40,76,68,34,76,68,40,76,68,34
+off,off,on,off,on,on,64,64,40,64,64,34,64,64,40,64,64,34
+off,off,on,on,off,on,72,68,40,72,68,34,72,68,40,72,68,34
+off,off,on,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34
+off,on,off,off,off,on,72,68,40,72,68,34,72,68,40,72,68,34
+off,on,off,off,on,on,72,68,40,72,68,34,72,68,40,72,68,34
+off,on,off,on,off,on,72,68,40,72,68,34,72,68,40,72,68,34
+off,on,off,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34
+off,on,on,off,off,on,72,68,40,72,68,34,72,68,40,72,68,34
+off,on,on,off,on,on,64,64,40,64,64,34,64,64,40,64,64,34
+off,on,on,on,off,on,72,68,40,72,68,34,72,68,40,72,68,34
+off,on,on,on,on,on,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,off,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,off,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,off,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,off,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,on,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,on,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,on,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,off,on,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,off,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,off,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,off,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,off,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,on,off,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,on,off,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,on,on,off,any,64,64,40,64,64,34,64,64,40,64,64,34
+on,on,on,on,on,any,64,64,40,64,64,34,64,64,40,64,64,34
+off,any,any,any,any,off,76,68,40,76,68,34,76,68,40,76,68,34
diff --git a/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv
new file mode 100644
index 0000000..65bd062
--- /dev/null
+++ b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv
@@ -0,0 +1,34 @@
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
+off,off,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,off,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,off,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+on,off,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+off,any,any,any,any,off,76,68,76,76,68,76,76,68,76,76,68,76
diff --git a/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv
new file mode 100644
index 0000000..65bd062
--- /dev/null
+++ b/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv
@@ -0,0 +1,34 @@
+Head,BTHotspot,WIFI5Ghz,HotspotVoice,Cell,IMU,BDR_Single_Chain_0,EDR_Single_Chain_0,BLE_Single_Chain_0,BDR_Single_Chain_1,EDR_Single_Chain_1,BLE_Single_Chain_1,BDR_Dual_Chain_0,EDR_Dual_Chain_0,BLE_Dual_Chain_0,BDR_Dual_Chain_1,EDR_Dual_Chain_1,BLE_Dual_Chain_1
+off,off,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,off,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,off,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,off,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,off,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,off,on,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,off,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,on,off,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,on,off,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+off,on,on,on,off,on,76,68,76,76,68,76,76,68,76,76,68,76
+off,on,on,on,on,on,56,56,56,56,56,56,56,56,56,56,56,56
+on,off,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,off,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,off,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,off,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,off,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,on,off,any,44,44,44,44,44,44,44,44,44,44,44,44
+on,on,on,on,on,any,44,44,44,44,44,44,44,44,44,44,44,44
+off,any,any,any,any,off,76,68,76,76,68,76,76,68,76,76,68,76
diff --git a/bluetooth/le_audio_codec_capabilities.xml b/bluetooth/le_audio_codec_capabilities.xml
new file mode 100644
index 0000000..cfb915b
--- /dev/null
+++ b/bluetooth/le_audio_codec_capabilities.xml
@@ -0,0 +1,84 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!---
+  This is an example to configure LE Audio hardware offload supported capability settings
+  codecConfigurationList:
+    Supported codec capability along with its parameter setting
+
+  strategyConfigurationList:
+     ASE Configuration strategies
+
+  configurationList:
+    For each configuration, there are two attributes
+      - codecConfiguration
+      - strategyConfiguration
+
+  scenarioList:
+    There would be only one `scenarios` group
+    For each scenario, the are two attributes
+      - encode
+      - decode
+    If a scenario is unidirectional, mark another direction as `invalid`
+    The configuration should be chosen from `configurationList`
+-->
+<leAudioOffloadSetting>
+  <scenarioList>
+    <!-- encode only -->
+    <scenario encode="OneChanMono_16_1" decode="invalid"/>
+    <scenario encode="TwoChanStereo_16_1" decode="invalid"/>
+    <scenario encode="OneChanStereo_16_1" decode="invalid"/>
+    <scenario encode="OneChanMono_16_2" decode="invalid"/>
+    <scenario encode="TwoChanStereo_16_2" decode="invalid"/>
+    <scenario encode="OneChanStereo_16_2" decode="invalid"/>
+    <scenario encode="OneChanMono_24_2" decode="invalid"/>
+    <scenario encode="TwoChanStereo_24_2" decode="invalid"/>
+    <scenario encode="OneChanStereo_24_2" decode="invalid"/>
+    <scenario encode="OneChanMono_32_2" decode="invalid"/>
+    <scenario encode="TwoChanStereo_32_2" decode="invalid"/>
+    <scenario encode="OneChanStereo_32_2" decode="invalid"/>
+    <scenario encode="OneChanMono_48_4" decode="invalid"/>
+    <scenario encode="TwoChanStereo_48_4" decode="invalid"/>
+    <scenario encode="OneChanStereo_48_4" decode="invalid"/>
+    <!-- encode and decode -->
+    <scenario encode="OneChanStereo_16_1" decode="OneChanStereo_16_1"/>
+    <scenario encode="OneChanStereo_16_1" decode="OneChanMono_16_1"/>
+    <scenario encode="TwoChanStereo_16_1" decode="OneChanMono_16_1"/>
+    <scenario encode="OneChanMono_16_1" decode="OneChanMono_16_1"/>
+    <scenario encode="OneChanStereo_16_2" decode="OneChanStereo_16_2"/>
+    <scenario encode="OneChanStereo_16_2" decode="OneChanMono_16_2"/>
+    <scenario encode="TwoChanStereo_16_2" decode="OneChanMono_16_2"/>
+    <scenario encode="OneChanMono_16_2" decode="OneChanMono_16_2"/>
+    <scenario encode="OneChanStereo_32_2" decode="OneChanStereo_32_2"/>
+    <scenario encode="OneChanStereo_32_2" decode="OneChanMono_32_2"/>
+    <scenario encode="TwoChanStereo_32_2" decode="OneChanMono_32_2"/>
+    <scenario encode="OneChanMono_32_2" decode="OneChanMono_32_2"/>
+  </scenarioList>
+  <configurationList>
+    <configuration name="OneChanMono_16_1" codecConfiguration="LC3_16k_1" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="TwoChanStereo_16_1" codecConfiguration="LC3_16k_1" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
+    <configuration name="OneChanStereo_16_1" codecConfiguration="LC3_16k_1" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="OneChanMono_16_2" codecConfiguration="LC3_16k_2" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="TwoChanStereo_16_2" codecConfiguration="LC3_16k_2" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
+    <configuration name="OneChanStereo_16_2" codecConfiguration="LC3_16k_2" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="OneChanMono_24_2" codecConfiguration="LC3_24k_2" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="TwoChanStereo_24_2" codecConfiguration="LC3_24k_2" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
+    <configuration name="OneChanStereo_24_2" codecConfiguration="LC3_24k_2" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="OneChanMono_32_2" codecConfiguration="LC3_32k_2" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="TwoChanStereo_32_2" codecConfiguration="LC3_32k_2" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
+    <configuration name="OneChanStereo_32_2" codecConfiguration="LC3_32k_2" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="OneChanMono_48_4" codecConfiguration="LC3_48k_4" strategyConfiguration="MONO_ONE_CIS_PER_DEVICE"/>
+    <configuration name="TwoChanStereo_48_4" codecConfiguration="LC3_48k_4" strategyConfiguration="STEREO_TWO_CISES_PER_DEVICE"/>
+    <configuration name="OneChanStereo_48_4" codecConfiguration="LC3_48k_4" strategyConfiguration="STEREO_ONE_CIS_PER_DEVICE"/>
+  </configurationList>
+  <codecConfigurationList>
+    <codecConfiguration name="LC3_16k_1" codec="LC3" samplingFrequency="16000" frameDurationUs="7500" octetsPerCodecFrame="30"/>
+    <codecConfiguration name="LC3_16k_2" codec="LC3" samplingFrequency="16000" frameDurationUs="10000" octetsPerCodecFrame="40"/>
+    <codecConfiguration name="LC3_24k_2" codec="LC3" samplingFrequency="24000" frameDurationUs="10000" octetsPerCodecFrame="60"/>
+    <codecConfiguration name="LC3_32k_2" codec="LC3" samplingFrequency="32000" frameDurationUs="10000" octetsPerCodecFrame="80"/>
+    <codecConfiguration name="LC3_48k_4" codec="LC3" samplingFrequency="48000" frameDurationUs="10000" octetsPerCodecFrame="120"/>
+  </codecConfigurationList>
+  <strategyConfigurationList>
+    <strategyConfiguration name="STEREO_ONE_CIS_PER_DEVICE" audioLocation="STEREO" connectedDevice="2" channelCount="1"/>
+    <strategyConfiguration name="STEREO_TWO_CISES_PER_DEVICE" audioLocation="STEREO" connectedDevice="1" channelCount="2"/>
+    <strategyConfiguration name="MONO_ONE_CIS_PER_DEVICE" audioLocation="MONO" connectedDevice="1" channelCount="1"/>
+  </strategyConfigurationList>
+</leAudioOffloadSetting>
diff --git a/bluetooth/qti_default.mk b/bluetooth/qti_default.mk
index a6abd5c..d5717b2 100644
--- a/bluetooth/qti_default.mk
+++ b/bluetooth/qti_default.mk
@@ -24,17 +24,20 @@ PRODUCT_PRODUCT_PROPERTIES += \
 # Bluetooth LE Audio
 PRODUCT_PRODUCT_PROPERTIES += \
 	ro.bluetooth.leaudio_switcher.supported=true \
-	bluetooth.profile.bap.broadcast.source.enabled=true \
-	bluetooth.profile.bap.broadcast.assist.enabled=true \
-	bluetooth.profile.bap.unicast.client.enabled=true \
-	bluetooth.profile.csip.set_coordinator.enabled=true \
-	bluetooth.profile.hap.client.enabled=true \
-	bluetooth.profile.mcp.server.enabled=true \
-	bluetooth.profile.ccp.server.enabled=true \
-	bluetooth.profile.vcp.controller.enabled=true \
+	ro.bluetooth.leaudio_broadcast_switcher.supported=true \
 	ro.bluetooth.leaudio_offload.supported=true \
 	persist.bluetooth.leaudio_offload.disabled=false \
-	ro.vendor.audio_hal.ble_use_stream_id=true
+	ro.vendor.audio_hal.ble_use_stream_id=true \
+
+# Bluetooth LE Audio CIS handover to SCO
+# Set the property only if the controller doesn't support CIS and SCO
+# simultaneously. More details in b/242908683.
+PRODUCT_PRODUCT_PROPERTIES += \
+	persist.bluetooth.leaudio.notify.idle.during.call=true
+
+# LE Auido Offload Capabilities setting
+PRODUCT_COPY_FILES += \
+	device/google/lynx/bluetooth/le_audio_codec_capabilities.xml:$(TARGET_COPY_OUT_VENDOR)/etc/le_audio_codec_capabilities.xml
 
 # Bluetooth HAL and Pixel extension
 DEVICE_MANIFEST_FILE += \
@@ -49,9 +52,10 @@ TARGET_BLUETOOTH_HCI_V1_1 = true
 TARGET_BLUETOOTH_UART_DEVICE = "/dev/ttySAC18"
 UART_USE_TERMIOS_AFC = true
 TARGET_USE_QTI_BT_IBS = false
-TARGET_USE_QTI_BT_OBS = false
+TARGET_USE_QTI_BT_OBS = true
 TARGET_USE_QTI_BT_SAR_V1_1 = true
 TARGET_USE_QTI_BT_CHANNEL_AVOIDANCE = true
+TARGET_DROP_BYTES_BEFORE_SSR_DUMP = true
 
 # IBluetoothHci @1.1 / @1.0
 ifeq ($(TARGET_BLUETOOTH_HCI_V1_1),true)
@@ -71,12 +75,18 @@ PRODUCT_PACKAGES += \
 
 # Bluetooth SAR Tx power caps
 PRODUCT_COPY_FILES += \
-	device/google/lynx/bluetooth/bluetooth_power_limits_L10_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_EU.csv \
-	device/google/lynx/bluetooth/bluetooth_power_limits_L10_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_JP.csv \
-	device/google/lynx/bluetooth/bluetooth_power_limits_L10_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_US.csv
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_EU.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_GHL1X_EU.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GHL1X_EU.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_CA.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_CA.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_US.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_GWKK3_CA.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GWKK3_cA.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_GWKK3_US.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_GWKK3_US.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G0DZQ_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G0DZQ_JP.csv \
+	device/google/lynx/bluetooth/bluetooth_power_limits_Lynx_G82U8_JP.csv:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth_power_limits_G82U8_JP.csv
 
 # Bluetooth SAR test tools
-ifeq ($(TARGET_USE_QTI_BT_SAR_V1_1)$(TARGET_USE_QTI_BT_SAR),true)
+ifneq (,$(filter true, $(TARGET_USE_QTI_BT_SAR_V1_1) $(TARGET_USE_QTI_BT_SAR)))
    PRODUCT_PACKAGES_DEBUG += bluetooth_sar_test
 endif
 
diff --git a/conf/init.lynx.rc b/conf/init.lynx.rc
index ae113fd..dbc4f13 100644
--- a/conf/init.lynx.rc
+++ b/conf/init.lynx.rc
@@ -5,6 +5,7 @@ on init
     # NFC streset tool name
     setprop persist.vendor.nfc.streset libstreset21
     setprop persist.vendor.se.streset libstreset21
+    setprop dalvik.vm.dexopt.thermal-cutoff 1
 
 # When ro.build.flavor=factory_lynx-userdebug, add vendor/bin/factory to default path
 on init && property:ro.build.flavor=factory_lynx-userdebug
@@ -54,6 +55,9 @@ on post-fs-data
 # Wifi
 on property:sys.boot_completed=1
     write /sys/bus/platform/drivers/cnss2/qcom,cnss-qca6490/fs_ready 1
+
+on property:vendor.all.modules.ready=1 && property:vendor.all.devices.ready=1
+    write /sys/bus/platform/drivers/cnss2/qcom,cnss-qca6490/fs_ready 1
     # Create directories for wifihal services
     mkdir /dev/socket/wifihal 0770 wifi wifi
     chmod 2777 /dev/socket/wifihal
@@ -77,3 +81,39 @@ on property:persist.vendor.touch_sensitivity_mode=0 && property:sys.boot_complet
 
 on property:persist.vendor.touch_sensitivity_mode=1 && property:sys.boot_completed=1
     write /sys/devices/virtual/goog_touch_interface/gti.0/screen_protector_mode_enabled 1
+
+# Touch
+on property:vendor.device.modules.ready=1
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/force_active
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/fw_ver
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ms_base
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ms_diff
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ms_raw
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/self_test
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ss_base
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ss_diff
+    chown system system /sys/devices/virtual/goog_touch_interface/gti.0/ss_raw
+
+# Override SF and RE uclamps to 0 on boot after being set elsewhere, for adpf cpu hints
+on property:sys.boot_completed=1
+    trigger override-sf-uclamp
+
+on property:vendor.powerhal.init=*
+    write /dev/cpuset/background/cpus ${persist.device_config.vendor_system_native.background_cpuset:-0-3}
+
+on override-sf-uclamp
+    write /proc/vendor_sched/rt_uclamp_min 0
+    write /proc/vendor_sched/sf_uclamp_min 0
+
+# For Japan sku, always enforce camera shutter sound
+# Since this property is read by the audio server in system service,
+# it should be written by the system init.
+on property:ro.boot.hardware.sku=G82U8
+    setprop audio.camerasound.force true
+
+# Route vibrator.adaptive_haptics.enabled to persist
+on property:vibrator.adaptive_haptics.enabled=0
+    setprop persist.vendor.vibrator.hal.context.enable false
+
+on property:vibrator.adaptive_haptics.enabled=1
+    setprop persist.vendor.vibrator.hal.context.enable true
diff --git a/device-lynx.mk b/device-lynx.mk
index fd31000..5cededf 100644
--- a/device-lynx.mk
+++ b/device-lynx.mk
@@ -22,13 +22,16 @@ $(call inherit-product-if-exists, vendor/google_devices/gs201/prebuilts/device-v
 $(call inherit-product-if-exists, vendor/google_devices/gs201/proprietary/device-vendor.mk)
 $(call inherit-product-if-exists, vendor/google_devices/lynx/proprietary/lynx/device-vendor-lynx.mk)
 $(call inherit-product-if-exists, vendor/google_devices/lynx/proprietary/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/lynx/proprietary/WallpapersLynx.mk)
 
 DEVICE_PACKAGE_OVERLAYS += device/google/lynx/lynx/overlay
 
 include device/google/lynx/audio/lynx/audio-tables.mk
 include device/google/gs201/device-shipping-common.mk
-include hardware/google/pixel/vibrator/cs40l26/device.mk
+include device/google/lynx/vibrator/cs40l26/device.mk
 
+# go/lyric-soong-variables
+$(call soong_config_set,lyric,camera_hardware,lynx)
 $(call soong_config_set,lyric,tuning_product,lynx)
 $(call soong_config_set,google3a_config,target_device,lynx)
 
@@ -48,6 +51,9 @@ PRODUCT_COPY_FILES += \
 PRODUCT_COPY_FILES += \
 	device/google/lynx/media_profiles_lynx.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
 
+# Media Performance Class 13
+PRODUCT_PROPERTY_OVERRIDES += ro.odm.build.media_performance_class=33
+
 # Display Config
 PRODUCT_COPY_FILES += \
         device/google/lynx/lynx/display_colordata_dev_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_dev_cal0.pb
@@ -56,6 +62,9 @@ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.lbe.supported=1
 PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.set_idle_timer_ms=1500
 PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.ignore_hdr_camera_layers=true
 
+#config of primary display frames to reach LHBM peak brightness
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.primarydisplay.lhbm.frames_to_reach_peak_brightness=2
+
 # NFC
 PRODUCT_COPY_FILES += \
 	frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \
@@ -87,14 +96,17 @@ DEVICE_MANIFEST_FILE += \
 
 # Thermal Config
 PRODUCT_COPY_FILES += \
-	device/google/lynx/thermal_info_config_lynx.json:$(TARGET_COPY_OUT_VENDOR)/etc/thermal_info_config.json
+	device/google/lynx/thermal_info_config_lynx.json:$(TARGET_COPY_OUT_VENDOR)/etc/thermal_info_config.json \
+	device/google/lynx/thermal_info_config_charge_lynx.json:$(TARGET_COPY_OUT_VENDOR)/etc/thermal_info_config_charge.json
 
 # Power HAL config
 PRODUCT_COPY_FILES += \
 	device/google/lynx/powerhint.json:$(TARGET_COPY_OUT_VENDOR)/etc/powerhint.json
 
 # PowerStats HAL
-PRODUCT_SOONG_NAMESPACES += device/google/lynx/powerstats
+PRODUCT_SOONG_NAMESPACES += \
+    device/google/lynx/powerstats \
+    device/google/lynx
 
 # Bluetooth HAL and Pixel extension
 include device/google/lynx/bluetooth/qti_default.mk
@@ -140,7 +152,14 @@ endif
 
 # Vibrator HAL
 PRODUCT_VENDOR_PROPERTIES += \
-	ro.vendor.vibrator.hal.supported_primitives=243
+	ro.vendor.vibrator.hal.supported_primitives=243 \
+	ro.vendor.vibrator.hal.f0.comp.enabled=1 \
+	ro.vendor.vibrator.hal.redc.comp.enabled=0 \
+	persist.vendor.vibrator.hal.context.enable=false \
+	persist.vendor.vibrator.hal.context.scale=40 \
+	persist.vendor.vibrator.hal.context.fade=true \
+	persist.vendor.vibrator.hal.context.cooldowntime=1600 \
+	persist.vendor.vibrator.hal.context.settlingtime=5000
 
 # Trusty liboemcrypto.so
 PRODUCT_SOONG_NAMESPACES += vendor/google_devices/lynx/prebuilts
@@ -148,10 +167,14 @@ PRODUCT_SOONG_NAMESPACES += vendor/google_devices/lynx/prebuilts
 # GPS xml
 ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
         PRODUCT_COPY_FILES += \
-                device/google/lynx/gps.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+                device/google/lynx/location/gps.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml \
+                device/google/lynx/location/lhd.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+                device/google/lynx/location/scd.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf
 else
         PRODUCT_COPY_FILES += \
-                device/google/lynx/gps_user.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml
+                device/google/lynx/location/gps_user.xml.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml \
+                device/google/lynx/location/lhd_user.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/lhd.conf \
+                device/google/lynx/location/scd_user.conf.l10:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/scd.conf
 endif
 
 # DCK properties based on target
@@ -182,23 +205,64 @@ PRODUCT_PRODUCT_PROPERTIES += \
 PRODUCT_PRODUCT_PROPERTIES += \
     ro.support_one_handed_mode=true
 
+# Fingerprint als feed forward
+PRODUCT_VENDOR_PROPERTIES += \
+    persist.vendor.udfps.als_feed_forward_supported=true \
+    persist.vendor.udfps.lhbm_controlled_in_hal_supported=true
+
 # Hide cutout overlays
 PRODUCT_PACKAGES += \
     NoCutoutOverlay \
     AvoidAppsInCutoutOverlay
 
+# MIPI Coex Configs
+PRODUCT_COPY_FILES += \
+    device/google/lynx/lynx/radio/lynx_display_primary_mipi_coex_table.csv:$(TARGET_COPY_OUT_VENDOR)/etc/modem/display_primary_mipi_coex_table.csv
+
 # Camera
 PRODUCT_PROPERTY_OVERRIDES += \
 	persist.vendor.camera.extended_launch_boost=1 \
+	persist.vendor.camera.optimized_tnr_freq=1 \
 	persist.vendor.camera.raise_buf_allocation_priority=1
 
 # Enable camera 1080P 60FPS binning mode
 PRODUCT_VENDOR_PROPERTIES += \
     persist.vendor.camera.1080P_60fps_binning=true
 
-# Limit camera 1080P 60FPS binning mode to not rear main camera
+# Increase thread priority for nodes stop
 PRODUCT_VENDOR_PROPERTIES += \
-    persist.vendor.camera.1080P_60fps_binning_except_rear_main=true
+    persist.vendor.camera.increase_thread_priority_nodes_stop=true
+
+# OIS with system imu
+PRODUCT_VENDOR_PROPERTIES += \
+    persist.vendor.camera.ois_with_system_imu=true
 
 # Use GmsCorePrebuilt y2022w28
 USE_GMSCORE_PREBUILT_Y2022W28 := true
+
+# Device features
+PRODUCT_COPY_FILES += \
+    frameworks/native/data/etc/handheld_core_hardware.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/handheld_core_hardware.xml
+
+# Enable adpf cpu hint session for SurfaceFlinger
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += \
+    debug.sf.enable_adpf_cpu_hint=true
+
+# The default value of this variable is false and should only be set to true when
+# the device allows users to enable the seamless transfer feature.
+PRODUCT_PRODUCT_PROPERTIES += \
+   euicc.seamless_transfer_enabled_in_non_qs=true
+
+##Audio Vendor property
+PRODUCT_PROPERTY_OVERRIDES += \
+	persist.vendor.audio.cca.enabled=true
+
+# userdebug specific
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+    PRODUCT_COPY_FILES += \
+        device/google/gs201/init.hardware.wlc.rc.userdebug:$(TARGET_COPY_OUT_VENDOR)/etc/init/init.wlc.rc
+endif
+
+# SKU specific RROs
+PRODUCT_PACKAGES += \
+    SettingsOverlayG82U8
diff --git a/gps.xml.l10 b/location/gps.xml.l10
similarity index 90%
rename from gps.xml.l10
rename to location/gps.xml.l10
index 6285691..61c31d9 100644
--- a/gps.xml.l10
+++ b/location/gps.xml.l10
@@ -20,7 +20,10 @@
 
        SuplSslMethod="SSLv23_NO_TLSv1_2"
        SuplEnable="true"
-       SuplUseApn="true"
+       SuplUseApn="false"
+       SuplUseApnNI="true"
+       SuplUseFwCellInfo="false"
+       SuplDummyCellInfo ="true"
        SuplTlsCertDirPath="/etc/security/cacerts"
        SuplTlsCertPath="/vendor/etc/gnss/gps.cer"
        SuplUT1Seconds="20"
@@ -50,15 +53,19 @@
        CpLppGuardTimeSec="1"
        IgnoreInjectedSystemTime="true"
 
+       AttributionAppPkgName="com.google.android.carrierlocation"
+
        AssertEnabled="true"
        CpLppeCancelDbhOnAgnssProvideLoc="true"
        CpLppeUseAgnssLocForEmptyDbh="true"
        ReAidingOnHotStart="false"
        ReAidingIntervalSec="1200"
        RuntimeSwLteFilterEnable="true"
+       PpsDevice="/sys/class/pps/pps0/assert_elapsed"
   />
 
   <gll
+       PpsEnable="true"
        LogPriMask="LOG_INFO"
        LogFacMask="LOG_NMEA | LOG_GLLIOS | LOG_GLLAPI"
        FrqPlan="FRQ_PLAN_26MHZ_2PPM_49_152MHZ_300PPB"
diff --git a/gps_user.xml.l10 b/location/gps_user.xml.l10
similarity index 90%
rename from gps_user.xml.l10
rename to location/gps_user.xml.l10
index 19dbbef..477e7f4 100644
--- a/gps_user.xml.l10
+++ b/location/gps_user.xml.l10
@@ -19,7 +19,10 @@
 
        SuplSslMethod="SSLv23_NO_TLSv1_2"
        SuplEnable="true"
-       SuplUseApn="true"
+       SuplUseApn="false"
+       SuplUseApnNI="true"
+       SuplUseFwCellInfo="false"
+       SuplDummyCellInfo ="true"
        SuplTlsCertDirPath="/etc/security/cacerts"
        SuplTlsCertPath="/vendor/etc/gnss/gps.cer"
        SuplUT1Seconds="20"
@@ -49,15 +52,19 @@
        CpLppGuardTimeSec="1"
        IgnoreInjectedSystemTime="true"
 
+       AttributionAppPkgName="com.google.android.carrierlocation"
+
        AssertEnabled="false"
        CpLppeCancelDbhOnAgnssProvideLoc="true"
        CpLppeUseAgnssLocForEmptyDbh="true"
        ReAidingOnHotStart="false"
        ReAidingIntervalSec="1200"
        RuntimeSwLteFilterEnable="true"
+       PpsDevice="/sys/class/pps/pps0/assert_elapsed"
   />
 
   <gll
+       PpsEnable="true"
        LogPriMask="LOG_INFO"
        LogFacMask="LOG_NMEA | LOG_GLLIOS | LOG_GLLAPI"
        FrqPlan="FRQ_PLAN_26MHZ_2PPM_49_152MHZ_300PPB"
diff --git a/location/lhd.conf.l10 b/location/lhd.conf.l10
new file mode 100644
index 0000000..c000d58
--- /dev/null
+++ b/location/lhd.conf.l10
@@ -0,0 +1,34 @@
+LheName=bbd
+
+LheRsmResetTimeoutMS=10000
+GpioNStdbyPath=/sys/devices/platform/10940000.spi/spi_master/spi5/spi5.0/nstandby
+
+LhePatch=/vendor/firmware/SensorHub.patch
+Lhe477xDebugFlags=RPC:FACILITY=65535-dKP+CUST+LHE:STDOUT_PUTS:STDOUT_LOG
+LheConsole=/data/vendor/gps/LheConsole
+
+LogEnabled=true
+Log=JAVA
+LogDirectory=/sdcard/gps/broadcom/storage
+
+LheBbdPacket=/dev/ttyBCM
+
+LheBbdControl=/dev/bbd_control
+
+# LheBbdSensor=/dev/bbd_sensor
+
+LheFailSafe=/data/vendor/gps/logs/esw-crash-dump.txt
+LogLevel=*:I
+
+NvStorageDir=/data/vendor/gps/
+
+# Enable BBD debugging at these stages:
+# LheDriverDebugFlags=PATCH_BBD:LHE_BBD:FSC_BBD
+
+LheAutoBaudDelayMS=10
+TrafficLogEnabled=false
+SecondaryConfigPath=/data/vendor/gps/overlay/lhd_overlay.conf
+
+SkipSensorWakeLock=true
+LoggerWakeLockEnable=false
+PpsEnable=true
diff --git a/location/lhd_user.conf.l10 b/location/lhd_user.conf.l10
new file mode 100644
index 0000000..682d03a
--- /dev/null
+++ b/location/lhd_user.conf.l10
@@ -0,0 +1,32 @@
+LheName=bbd
+
+LheRsmResetTimeoutMS=10000
+GpioNStdbyPath=/sys/devices/platform/10940000.spi/spi_master/spi5/spi5.0/nstandby
+
+LhePatch=/vendor/firmware/SensorHub.patch
+Lhe477xDebugFlags=RPC:FACILITY=65535-dKP+CUST+LHE:STDOUT_PUTS:STDOUT_LOG
+# LheConsole=/data/vendor/gps/LheConsole
+
+LogEnabled=false
+Log=JAVA
+LogDirectory=/sdcard/gps/broadcom/storage
+
+LheBbdPacket=/dev/ttyBCM
+
+LheBbdControl=/dev/bbd_control
+
+# LheBbdSensor=/dev/bbd_sensor
+
+# LheFailSafe=/data/vendor/gps/esw-crash-dump.txt
+
+NvStorageDir=/data/vendor/gps/
+
+# Enable BBD debugging at these stages:
+# LheDriverDebugFlags=PATCH_BBD:LHE_BBD:FSC_BBD
+
+LheAutoBaudDelayMS=10
+TrafficLogEnabled=false
+
+SkipSensorWakeLock=true
+LoggerWakeLockEnable=false
+PpsEnable=true
diff --git a/location/scd.conf.l10 b/location/scd.conf.l10
new file mode 100644
index 0000000..43f9cd2
--- /dev/null
+++ b/location/scd.conf.l10
@@ -0,0 +1,6 @@
+LogEnabled=true
+Log=JAVA
+LogDirectory=/sdcard/gps/broadcom/storage
+NvStorageDir=/data/vendor/gps/
+TcpConnectionTimeout=20
+SecondaryConfigPath=/data/vendor/gps/overlay/scd_overlay.conf
diff --git a/location/scd_user.conf.l10 b/location/scd_user.conf.l10
new file mode 100644
index 0000000..e75f209
--- /dev/null
+++ b/location/scd_user.conf.l10
@@ -0,0 +1,5 @@
+LogEnabled=false
+Log=JAVA
+LogDirectory=/sdcard/gps/broadcom/storage
+NvStorageDir=/data/vendor/gps/
+TcpConnectionTimeout=20
diff --git a/lynx/display_colordata_dev_cal0.pb b/lynx/display_colordata_dev_cal0.pb
index b0e7493..3394659 100644
Binary files a/lynx/display_colordata_dev_cal0.pb and b/lynx/display_colordata_dev_cal0.pb differ
diff --git a/lynx/display_golden_cal0.pb b/lynx/display_golden_cal0.pb
new file mode 100644
index 0000000..869b267
Binary files /dev/null and b/lynx/display_golden_cal0.pb differ
diff --git a/lynx/overlay/frameworks/base/core/res/res/values/config.xml b/lynx/overlay/frameworks/base/core/res/res/values/config.xml
index 8df3fca..b38878a 100644
--- a/lynx/overlay/frameworks/base/core/res/res/values/config.xml
+++ b/lynx/overlay/frameworks/base/core/res/res/values/config.xml
@@ -66,6 +66,38 @@
         @left
     </string>
 
+    <!-- Not allow to switch to higher refresh rate when display brightness setting is
+         equal or less than this value -->
+    <integer-array name="config_brightnessThresholdsOfPeakRefreshRate">
+        <!-- System brightness for 10 nits: round((10-2)/(1000-2)*(255-1)+1) = 3 -->
+        <item>3</item> <!-- 20% UI brightness -->
+        <!-- System brightness for 15 nits: round((15-2)/(1000-2)*(255-1)+1) = 4 -->
+        <item>4</item> <!-- 24% UI brightness -->
+    </integer-array>
+    <integer-array name="config_ambientThresholdsOfPeakRefreshRate">
+        <item>-1</item>
+        <item>5</item>
+    </integer-array>
+    <!-- default refresh rate in the zone defined by birghtness and ambient thresholds -->
+    <integer name="config_defaultRefreshRateInZone">90</integer>
+
+    <!-- Default refresh rate while the device has high brightness mode enabled for HDR. -->
+    <integer name="config_defaultRefreshRateInHbmHdr">60</integer>
+
+    <!-- Switch to fixed refresh rate when display brightness setting is
+         equal or more than this value -->
+    <integer-array name="config_highDisplayBrightnessThresholdsOfFixedRefreshRate">
+        <!-- System brightness for 500 nits: round((500-2)/(1000-2)*(255-1)+1) = 128 -->
+        <item>128</item> <!--100% UI normal brightness -->
+    </integer-array>
+
+    <integer-array name="config_highAmbientBrightnessThresholdsOfFixedRefreshRate">
+        <item>50000</item>
+    </integer-array>
+
+    <!-- default refresh rate in the high zone defined by brightness and ambient thresholds -->
+    <integer name="config_fixedRefreshRateInHighZone">60</integer>
+
     <!-- Array of light sensor LUX values to define our levels for auto backlight brightness support.
       The N entries of this array define N  1 zones as follows:
          Zone 0:        0 <= LUX < array[0]
@@ -153,7 +185,10 @@
     <integer name="config_defaultRefreshRate">0</integer>
 
     <!-- The default peak refresh rate. -->
-    <integer name="config_defaultPeakRefreshRate">90</integer>
+    <integer name="config_defaultPeakRefreshRate">60</integer>
+
+    <!-- the number of the max cached processes in the system. -->
+    <integer name="config_customizedMaxCachedProcesses">64</integer>
 
     <integer-array name="config_ambientThresholdLevels">
         <item>2</item>
@@ -250,7 +285,18 @@
     <!-- Type of the udfps long press sensor. Empty if long press is not supported. -->
     <string name="config_dozeUdfpsLongPressSensorType" translatable="false">com.google.sensor.long_press</string>
 
+    <!-- Type of the quick pickup sensor. Empty if quick pickup is not supported. -->
+    <string name="config_quickPickupSensorType" translatable="false">com.google.sensor.quick_pickup</string>
+
+    <!-- UDFPS does not support gestures -->
+    <bool name="config_fingerprintSupportsGestures">false</bool>
+
     <!-- Boolean indicating if restoring network selection should be skipped -->
     <!-- The restoring is handled by modem if it is true -->
     <bool translatable="false" name="skip_restoring_network_selection">true</bool>
+
+    <!-- MMS user agent string -->
+    <string name="config_mms_user_agent" translatable="false">gwkk3</string>
+    <!-- MMS user agent profile url -->
+    <string name="config_mms_user_agent_profile_url" translatable="false">http://www.gstatic.com/android/sms/GWKK3.xml</string>
 </resources>
diff --git a/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml b/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
index a5952d8..837946c 100644
--- a/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
+++ b/lynx/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
@@ -81,5 +81,8 @@
     <string translatable="false" name="config_cameraProtectionExcludedPackages">com.google.android.as</string>
 
     <bool name="config_enableDisplayCutoutProtection">true</bool>
+
+    <!-- The time (in ms) needed to trigger the lock icon view's long-press affordance -->
+    <integer name="config_lockIconLongPress" translatable="false">100</integer>
 </resources>
 
diff --git a/lynx/overlay/packages/apps/OMA-DM/DMService/res/values/config.xml b/lynx/overlay/packages/apps/OMA-DM/DMService/res/values/config.xml
new file mode 100644
index 0000000..83aab99
--- /dev/null
+++ b/lynx/overlay/packages/apps/OMA-DM/DMService/res/values/config.xml
@@ -0,0 +1,8 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- These resources are around just to allow their values to be customized
+     for different hardware and product builds. -->
+<resources xmlns:xliff="urn:oasis:names:tc:xliff:document:1.2">
+
+    <!-- set this to ./DevInfo/Mod -->
+    <string translatable="false" name="config_devinfo_model">G0DZQ</string>
+</resources>
diff --git a/lynx/overlay_packages/SettingsOverlayG82U8/Android.bp b/lynx/overlay_packages/SettingsOverlayG82U8/Android.bp
new file mode 100644
index 0000000..1af1f37
--- /dev/null
+++ b/lynx/overlay_packages/SettingsOverlayG82U8/Android.bp
@@ -0,0 +1,8 @@
+package {
+    default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+runtime_resource_overlay {
+    name: "SettingsOverlayG82U8",
+    product_specific: true,
+}
diff --git a/lynx/overlay_packages/SettingsOverlayG82U8/AndroidManifest.xml b/lynx/overlay_packages/SettingsOverlayG82U8/AndroidManifest.xml
new file mode 100644
index 0000000..8cb5a67
--- /dev/null
+++ b/lynx/overlay_packages/SettingsOverlayG82U8/AndroidManifest.xml
@@ -0,0 +1,9 @@
+<?xml version="1.0" encoding="utf-8"?>
+<manifest xmlns:android="http://schemas.android.com/apk/res/android"
+    package="com.android.settings.overlay.g82u8">
+    <application android:hasCode="false" />
+    <overlay android:targetPackage="com.android.settings"
+             android:requiredSystemPropertyName="ro.boot.hardware.sku"
+             android:requiredSystemPropertyValue="G82U8"
+             android:isStatic="true" />
+</manifest>
diff --git a/lynx/overlay_packages/SettingsOverlayG82U8/res/drawable/regulatory_info.png b/lynx/overlay_packages/SettingsOverlayG82U8/res/drawable/regulatory_info.png
new file mode 100644
index 0000000..cb9d273
Binary files /dev/null and b/lynx/overlay_packages/SettingsOverlayG82U8/res/drawable/regulatory_info.png differ
diff --git a/lynx/radio/lynx_display_primary_mipi_coex_table.csv b/lynx/radio/lynx_display_primary_mipi_coex_table.csv
new file mode 100644
index 0000000..6694f13
--- /dev/null
+++ b/lynx/radio/lynx_display_primary_mipi_coex_table.csv
@@ -0,0 +1,9 @@
+500000,551000
+
+798000,836000,500000
+925000,960000,500000
+3311000,3313000,500000
+3578000,3589000,500000
+740000,768000,551000
+2124000,2126000,551000
+2479000,2481000,551000
diff --git a/manifest.xml b/manifest.xml
index 5909ae3..982c345 100644
--- a/manifest.xml
+++ b/manifest.xml
@@ -116,7 +116,7 @@
     <hal format="hidl">
        <name>vendor.google.whitechapel.audio.audioext</name>
        <transport>hwbinder</transport>
-       <version>2.0</version>
+       <version>4.0</version>
        <interface>
            <name>IAudioExt</name>
            <instance>default</instance>
diff --git a/powerhint.json b/powerhint.json
index 546d0e4..ada2cae 100644
--- a/powerhint.json
+++ b/powerhint.json
@@ -6,6 +6,7 @@
       "Values": [
         "3172000",
         "1539000",
+        "1352000",
         "1014000",
         "421000"
       ],
@@ -41,6 +42,7 @@
       "Path": "/sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq",
       "Values": [
         "9999999",
+        "1401000",
         "1197000",
         "0"
       ],
@@ -68,6 +70,7 @@
       "Path": "/sys/devices/system/cpu/cpu4/cpufreq/scaling_min_freq",
       "Values": [
         "9999999",
+        "1836000",
         "1197000",
         "0"
       ],
@@ -95,6 +98,7 @@
       "Path": "/sys/devices/system/cpu/cpu6/cpufreq/scaling_min_freq",
       "Values": [
         "9999999",
+        "1826000",
         "1106000",
         "0"
       ],
@@ -109,16 +113,7 @@
         "572000",
         "471000",
         "302000",
-        "151000"
-      ],
-      "ResetOnInit": true
-    },
-    {
-      "Name": "UClampThreshold",
-      "Path": "/proc/vendor_sched/uclamp_threshold",
-      "Values": [
-        "0",
-        "8"
+        "202000"
       ],
       "ResetOnInit": true
     },
@@ -136,7 +131,7 @@
       "Path": "/proc/vendor_sched/util_threshold",
       "Values": [
         "1280",
-        "1100"
+        "1100 1078 1024"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": true
@@ -145,9 +140,18 @@
       "Name": "MIFTargetLoad",
       "Path": "/sys/class/devfreq/17000010.devfreq_mif/interactive/target_load",
       "Values": [
-        "20 5 80",
         "20 10 80",
-        "80 10 80"
+        "80 10 80",
+        "60 10 40"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CAMUClampBoost",
+      "Path": "/proc/vendor_sched/cam_uclamp_min",
+      "Values": [
+        "612",
+        "0"
       ],
       "ResetOnInit": true
     },
@@ -156,8 +160,7 @@
       "Path": "/proc/vendor_sched/ta_uclamp_min",
       "Values": [
         "612",
-        "1",
-        "63"
+        "1"
       ],
       "ResetOnInit": true
     },
@@ -170,16 +173,6 @@
       ],
       "ResetOnInit": true
     },
-    {
-      "Name": "SFUClampBoost",
-      "Path": "/proc/vendor_sched/sf_uclamp_min",
-      "Values": [
-        "159",
-        "85",
-        "39"
-      ],
-      "ResetOnInit": true
-    },
     {
       "Name": "MLUclampBoost",
       "Path": "/proc/vendor_sched/nnapi_uclamp_min",
@@ -212,26 +205,18 @@
       "Name": "CDCpuset",
       "Path": "/dev/cpuset/camera-daemon/cpus",
       "Values": [
+        "0-3",
         "4-7",
         "0-7"
       ],
       "ResetOnInit": true
     },
-    {
-      "Name": "RestrictedCpuset",
-      "Path": "/dev/cpuset/restricted/cpus",
-      "Values": [
-        "0-3",
-        "0-7"
-      ],
-      "ResetOnInit": false
-    },
     {
       "Name": "CDHighCpusetCpus",
       "Path": "/dev/cpuset/camera-daemon-high-group/cpus",
       "Values": [
-        "6-7",
-        "0-7"
+        "0-3",
+        "6-7"
       ],
       "ResetOnInit": true
     },
@@ -239,8 +224,8 @@
       "Name": "CDMidCpusetCpus",
       "Path": "/dev/cpuset/camera-daemon-mid-group/cpus",
       "Values": [
-        "4-5",
-        "0-7"
+        "0-3",
+        "4-5"
       ],
       "ResetOnInit": true
     },
@@ -248,8 +233,8 @@
       "Name": "CDMidHighCpusetCpus",
       "Path": "/dev/cpuset/camera-daemon-mid-high-group/cpus",
       "Values": [
-        "4-7",
-        "0-7"
+        "0-3",
+        "4-7"
       ],
       "ResetOnInit": true
     },
@@ -326,6 +311,16 @@
       ],
       "Type": "Property"
     },
+    {
+      "Name": "PowerHALCameraRunning",
+      "Path": "vendor.powerhal.camerarunning",
+      "Values": [
+        "1",
+        "0"
+      ],
+      "Type": "Property",
+      "ResetOnInit": true
+    },
     {
       "Name": "INTCAMFreq",
       "Path": "/sys/devices/platform/17000030.devfreq_intcam/devfreq/17000030.devfreq_intcam/min_freq",
@@ -335,6 +330,16 @@
       ],
       "ResetOnInit": true
     },
+    {
+      "Name": "TNRMaxFreq",
+      "Path": "/sys/devices/platform/17000060.devfreq_tnr/devfreq/17000060.devfreq_tnr/max_freq",
+      "Values": [
+        "664000",
+        "67000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
     {
       "Name": "TNRFreq",
       "Path": "/sys/devices/platform/17000060.devfreq_tnr/devfreq/17000060.devfreq_tnr/min_freq",
@@ -495,20 +500,126 @@
         "1"
       ],
       "DefaultIndex": 0
+    },
+    {
+      "Name": "EM_Profile",
+      "Path": "/sys/kernel/pixel_em/active_profile",
+      "Values": [
+        "default",
+        "cam1"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "PMU_LIT_LCPI_THRESHOLD",
+      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/lcpi_threshold",
+      "Values": [
+        "2",
+        "0"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "PMU_LIT_SPC_THRESHOLD",
+      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/spc_threshold",
+      "Values": [
+        "70",
+        "0"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "PMU_MID_LCPI_THRESHOLD",
+      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/lcpi_threshold",
+      "Values": [
+        "6",
+        "3"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "PMU_MID_SPC_THRESHOLD",
+      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/spc_threshold",
+      "Values": [
+        "65",
+        "50"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "PMU_BIG_LIMIT_FREQ",
+      "Path": "/sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/limit_frequency",
+      "Values": [
+        "2507000",
+        "1826000"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "PMU_BIG_LCPI_THRESHOLD",
+      "Path": "/sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/lcpi_threshold",
+      "Values": [
+        "5",
+        "3"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "PMU_BIG_SPC_THRESHOLD",
+      "Path": "/sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/spc_threshold",
+      "Values": [
+        "69",
+        "50"
+      ],
+      "DefaultIndex": 0
+    },
+    {
+      "Name": "Dex2oatThreads",
+      "Path": "vendor.powerhal.dalvik.vm.dex2oat-threads",
+      "Values": [
+        "1",
+        "2",
+        "4",
+        "6",
+        "8"
+      ],
+      "Type": "Property"
+    },
+    {
+      "Name": "Dex2oatCPUSet",
+      "Path": "vendor.powerhal.dalvik.vm.dex2oat-cpu-set",
+      "Values": [
+        "0,1,2,3",
+        "0,1,2,3,4,5",
+        "0,1,2,3,4,5,6,7"
+      ],
+      "Type": "Property"
     }
   ],
   "Actions": [
     {
-      "PowerHint": "INTERACTION",
-      "Node": "SFUClampBoost",
-      "Duration": 5000,
-      "Value": "85"
+      "PowerHint": "CDCPUSET_RESTRICTED",
+      "Node": "CDCpuset",
+      "Duration": 1000,
+      "Value": "0-3"
     },
     {
-      "PowerHint": "LAUNCH",
-      "Node": "UClampThreshold",
-      "Duration": 5000,
-      "Value": "0"
+      "PowerHint": "CDHIGHCPUSETCPUS_RESTRICTED",
+      "Node": "CDHighCpusetCpus",
+      "Duration": 1000,
+      "Value": "0-3"
+    },
+    {
+      "PowerHint": "CDMIDCPUSETCPUS_RESTRICTED",
+      "Node": "CDMidCpusetCpus",
+      "Duration": 1000,
+      "Value": "0-3"
+    },
+    {
+      "PowerHint": "CDMIDHIGHCPUSETCPUS_RESTRICTED",
+      "Node": "CDMidHighCpusetCpus",
+      "Duration": 1000,
+      "Value": "0-3"
     },
     {
       "PowerHint": "LAUNCH",
@@ -522,12 +633,6 @@
       "Duration": 5000,
       "Value": "1"
     },
-    {
-      "PowerHint": "LAUNCH",
-      "Node": "SFUClampBoost",
-      "Duration": 5000,
-      "Value": "85"
-    },
     {
       "PowerHint": "LAUNCH",
       "Node": "CPUBigClusterMaxFreq",
@@ -570,6 +675,53 @@
       "Duration": 5000,
       "Value": "0"
     },
+    {
+      "PowerHint": "LAUNCH",
+      "Type": "DoHint",
+      "EnableProperty": "vendor.powerhal.camerarunning",
+      "Value": "CDCPUSET_RESTRICTED"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Type": "DoHint",
+      "EnableProperty": "vendor.powerhal.camerarunning",
+      "Value": "CDHIGHCPUSETCPUS_RESTRICTED"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Type": "DoHint",
+      "EnableProperty": "vendor.powerhal.camerarunning",
+      "Value": "CDMIDCPUSETCPUS_RESTRICTED"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Type": "DoHint",
+      "EnableProperty": "vendor.powerhal.camerarunning",
+      "Value": "CDMIDHIGHCPUSETCPUS_RESTRICTED"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Type": "DoHint",
+      "Value": "LAUNCH_EXTEND"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUBigClusterMaxFreq",
+      "Duration": 2000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUMidClusterMaxFreq",
+      "Duration": 2000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPULittleClusterMaxFreq",
+      "Duration": 2000,
+      "Value": "9999999"
+    },
     {
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "MemFreq",
@@ -586,7 +738,7 @@
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CPUBigClusterMinFreq",
       "Duration": 1000,
-      "Value": "9999999"
+      "Value": "1826000"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
@@ -598,7 +750,7 @@
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CPUMidClusterMinFreq",
       "Duration": 1000,
-      "Value": "9999999"
+      "Value": "1836000"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
@@ -610,13 +762,13 @@
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CPULittleClusterMinFreq",
       "Duration": 1000,
-      "Value": "9999999"
+      "Value": "1401000"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
-      "Node": "CDCpuset",
+      "Node": "CAMUClampBoost",
       "Duration": 1000,
-      "Value": "4-7"
+      "Value": "612"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
@@ -624,6 +776,12 @@
       "Duration": 1000,
       "Value": "0"
     },
+    {
+      "PowerHint": "CAMERA_LAUNCH",
+      "Node": "CDCpuset",
+      "Duration": 1000,
+      "Value": "4-7"
+    },
     {
       "PowerHint": "CAMERA_LAUNCH_EXTENDED",
       "Node": "CPUBigClusterMaxFreq",
@@ -700,7 +858,7 @@
       "PowerHint": "CAMERA_SHOT",
       "Node": "CPUBigClusterMinFreq",
       "Duration": 300,
-      "Value": "9999999"
+      "Value": "1826000"
     },
     {
       "PowerHint": "CAMERA_SHOT",
@@ -712,7 +870,7 @@
       "PowerHint": "CAMERA_SHOT",
       "Node": "CPUMidClusterMinFreq",
       "Duration": 300,
-      "Value": "9999999"
+      "Value": "1836000"
     },
     {
       "PowerHint": "CAMERA_BACKEND_BOOST",
@@ -834,6 +992,12 @@
       "Duration": 3000,
       "Value": "848000"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "PowerHALCameraRunning",
+      "Duration": 0,
+      "Value": "1"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
       "Node": "CPULittleClusterMaxFreq",
@@ -882,24 +1046,6 @@
       "Duration": 0,
       "Value": "0"
     },
-    {
-      "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "CDHighCpusetCpus",
-      "Duration": 0,
-      "Value": "6-7"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "CDMidCpusetCpus",
-      "Duration": 0,
-      "Value": "4-5"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "CDMidHighCpusetCpus",
-      "Duration": 0,
-      "Value": "4-7"
-    },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
       "Node": "NPITaskPacking",
@@ -908,34 +1054,76 @@
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CPUUtilThreshold",
+      "Node": "PMU_POLL",
       "Duration": 0,
-      "Value": "1100"
+      "Value": "1"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CPUMidClusterMaxFreq",
+      "Node": "PMU_LIT_LCPI_THRESHOLD",
       "Duration": 0,
-      "Value": "1491000"
+      "Value": "0"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CPUBigClusterMaxFreq",
+      "Node": "PMU_LIT_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PMU_MID_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "3"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PMU_MID_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "50"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PMU_BIG_LIMIT_FREQ",
       "Duration": 0,
       "Value": "1826000"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PMU_BIG_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "3"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PMU_BIG_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "50"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "EM_Profile",
+      "Duration": 0,
+      "Value": "cam1"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PowerHALCameraRunning",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "CPUUtilThreshold",
+      "Duration": 0,
+      "Value": "1100 1078 1024"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "CDPreferHighCap",
       "Duration": 0,
       "Value": "1"
     },
-    {
-      "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CPULittleClusterMaxFreq",
-      "Duration": 0,
-      "Value": "1401000"
-    },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "MemFreq",
@@ -960,30 +1148,18 @@
       "Duration": 0,
       "Value": "0"
     },
-    {
-      "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CDHighCpusetCpus",
-      "Duration": 0,
-      "Value": "6-7"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CDMidCpusetCpus",
-      "Duration": 0,
-      "Value": "4-5"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CDMidHighCpusetCpus",
-      "Duration": 0,
-      "Value": "4-7"
-    },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "NPITaskPacking",
       "Duration": 0,
       "Value": "0"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_STANDARD",
+      "Node": "PowerHALCameraRunning",
+      "Duration": 0,
+      "Value": "1"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "CDPreferHighCap",
@@ -1018,7 +1194,7 @@
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "MemFreq",
       "Duration": 0,
-      "Value": "1014000"
+      "Value": "1352000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
@@ -1026,30 +1202,18 @@
       "Duration": 0,
       "Value": "20 10 80"
     },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CDHighCpusetCpus",
-      "Duration": 0,
-      "Value": "6-7"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CDMidCpusetCpus",
-      "Duration": 0,
-      "Value": "4-5"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CDMidHighCpusetCpus",
-      "Duration": 0,
-      "Value": "4-7"
-    },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "NPITaskPacking",
       "Duration": 0,
       "Value": "0"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_LOW",
+      "Node": "PowerHALCameraRunning",
+      "Duration": 0,
+      "Value": "1"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CDPreferHighCap",
@@ -1098,30 +1262,32 @@
       "Duration": 0,
       "Value": "20 10 80"
     },
-    {
-      "PowerHint": "CAMERA_STREAMING_LOW",
-      "Node": "CDHighCpusetCpus",
-      "Duration": 0,
-      "Value": "6-7"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_LOW",
-      "Node": "CDMidCpusetCpus",
-      "Duration": 0,
-      "Value": "4-5"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_LOW",
-      "Node": "CDMidHighCpusetCpus",
-      "Duration": 0,
-      "Value": "4-7"
-    },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "NPITaskPacking",
       "Duration": 0,
       "Value": "0"
     },
+    {
+      "PowerHint": "CAMERA_VIDEO_RECORDING",
+      "Type": "MaskHint",
+      "Value": "CDCPUSET_RESTRICTED"
+    },
+    {
+      "PowerHint": "CAMERA_VIDEO_RECORDING",
+      "Type": "MaskHint",
+      "Value": "CDHIGHCPUSETCPUS_RESTRICTED"
+    },
+    {
+      "PowerHint": "CAMERA_VIDEO_RECORDING",
+      "Type": "MaskHint",
+      "Value": "CDMIDCPUSETCPUS_RESTRICTED"
+    },
+    {
+      "PowerHint": "CAMERA_VIDEO_RECORDING",
+      "Type": "MaskHint",
+      "Value": "CDMIDHIGHCPUSETCPUS_RESTRICTED"
+    },
     {
       "PowerHint": "CAMERA_GPU_HIGH",
       "Node": "GPUMinFreq",
@@ -1134,6 +1300,12 @@
       "Duration": 0,
       "Value": "302000"
     },
+    {
+      "PowerHint": "CAMERA_TNR_LOW",
+      "Node": "TNRMaxFreq",
+      "Duration": 0,
+      "Value": "67000"
+    },
     {
       "PowerHint": "FIXED_PERFORMANCE",
       "Node": "CPUBigClusterMaxFreq",
@@ -1270,13 +1442,13 @@
       "PowerHint": "REFRESH_90FPS",
       "Node": "TAUClampBoost",
       "Duration": 0,
-      "Value": "63"
+      "Value": "1"
     },
     {
       "PowerHint": "REFRESH_60FPS",
       "Node": "TAUClampBoost",
       "Duration": 0,
-      "Value": "63"
+      "Value": "1"
     },
     {
       "PowerHint": "ADPF_DISABLE_TA_BOOST",
@@ -1296,11 +1468,6 @@
       "Duration": 0,
       "Value": "1"
     },
-    {
-      "PowerHint": "DISPLAY_IDLE",
-      "Type": "EndHint",
-      "Value": "INTERACTION"
-    },
     {
       "PowerHint": "DISPLAY_IDLE",
       "Type": "EndHint",
@@ -1337,82 +1504,412 @@
       "Value": "572000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "PMU_POLL",
       "Duration": 0,
       "Value": "1"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "BigControlTempSet",
       "Duration": 0,
       "Value": "80000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "MidControlTempSet",
       "Duration": 0,
       "Value": "80000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "LittleControlTempSet",
       "Duration": 0,
       "Value": "80000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "G3dControlTempSet",
       "Duration": 0,
       "Value": "80000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "TpuControlTempSet",
       "Duration": 0,
       "Value": "80000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "BigSwitchOnTempSet",
       "Duration": 0,
       "Value": "60000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "MidSwitchOnTempSet",
       "Duration": 0,
       "Value": "60000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "LittleSwitchOnTempSet",
       "Duration": 0,
       "Value": "60000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "G3dSwitchOnTempSet",
       "Duration": 0,
       "Value": "60000"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_LIGHT",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "TpuSwitchOnTempSet",
       "Duration": 0,
       "Value": "60000"
     },
     {
-      "PowerHint": "FACE_UNLOCK_BOOST",
-      "Node": "CPUBigClusterMaxFreq",
-      "Duration": 1000,
-      "Value": "9999999"
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
+      "Node": "Dex2oatThreads",
+      "Duration": 0,
+      "Value": "6"
     },
     {
-      "PowerHint": "FACE_UNLOCK_BOOST",
-      "Node": "CPUBigClusterMinFreq",
-      "Duration": 1000,
-      "Value": "9999999"
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
+      "Node": "Dex2oatCPUSet",
+      "Duration": 0,
+      "Value": "0,1,2,3,4,5"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "PMU_POLL",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "BigControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "MidControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "LittleControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "G3dControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "TpuControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "BigSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "MidSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "LittleSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "G3dSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "TpuSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "Dex2oatThreads",
+      "Duration": 0,
+      "Value": "4"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
+      "Node": "Dex2oatCPUSet",
+      "Duration": 0,
+      "Value": "0,1,2,3"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "PMU_POLL",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "BigControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "MidControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "LittleControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "G3dControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "TpuControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "BigSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "MidSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "LittleSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "G3dSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "TpuSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "Dex2oatThreads",
+      "Duration": 0,
+      "Value": "4"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
+      "Node": "Dex2oatCPUSet",
+      "Duration": 0,
+      "Value": "0,1,2,3"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "PMU_POLL",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "BigControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "MidControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "LittleControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "G3dControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "TpuControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "BigSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "MidSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "LittleSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "G3dSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "TpuSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "Dex2oatThreads",
+      "Duration": 0,
+      "Value": "2"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
+      "Node": "Dex2oatCPUSet",
+      "Duration": 0,
+      "Value": "0,1,2,3"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "PMU_POLL",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "CPU_LITTLE_TSKIN_BYPASS",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "CPU_MID_TSKIN_BYPASS",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "CPU_BIG_TSKIN_BYPASS",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "BigControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "MidControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "LittleControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "G3dControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "TpuControlTempSet",
+      "Duration": 0,
+      "Value": "80000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "BigSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "MidSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "LittleSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "G3dSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "TpuSwitchOnTempSet",
+      "Duration": 0,
+      "Value": "60000"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "Dex2oatThreads",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "Node": "Dex2oatCPUSet",
+      "Duration": 0,
+      "Value": "0,1,2,3"
     },
     {
       "PowerHint": "FACE_UNLOCK_BOOST",
@@ -1474,90 +1971,6 @@
       "Duration": 1000,
       "Value": "1"
     },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "PMU_POLL",
-      "Duration": 0,
-      "Value": "1"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "CPU_LITTLE_TSKIN_BYPASS",
-      "Duration": 0,
-      "Value": "0"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "CPU_MID_TSKIN_BYPASS",
-      "Duration": 0,
-      "Value": "0"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "CPU_BIG_TSKIN_BYPASS",
-      "Duration": 0,
-      "Value": "0"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "BigControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "MidControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "LittleControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "G3dControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "TpuControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "BigSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "MidSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "LittleSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "G3dSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN_EMERGENCY",
-      "Node": "TpuSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
     {
       "PowerHint": "ML_ACC",
       "Node": "MLUclampBoost",
@@ -1569,18 +1982,6 @@
       "Node": "PMQoSCpuDmaLatency",
       "Duration": 2000,
       "Value": "44"
-    },
-    {
-      "PowerHint": "DEVICE_IDLE",
-      "Node": "RestrictedCpuset",
-      "Duration": 0,
-      "Value": "0-3"
-    },
-    {
-      "PowerHint": "DISPLAY_INACTIVE",
-      "Node": "RestrictedCpuset",
-      "Duration": 0,
-      "Value": "0-3"
     }
   ],
   "AdpfConfig": [
diff --git a/powerstats/Android.bp b/powerstats/Android.bp
index 2a38f9f..55a934c 100644
--- a/powerstats/Android.bp
+++ b/powerstats/Android.bp
@@ -16,6 +16,7 @@ soong_namespace {
     imports: [
         "hardware/google/pixel",
         "device/google/gs201/powerstats",
+        "device/google/gs-common/powerstats",
     ]
 }
 
@@ -38,5 +39,6 @@ cc_binary {
 
     shared_libs: [
         "android.hardware.power.stats-impl.gs201",
+        "android.hardware.power.stats-impl.gs-common",
     ],
 }
diff --git a/powerstats/service.cpp b/powerstats/service.cpp
index ef07d0e..d8856cc 100644
--- a/powerstats/service.cpp
+++ b/powerstats/service.cpp
@@ -18,6 +18,7 @@
 
 #include <dataproviders/DisplayStateResidencyDataProvider.h>
 #include <dataproviders/PowerStatsEnergyConsumer.h>
+#include <DevfreqStateResidencyDataProvider.h>
 #include <Gs201CommonDataProviders.h>
 #include <PowerStatsAidl.h>
 
@@ -27,6 +28,7 @@
 #include <android/binder_process.h>
 #include <log/log.h>
 
+using aidl::android::hardware::power::stats::DevfreqStateResidencyDataProvider;
 using aidl::android::hardware::power::stats::DisplayStateResidencyDataProvider;
 using aidl::android::hardware::power::stats::EnergyConsumerType;
 using aidl::android::hardware::power::stats::PowerStatsEnergyConsumer;
@@ -53,6 +55,39 @@ void addDisplay(std::shared_ptr<PowerStats> p) {
              {"On: 1080x2400@90", 3}}));
 }
 
+void addGPUGs202(std::shared_ptr<PowerStats> p) {
+    std::map<std::string, int32_t> stateCoeffs;
+
+    // Add GPU state residency
+    p->addStateResidencyDataProvider(std::make_unique<DevfreqStateResidencyDataProvider>(
+            "GPU",
+            "/sys/devices/platform/28000000.mali"));
+
+    // Add GPU energy consumer
+    stateCoeffs = {
+        {"202000",  890},
+        {"251000", 1102},
+        {"302000", 1308},
+        {"351000", 1522},
+        {"400000", 1772},
+        {"434000", 1931},
+        {"471000", 2105},
+        {"510000", 2292},
+        {"572000", 2528},
+        {"633000", 2811},
+        {"701000", 3127},
+        {"762000", 3452},
+        {"848000", 4044}};
+
+    p->addEnergyConsumer(PowerStatsEnergyConsumer::createMeterAndAttrConsumer(
+            p,
+            EnergyConsumerType::OTHER,
+            "GPU",
+            {"S2S_VDD_G3D", "S8S_VDD_G3D_L2"},
+            {{UID_TIME_IN_STATE, "/sys/devices/platform/28000000.mali/uid_time_in_state"}},
+            stateCoeffs));
+}
+
 int main() {
     LOG(INFO) << "Pixel PowerStats HAL AIDL Service is starting.";
 
@@ -61,9 +96,22 @@ int main() {
 
     std::shared_ptr<PowerStats> p = ndk::SharedRefBase::make<PowerStats>();
 
-    addGs201CommonDataProvidersQc(p);
+    setEnergyMeter(p);
+    addAoC(p);
+    addCPUclusters(p);
     addDisplay(p);
+    addSoC(p);
+    addGNSS(p);
+    addMobileRadio(p);
+    addPCIe(p);
+    addWlan(p);
+    addTPU(p);
+    addUfs(p);
     addNFC(p, "/sys/devices/platform/10970000.hsi2c/i2c-4/i2c-st21nfc/power_stats");
+    addPowerDomains(p);
+    addDevfreq(p);
+    addGPUGs202(p);
+    addDvfsStats(p);
 
     const std::string instance = std::string() + PowerStats::descriptor + "/default";
     binder_status_t status = AServiceManager_addService(p->asBinder().get(), instance.c_str());
diff --git a/rro_overlays/WifiOverlay/res/values/config.xml b/rro_overlays/WifiOverlay/res/values/config.xml
index 070422c..4fa03d2 100644
--- a/rro_overlays/WifiOverlay/res/values/config.xml
+++ b/rro_overlays/WifiOverlay/res/values/config.xml
@@ -109,9 +109,6 @@
            be checked via NL80211 interface -->
     <bool translatable="false" name="config_wifi11axSupportOverride">true</bool>
 
-    <!-- Wifi driver supports 6GHz band for softap -->
-    <bool translatable="false" name="config_wifiSoftap6ghzSupported">true</bool>
-
     <!-- Wifi driver supports WPA3 Simultaneous Authentication of Equals (WPA3-SAE) for softap -->
     <bool translatable="false" name="config_wifi_softap_sae_supported">true</bool>
 
diff --git a/thermal_info_config_charge_lynx.json b/thermal_info_config_charge_lynx.json
new file mode 100644
index 0000000..63e35fb
--- /dev/null
+++ b/thermal_info_config_charge_lynx.json
@@ -0,0 +1,294 @@
+{
+    "Sensors":[
+        {
+            "Name":"battery",
+            "Type":"BATTERY",
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
+            "Multiplier":0.001
+        },
+        {
+            "Name":"neutral_therm",
+            "Type":"UNKNOWN",
+            "TempPath":"/dev/thermal/tz-by-name/neutral_therm/tz_temp",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"gnss_tcxo_therm",
+            "Type":"UNKNOWN",
+            "TempPath":"/dev/thermal/tz-by-name/gnss_tcxo_therm/tz_temp",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"usb_pwr_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 40.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"usb_pwr_therm2",
+            "Type":"UNKNOWN",
+            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm2/tz_temp",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"skin_therm1",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 29.9, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/skin_therm1/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"skin_therm2",
+            "Type":"UNKNOWN",
+            "TempPath":"/dev/thermal/tz-by-name/skin_therm2/tz_temp",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"disp_therm",
+            "Type":"UNKNOWN",
+            "TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"quiet_therm",
+            "Type":"UNKNOWN",
+            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"],
+            "Coefficient":[0.05, 0.05, 0.7, 0.05, 0.05, 0.05, 0.05],
+            "Offset":-1500,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-QUT-SKIN2-USB-USB2-2",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2"],
+            "Coefficient":[0.15, 0.15, 0.15, 0.55],
+            "Offset":-1000,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-QUT-SKIN2-USB-GNSS-3",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "gnss_tcxo_therm"],
+            "Coefficient":[0.166, 0.45, 0.217, 0.167],
+            "Offset":-1950,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"],
+            "Coefficient":[-0.05, -0.05, 1.3, -0.05, -0.05, -0.05, -0.05],
+            "Offset":-1950,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CHARGE",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":"skin_therm1",
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0],
+            "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 1200, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "ExcludedPowerInfo": [
+                {
+                    "PowerRail": "PARTIAL_SYSTEM_POWER",
+                    "PowerWeight": [0.5, 0.5, 0.8, 1.0, 1.0, 1.0, 1.0]
+                }
+            ],
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "fcc",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "CdevCeiling": [0, 11, 11, 11, 12, 12, 12],
+                    "LimitInfo": [0, 0, 0, 0, 0, 12, 12]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CHARGE-WLC",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":"skin_therm1",
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm"],
+            "Coefficient":[0.51, 0.25, 0.24],
+            "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 2000, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "ExcludedPowerInfo": [
+                {
+                    "PowerRail": "PARTIAL_SYSTEM_POWER",
+                    "PowerWeight": [0.5, 0.5, 0.8, 1.0, 1.0, 1.0, 1.0]
+                }
+            ],
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "dc_icl",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "CdevCeiling": [0, 5, 8, 11, 12, 12, 12],
+                    "LimitInfo": [0, 0, 0, 0, 0, 12, 12]
+                }
+            ]
+        },
+        {
+            "Name":"USB-MINUS-SKIN2",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "TriggerSensor": "usb_pwr_therm",
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["usb_pwr_therm", "skin_therm2"],
+            "Coefficient":[1.0, -1.0],
+            "HotThreshold":["NAN", "7.0", "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "usbc-port",
+                    "LimitInfo": [0, 0, 0, 0, 0, 0, 0]
+                }
+            ],
+            "Multiplier":0.001,
+            "PollingDelay":0,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"VIRTUAL-USB-THROTTLING",
+            "Type":"USB_PORT",
+            "Version":"0.1",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "usb_pwr_therm",
+            "Combination":["usb_pwr_therm", "USB-MINUS-SKIN2"],
+            "Coefficient":[40000, 10000],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "2.0", "NAN", "NAN"],
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "usbc-port",
+                    "LimitInfo": [0, 0, 0, 0, 1, 1, 1]
+                }
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        }
+    ],
+    "CoolingDevices":[
+        {
+            "Name":"fcc",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"dc_icl",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"usbc-port",
+            "Type":"BATTERY"
+        }
+    ],
+    "PowerRails":[
+        {
+            "Name":"VSYS_PWR_WLAN_BT"
+        },
+        {
+            "Name":"VSYS_PWR_DISPLAY"
+        },
+        {
+            "Name":"VSYS_PWR_MODEM"
+        },
+        {
+            "Name":"S2M_VDD_CPUCL2",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+
+        },
+        {
+            "Name":"S3M_VDD_CPUCL1",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+        },
+        {
+            "Name":"S4M_VDD_CPUCL0",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+        },
+        {
+            "Name":"S5M_VDD_INT"
+        },
+        {
+            "Name":"S1M_VDD_MIF"
+        },
+        {
+            "Name":"S2S_VDD_G3D",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+        },
+        {
+            "Name":"PARTIAL_SYSTEM_POWER",
+            "VirtualRails":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["VSYS_PWR_MODEM", "S2M_VDD_CPUCL2", "S3M_VDD_CPUCL1", "S4M_VDD_CPUCL0", "S5M_VDD_INT", "S1M_VDD_MIF", "S2S_VDD_G3D", "VSYS_PWR_WLAN_BT", "VSYS_PWR_DISPLAY"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        }
+    ]
+}
diff --git a/thermal_info_config_lynx.json b/thermal_info_config_lynx.json
index 13a59b1..3b63011 100644
--- a/thermal_info_config_lynx.json
+++ b/thermal_info_config_lynx.json
@@ -36,11 +36,11 @@
         {
             "Name":"skin_therm1",
             "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 29.9, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotThreshold":["NAN", 27.9, "NAN", "NAN", "NAN", "NAN", "NAN"],
             "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
             "TempPath":"/dev/thermal/tz-by-name/skin_therm1/tz_temp",
             "Multiplier":0.001,
-	    "PollingDelay":60000,
+            "PollingDelay":60000,
             "PassiveDelay":7000
         },
         {
@@ -62,38 +62,61 @@
             "Multiplier":0.001
         },
         {
-            "Name":"VIRTUAL-QUIET-SKIN2-USB2",
+            "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1",
             "Type":"UNKNOWN",
             "Hidden":true,
             "VirtualSensor":true,
             "Formula":"WEIGHTED_AVG",
-            "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm2"],
-            "Coefficient":[0.4, 0.3, 0.3],
+            "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"],
+            "Coefficient":[0.05, 0.05, 0.7, 0.05, 0.05, 0.05, 0.05],
+            "Offset":-1500,
             "Multiplier":0.001
         },
         {
-            "Name":"VIRTUAL-SKIN2-SKIN1-GNSS-BATT",
+            "Name":"VIRTUAL-QUT-SKIN2-USB-USB2-2",
             "Type":"UNKNOWN",
             "Hidden":true,
             "VirtualSensor":true,
             "Formula":"WEIGHTED_AVG",
-            "Combination":["skin_therm2", "skin_therm1", "gnss_tcxo_therm", "battery"],
-            "Coefficient":[0.2, 0.2, 0.1, 0.5],
+            "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2"],
+            "Coefficient":[0.15, 0.15, 0.15, 0.55],
+            "Offset":-1000,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-QUT-SKIN2-USB-GNSS-3",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["quiet_therm", "skin_therm2", "usb_pwr_therm", "gnss_tcxo_therm"],
+            "Coefficient":[0.166, 0.45, 0.217, 0.167],
+            "Offset":-1950,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["neutral_therm", "quiet_therm", "skin_therm1", "skin_therm2", "usb_pwr_therm", "usb_pwr_therm2", "gnss_tcxo_therm"],
+            "Coefficient":[-0.05, -0.05, 1.3, -0.05, -0.05, -0.05, -0.05],
+            "Offset":-1950,
             "Multiplier":0.001
         },
         {
             "Name":"VIRTUAL-SKIN",
             "Type":"SKIN",
-            "Version":"0.1",
+            "Version":"0.7",
             "VirtualSensor":true,
             "TriggerSensor":"skin_therm1",
             "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-QUIET-SKIN2-USB2", "VIRTUAL-SKIN2-SKIN1-GNSS-BATT"],
-            "Coefficient":[1.0, 1.0],
+            "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0],
             "HotThreshold":["NAN", 39.0, 43.0, 45.0, 47.0, 52.0, 55.0],
             "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9],
             "Multiplier":0.001,
-            "SendPowerHint":true,
             "Monitor":true,
             "PollingDelay":300000,
             "PassiveDelay":7000,
@@ -105,30 +128,51 @@
             ]
         },
         {
-            "Name":"VIRTUAL-SKIN-CPU-GPU",
+            "Name":"VIRTUAL-SKIN-HINT",
             "Type":"UNKNOWN",
             "VirtualSensor":true,
             "TriggerSensor":"skin_therm1",
             "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-QUIET-SKIN2-USB2", "VIRTUAL-SKIN2-SKIN1-GNSS-BATT"],
-            "Coefficient":[1.0, 1.0],
-            "HotThreshold":["NAN", 39.0, 43.0, 45.0, 47.0, 52.0, 55.0],
+            "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0],
+            "HotThreshold":["NAN", 37.0, 43.0, 45.0, 47.0, 52.0, 55.0],
             "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9],
             "Multiplier":0.001,
+            "SendPowerHint":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CPU",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":"skin_therm1",
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0],
+            "HotThreshold":["NAN", 37.0, 39.0, 41.0, 47.0, 52.0, 55.0],
+            "HotHysteresis":[0.0, 0.9, 0.9, 0.9, 1.9, 1.9, 1.9],
+            "Multiplier":0.001,
             "PollingDelay":300000,
             "PassiveDelay":7000,
             "PIDInfo": {
-                "K_Po":["NAN", "NAN", 1800, 500, "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 1800, 500, "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 20, 5, "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, 0, "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1500, 100, "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 2500, 1300, "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 2000, 800, "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 10000, 4000, "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 2, 0, "NAN", "NAN", "NAN"],
-                "E_Integral_Default": 50
+                "K_Po":["NAN", "NAN", "NAN", 400, "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", "NAN", 400, "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", "NAN", 10000, "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", "NAN", 2, "NAN", "NAN", "NAN"]
             },
+            "ExcludedPowerInfo": [
+                {
+                    "PowerRail": "VSYS_PWR_MODEM",
+                    "PowerWeight": [0.3, 0.3, 0.3, 0.3, 0.3, 0.3, 0.3]
+                }
+            ],
             "BindedCdevInfo": [
                 {
                     "CdevRequest": "thermal-cpufreq-0",
@@ -136,6 +180,7 @@
                     "MaxReleaseStep": 1,
                     "MaxThrottleStep": 1,
                     "BindedPowerRail": "S4M_VDD_CPUCL0",
+                    "CdevCeiling": [0, 8, 8, 8, 8, 10, 10],
                     "LimitInfo": [0, 0, 0, 0, 8, 10, 10]
                 },
                 {
@@ -144,6 +189,7 @@
                     "MaxReleaseStep": 1,
                     "MaxThrottleStep": 1,
                     "BindedPowerRail": "S3M_VDD_CPUCL1",
+                    "CdevCeiling": [0, 12, 12, 12, 12, 14, 14],
                     "LimitInfo": [0, 0, 0, 0, 12, 14, 14]
                 },
                 {
@@ -152,6 +198,62 @@
                     "MaxReleaseStep": 1,
                     "MaxThrottleStep": 1,
                     "BindedPowerRail": "S2M_VDD_CPUCL2",
+                    "CdevCeiling": [0, 15, 15, 15, 15, 17, 17],
+                    "LimitInfo": [0, 0, 0, 0, 15, 17, 17]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CPU-GPU",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":"skin_therm1",
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0],
+            "HotThreshold":["NAN", 37.0, 43.0, 45.0, 47, 52.0, 55.0],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", "NAN", 700, "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", "NAN", 3900, "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", "NAN", 2, "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-0",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "BindedPowerRail": "S4M_VDD_CPUCL0",
+                    "CdevCeiling": [0, 8, 8, 8, 8, 10, 10],
+                    "LimitInfo": [0, 0, 0, 0, 8, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-1",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "BindedPowerRail": "S3M_VDD_CPUCL1",
+                    "CdevCeiling": [0, 12, 12, 12, 12, 14, 14],
+                    "LimitInfo": [0, 0, 0, 0, 12, 14, 14]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "BindedPowerRail": "S2M_VDD_CPUCL2",
+                    "CdevCeiling": [0, 15, 15, 15, 15, 17, 17],
                     "LimitInfo": [0, 0, 0, 0, 15, 17, 17]
                 },
                 {
@@ -160,7 +262,8 @@
                     "MaxReleaseStep": 1,
                     "MaxThrottleStep": 1,
                     "BindedPowerRail": "S2S_VDD_G3D",
-                    "LimitInfo": [0, 0, 0, 0, 10, 11, 11]
+                    "CdevCeiling": [0, 10, 10, 10, 10, 12, 12],
+                    "LimitInfo": [0, 0, 0, 0, 10, 12, 12]
                 }
             ]
         },
@@ -170,32 +273,79 @@
             "VirtualSensor":true,
             "TriggerSensor":"skin_therm1",
             "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-QUIET-SKIN2-USB2", "VIRTUAL-SKIN2-SKIN1-GNSS-BATT"],
-            "Coefficient":[1.0, 1.0],
-            "HotThreshold":["NAN", 39.0, 41.0, 43.0, 45.0, 47.0, 55.0],
+            "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0],
+            "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0],
             "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9],
             "Multiplier":0.001,
-            "Monitor":true,
             "PollingDelay":300000,
             "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 1200, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "ExcludedPowerInfo": [
+                {
+                    "PowerRail": "PARTIAL_SYSTEM_POWER",
+                    "PowerWeight": [0.5, 0.5, 0.8, 1.0, 1.0, 1.0, 1.0]
+                }
+            ],
             "BindedCdevInfo": [
                 {
                     "CdevRequest": "fcc",
-                    "LimitInfo": [0, 3, 6, 6, 8, 8, 8],
-                    "BindedPowerRail": "PARTIAL_SYSTEM_POWER",
-                    "PowerThreshold": [500, 500, 500, 500, 0, 0, 0],
-                    "CdevFloorWithPowerLink": [0, 0, 3, 3, 8 ,8 ,8],
-                    "ReleaseLogic": "RELEASE_TO_FLOOR",
-                    "ThrottlingWithPowerLink":true
-                },
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "CdevCeiling": [0, 11, 11, 11, 12, 12, 12],
+                    "LimitInfo": [0, 0, 0, 0, 0, 12, 12]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CHARGE-WLC",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "TriggerSensor":"skin_therm1",
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["skin_therm2", "usb_pwr_therm2", "disp_therm"],
+            "Coefficient":[0.51, 0.25, 0.24],
+            "HotThreshold":["NAN", 35.0, 39.0, 43.0, 45.0, 47.0, 55.0],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.9, 1.9, 1.9],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 2000, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 300, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 6000, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 2, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "ExcludedPowerInfo": [
+                {
+                    "PowerRail": "PARTIAL_SYSTEM_POWER",
+                    "PowerWeight": [0.5, 0.5, 0.8, 1.0, 1.0, 1.0, 1.0]
+                }
+            ],
+            "BindedCdevInfo": [
                 {
                     "CdevRequest": "dc_icl",
-                    "LimitInfo": [0, 1, 2, 3, 4, 4, 4],
-                    "BindedPowerRail": "PARTIAL_SYSTEM_POWER",
-                    "PowerThreshold": [500, 500, 500, 500, 0, 0, 0],
-                    "CdevFloorWithPowerLink": [0, 1, 2, 3, 4, 4, 4],
-                    "ReleaseLogic": "RELEASE_TO_FLOOR",
-                    "ThrottlingWithPowerLink":true
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "CdevCeiling": [0, 5, 8, 11, 12, 12, 12],
+                    "LimitInfo": [0, 0, 0, 0, 0, 12, 12]
                 }
             ]
         },
@@ -205,12 +355,12 @@
             "VirtualSensor":true,
             "TriggerSensor":"skin_therm1",
             "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-QUIET-SKIN2-USB2", "VIRTUAL-SKIN2-SKIN1-GNSS-BATT"],
-            "Coefficient":[1.0, 1.0],
+            "Combination":["VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-1", "VIRTUAL-QUT-SKIN2-USB-USB2-2", "VIRTUAL-QUT-SKIN2-USB-GNSS-3", "VIRTUAL-NEU-QUT-SKIN1-SKIN2-USB-USB2-GNSS-4"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0],
             "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 54.0, "NAN"],
             "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0],
             "Multiplier":0.001,
-            "Monitor":true,
+            "SendCallback":true,
             "PollingDelay":300000,
             "PassiveDelay":7000
         },
@@ -218,10 +368,20 @@
             "Name":"USB-MINUS-SKIN2",
             "Type":"UNKNOWN",
             "VirtualSensor":true,
+            "TriggerSensor": "usb_pwr_therm",
             "Formula":"WEIGHTED_AVG",
             "Combination":["usb_pwr_therm", "skin_therm2"],
             "Coefficient":[1.0, -1.0],
-            "Multiplier":0.001
+            "HotThreshold":["NAN", "7.0", "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "usbc-port",
+                    "LimitInfo": [0, 0, 0, 0, 0, 0, 0]
+                }
+            ],
+            "Multiplier":0.001,
+            "PollingDelay":0,
+            "PassiveDelay":7000
         },
         {
             "Name":"VIRTUAL-USB-THROTTLING",
@@ -263,31 +423,31 @@
         {
             "Name":"LITTLE",
             "Type":"CPU",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
             "Multiplier":0.001
         },
         {
             "Name":"MID",
             "Type":"CPU",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
             "Multiplier":0.001
         },
         {
             "Name":"BIG",
             "Type":"CPU",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
             "Multiplier":0.001
         },
         {
             "Name":"G3D",
             "Type":"GPU",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
             "Multiplier":0.001
         },
         {
             "Name":"TPU",
             "Type":"NPU",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 115.0],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", "NAN"],
             "Multiplier":0.001
         },
         {
@@ -362,7 +522,7 @@
             "BindedCdevInfo": [
                 {
                     "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 9, 9, 9]
+                    "LimitInfo": [0, 0, 0, 0, 11, 11, 11]
                 }
             ]
         },
@@ -381,7 +541,7 @@
             "BindedCdevInfo": [
                 {
                     "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 9, 9, 9]
+                    "LimitInfo": [0, 0, 0, 0, 11, 11, 11]
                 }
             ]
         },
@@ -419,7 +579,7 @@
             "BindedCdevInfo": [
                 {
                     "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                    "LimitInfo": [0, 0, 0, 0, 5, 5, 5]
                 }
             ]
         },
@@ -458,7 +618,7 @@
                 },
                 {
                     "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 3, 3, 3]
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
                 },
                 {
                     "CdevRequest": "tpu_cooling",
@@ -512,7 +672,7 @@
                 },
                 {
                     "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                    "LimitInfo": [0, 0, 0, 0, 5, 5, 5]
                 },
                 {
                     "CdevRequest": "tpu_cooling",
@@ -533,7 +693,7 @@
                 },
                 {
                     "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 3, 3, 3]
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
                 },
                 {
                     "CdevRequest": "tpu_cooling",
@@ -651,10 +811,15 @@
     ],
     "PowerRails":[
         {
-            "Name":"PPVAR_VSYS_PWR_DISP"
+            "Name":"VSYS_PWR_WLAN_BT"
         },
         {
-            "Name":"VSYS_PWR_MODEM"
+            "Name":"VSYS_PWR_DISPLAY"
+        },
+        {
+            "Name":"VSYS_PWR_MODEM",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
         },
         {
             "Name":"S2M_VDD_CPUCL2",
@@ -687,8 +852,8 @@
             "Name":"PARTIAL_SYSTEM_POWER",
             "VirtualRails":true,
             "Formula":"WEIGHTED_AVG",
-            "Combination":["VSYS_PWR_MODEM", "S2M_VDD_CPUCL2", "S3M_VDD_CPUCL1", "S4M_VDD_CPUCL0", "S5M_VDD_INT", "S1M_VDD_MIF", "S2S_VDD_G3D"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
+            "Combination":["VSYS_PWR_MODEM", "S2M_VDD_CPUCL2", "S3M_VDD_CPUCL1", "S4M_VDD_CPUCL0", "S5M_VDD_INT", "S1M_VDD_MIF", "S2S_VDD_G3D", "VSYS_PWR_WLAN_BT", "VSYS_PWR_DISPLAY"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
             "PowerSampleDelay":14000,
             "PowerSampleCount":5
         }
diff --git a/vibrator/Android.bp b/vibrator/Android.bp
new file mode 100644
index 0000000..c6da071
--- /dev/null
+++ b/vibrator/Android.bp
@@ -0,0 +1,52 @@
+//
+// Copyright (C) 2019 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+package {
+    default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+cc_defaults {
+    name: "PixelVibratorDefaultsPrivateLynx",
+    relative_install_path: "hw",
+    static_libs: [
+        "PixelVibratorCommonPrivateLynx",
+    ],
+    shared_libs: [
+        "libbase",
+        "libbinder_ndk",
+        "libcutils",
+        "libhardware",
+        "liblog",
+        "libutils",
+    ],
+}
+
+cc_defaults {
+    name: "PixelVibratorBinaryDefaultsPrivateLynx",
+    defaults: ["PixelVibratorDefaultsPrivateLynx"],
+    shared_libs: [
+        "android.hardware.vibrator-V2-ndk",
+    ],
+}
+
+cc_defaults {
+    name: "PixelVibratorTestDefaultsPrivateLynx",
+    defaults: ["PixelVibratorDefaultsPrivateLynx"],
+    static_libs: [
+        "android.hardware.vibrator-V2-ndk",
+    ],
+    test_suites: ["device-tests"],
+    require_root: true,
+}
diff --git a/vibrator/OWNERS b/vibrator/OWNERS
new file mode 100644
index 0000000..899224c
--- /dev/null
+++ b/vibrator/OWNERS
@@ -0,0 +1,4 @@
+chasewu@google.com
+michaelwr@google.com
+taikuo@google.com
+chrispaulo@google.com
diff --git a/vibrator/common/Android.bp b/vibrator/common/Android.bp
new file mode 100644
index 0000000..b2a6d48
--- /dev/null
+++ b/vibrator/common/Android.bp
@@ -0,0 +1,37 @@
+//
+// Copyright (C) 2019 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+package {
+    default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+cc_library {
+    name: "PixelVibratorCommonPrivateLynx",
+    srcs: [
+        "HardwareBase.cpp",
+    ],
+    shared_libs: [
+        "libbase",
+        "libcutils",
+        "liblog",
+        "libutils",
+    ],
+    cflags: [
+        "-DATRACE_TAG=(ATRACE_TAG_VIBRATOR | ATRACE_TAG_HAL)",
+        "-DLOG_TAG=\"android.hardware.vibrator@1.x-common\"",
+    ],
+    export_include_dirs: ["."],
+    vendor_available: true,
+}
diff --git a/vibrator/common/HardwareBase.cpp b/vibrator/common/HardwareBase.cpp
new file mode 100644
index 0000000..8e07e99
--- /dev/null
+++ b/vibrator/common/HardwareBase.cpp
@@ -0,0 +1,136 @@
+/*
+ * Copyright (C) 2019 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "HardwareBase.h"
+
+#include <cutils/properties.h>
+#include <log/log.h>
+
+#include <fstream>
+#include <sstream>
+
+#include "utils.h"
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+
+HwApiBase::HwApiBase() {
+    mPathPrefix = std::getenv("HWAPI_PATH_PREFIX") ?: "";
+    if (mPathPrefix.empty()) {
+        ALOGE("Failed get HWAPI path prefix!");
+    }
+}
+
+void HwApiBase::saveName(const std::string &name, const std::ios *stream) {
+    mNames[stream] = name;
+}
+
+bool HwApiBase::has(const std::ios &stream) {
+    return !!stream;
+}
+
+void HwApiBase::debug(int fd) {
+    dprintf(fd, "Kernel:\n");
+
+    for (auto &entry : utils::pathsFromEnv("HWAPI_DEBUG_PATHS", mPathPrefix)) {
+        auto &path = entry.first;
+        auto &stream = entry.second;
+        std::string line;
+
+        dprintf(fd, "  %s:\n", path.c_str());
+        while (std::getline(stream, line)) {
+            dprintf(fd, "    %s\n", line.c_str());
+        }
+    }
+
+    mRecordsMutex.lock();
+    dprintf(fd, "  Records:\n");
+    for (auto &r : mRecords) {
+        if (r == nullptr) {
+            continue;
+        }
+        dprintf(fd, "    %s\n", r->toString(mNames).c_str());
+    }
+    mRecordsMutex.unlock();
+}
+
+HwCalBase::HwCalBase() {
+    std::ifstream calfile;
+    auto propertyPrefix = std::getenv("PROPERTY_PREFIX");
+
+    if (propertyPrefix != NULL) {
+        mPropertyPrefix = std::string(propertyPrefix);
+    } else {
+        ALOGE("Failed get property prefix!");
+    }
+
+    utils::fileFromEnv("CALIBRATION_FILEPATH", &calfile);
+
+    for (std::string line; std::getline(calfile, line);) {
+        if (line.empty() || line[0] == '#') {
+            continue;
+        }
+        std::istringstream is_line(line);
+        std::string key, value;
+        if (std::getline(is_line, key, ':') && std::getline(is_line, value)) {
+            mCalData[utils::trim(key)] = utils::trim(value);
+        }
+    }
+}
+
+void HwCalBase::debug(int fd) {
+    std::ifstream stream;
+    std::string path;
+    std::string line;
+    struct context {
+        HwCalBase *obj;
+        int fd;
+    } context{this, fd};
+
+    dprintf(fd, "Properties:\n");
+
+    property_list(
+            [](const char *key, const char *value, void *cookie) {
+                struct context *context = static_cast<struct context *>(cookie);
+                HwCalBase *obj = context->obj;
+                int fd = context->fd;
+                const std::string expect{obj->mPropertyPrefix};
+                const std::string actual{key, std::min(strlen(key), expect.size())};
+                if (actual == expect) {
+                    dprintf(fd, "  %s:\n", key);
+                    dprintf(fd, "    %s\n", value);
+                }
+            },
+            &context);
+
+    dprintf(fd, "\n");
+
+    dprintf(fd, "Persist:\n");
+
+    utils::fileFromEnv("CALIBRATION_FILEPATH", &stream, &path);
+
+    dprintf(fd, "  %s:\n", path.c_str());
+    while (std::getline(stream, line)) {
+        dprintf(fd, "    %s\n", line.c_str());
+    }
+}
+
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/common/HardwareBase.h b/vibrator/common/HardwareBase.h
new file mode 100644
index 0000000..5b07040
--- /dev/null
+++ b/vibrator/common/HardwareBase.h
@@ -0,0 +1,221 @@
+/*
+ * Copyright (C) 2019 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#pragma once
+
+#include <list>
+#include <map>
+#include <sstream>
+#include <string>
+
+#include <android-base/unique_fd.h>
+#include <log/log.h>
+#include <sys/epoll.h>
+#include <utils/Trace.h>
+
+#include "utils.h"
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+
+using ::android::base::unique_fd;
+
+class HwApiBase {
+  private:
+    using NamesMap = std::map<const std::ios *, std::string>;
+
+    class RecordInterface {
+      public:
+        virtual std::string toString(const NamesMap &names) = 0;
+        virtual ~RecordInterface() {}
+    };
+    template <typename T>
+    class Record : public RecordInterface {
+      public:
+        Record(const char *func, const T &value, const std::ios *stream)
+            : mFunc(func), mValue(value), mStream(stream) {}
+        std::string toString(const NamesMap &names) override;
+
+      private:
+        const char *mFunc;
+        const T mValue;
+        const std::ios *mStream;
+    };
+    using Records = std::list<std::unique_ptr<RecordInterface>>;
+
+    static constexpr uint32_t RECORDS_SIZE = 32;
+
+  public:
+    HwApiBase();
+    void debug(int fd);
+
+  protected:
+    void saveName(const std::string &name, const std::ios *stream);
+    template <typename T>
+    void open(const std::string &name, T *stream);
+    bool has(const std::ios &stream);
+    template <typename T>
+    bool get(T *value, std::istream *stream);
+    template <typename T>
+    bool set(const T &value, std::ostream *stream);
+    template <typename T>
+    bool poll(const T &value, std::istream *stream, const int32_t timeout = -1);
+    template <typename T>
+    void record(const char *func, const T &value, const std::ios *stream);
+
+  private:
+    std::string mPathPrefix;
+    NamesMap mNames;
+    Records mRecords{RECORDS_SIZE};
+    std::mutex mRecordsMutex;
+    std::mutex mIoMutex;
+};
+
+#define HWAPI_RECORD(args...) HwApiBase::record(__FUNCTION__, ##args)
+
+template <typename T>
+void HwApiBase::open(const std::string &name, T *stream) {
+    saveName(name, stream);
+    utils::openNoCreate(mPathPrefix + name, stream);
+}
+
+template <typename T>
+bool HwApiBase::get(T *value, std::istream *stream) {
+    ATRACE_NAME("HwApi::get");
+    std::scoped_lock ioLock{mIoMutex};
+    bool ret;
+    stream->seekg(0);
+    *stream >> *value;
+    if (!(ret = !!*stream)) {
+        ALOGE("Failed to read %s (%d): %s", mNames[stream].c_str(), errno, strerror(errno));
+    }
+    stream->clear();
+    HWAPI_RECORD(*value, stream);
+    return ret;
+}
+
+template <typename T>
+bool HwApiBase::set(const T &value, std::ostream *stream) {
+    ATRACE_NAME("HwApi::set");
+    using utils::operator<<;
+    std::scoped_lock ioLock{mIoMutex};
+    bool ret;
+    *stream << value << std::endl;
+    if (!(ret = !!*stream)) {
+        ALOGE("Failed to write %s (%d): %s", mNames[stream].c_str(), errno, strerror(errno));
+        stream->clear();
+    }
+    HWAPI_RECORD(value, stream);
+    return ret;
+}
+
+template <typename T>
+bool HwApiBase::poll(const T &value, std::istream *stream, const int32_t timeoutMs) {
+    ATRACE_NAME("HwApi::poll");
+    auto path = mPathPrefix + mNames[stream];
+    unique_fd fileFd{::open(path.c_str(), O_RDONLY)};
+    unique_fd epollFd{epoll_create(1)};
+    epoll_event event = {
+            .events = EPOLLPRI | EPOLLET,
+    };
+    T actual;
+    bool ret;
+    int epollRet;
+
+    if (timeoutMs < -1) {
+        ALOGE("Invalid polling timeout!");
+        return false;
+    }
+
+    if (epoll_ctl(epollFd, EPOLL_CTL_ADD, fileFd, &event)) {
+        ALOGE("Failed to poll %s (%d): %s", mNames[stream].c_str(), errno, strerror(errno));
+        return false;
+    }
+
+    while ((ret = get(&actual, stream)) && (actual != value)) {
+        epollRet = epoll_wait(epollFd, &event, 1, timeoutMs);
+        if (epollRet <= 0) {
+            ALOGE("Polling error or timeout! (%d)", epollRet);
+            return false;
+        }
+    }
+
+    HWAPI_RECORD(value, stream);
+    return ret;
+}
+
+template <typename T>
+void HwApiBase::record(const char *func, const T &value, const std::ios *stream) {
+    std::lock_guard<std::mutex> lock(mRecordsMutex);
+    mRecords.emplace_back(std::make_unique<Record<T>>(func, value, stream));
+    mRecords.pop_front();
+}
+
+template <typename T>
+std::string HwApiBase::Record<T>::toString(const NamesMap &names) {
+    using utils::operator<<;
+    std::stringstream ret;
+
+    ret << mFunc << " '" << names.at(mStream) << "' = '" << mValue << "'";
+
+    return ret.str();
+}
+
+class HwCalBase {
+  public:
+    HwCalBase();
+    void debug(int fd);
+
+  protected:
+    template <typename T>
+    bool getProperty(const char *key, T *value, const T defval);
+    template <typename T>
+    bool getPersist(const char *key, T *value);
+
+  private:
+    std::string mPropertyPrefix;
+    std::map<std::string, std::string> mCalData;
+};
+
+template <typename T>
+bool HwCalBase::getProperty(const char *key, T *outval, const T defval) {
+    ATRACE_NAME("HwCal::getProperty");
+    *outval = utils::getProperty(mPropertyPrefix + key, defval);
+    return true;
+}
+
+template <typename T>
+bool HwCalBase::getPersist(const char *key, T *value) {
+    ATRACE_NAME("HwCal::getPersist");
+    auto it = mCalData.find(key);
+    if (it == mCalData.end()) {
+        ALOGE("Missing %s config!", key);
+        return false;
+    }
+    std::stringstream stream{it->second};
+    utils::unpack(stream, value);
+    if (!stream || !stream.eof()) {
+        ALOGE("Invalid %s config!", key);
+        return false;
+    }
+    return true;
+}
+
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/common/utils.h b/vibrator/common/utils.h
new file mode 100644
index 0000000..188554d
--- /dev/null
+++ b/vibrator/common/utils.h
@@ -0,0 +1,173 @@
+/*
+ * Copyright (C) 2019 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#pragma once
+
+#include <android-base/macros.h>
+#include <android-base/parsedouble.h>
+#include <android-base/properties.h>
+#include <log/log.h>
+
+#include <fstream>
+#include <map>
+#include <sstream>
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+namespace utils {
+
+template <typename T>
+class Is_Iterable {
+  private:
+    template <typename U>
+    static std::true_type test(typename U::iterator *u);
+
+    template <typename U>
+    static std::false_type test(U *u);
+
+  public:
+    static const bool value = decltype(test<T>(0))::value;
+};
+
+template <typename T, bool B>
+using Enable_If_Iterable = std::enable_if_t<Is_Iterable<T>::value == B>;
+
+template <typename T, typename U = void>
+using Enable_If_Signed = std::enable_if_t<std::is_signed_v<T>, U>;
+
+template <typename T, typename U = void>
+using Enable_If_Unsigned = std::enable_if_t<std::is_unsigned_v<T>, U>;
+
+// override for default behavior of printing as a character
+inline std::ostream &operator<<(std::ostream &stream, const int8_t value) {
+    return stream << +value;
+}
+// override for default behavior of printing as a character
+inline std::ostream &operator<<(std::ostream &stream, const uint8_t value) {
+    return stream << +value;
+}
+
+template <typename T>
+inline auto toUnderlying(const T value) {
+    return static_cast<std::underlying_type_t<T>>(value);
+}
+
+template <typename T>
+inline Enable_If_Iterable<T, true> unpack(std::istream &stream, T *value) {
+    for (auto &entry : *value) {
+        stream >> entry;
+    }
+}
+
+template <typename T>
+inline Enable_If_Iterable<T, false> unpack(std::istream &stream, T *value) {
+    stream >> *value;
+}
+
+template <>
+inline void unpack<std::string>(std::istream &stream, std::string *value) {
+    *value = std::string(std::istreambuf_iterator(stream), {});
+    stream.setstate(std::istream::eofbit);
+}
+
+template <typename T>
+inline Enable_If_Signed<T, T> getProperty(const std::string &key, const T def) {
+    if (std::is_floating_point_v<T>) {
+        float result;
+        std::string value = ::android::base::GetProperty(key, "");
+        if (!value.empty() && ::android::base::ParseFloat(value, &result)) {
+            return result;
+        }
+        return def;
+    } else {
+        return ::android::base::GetIntProperty(key, def);
+    }
+}
+
+template <typename T>
+inline Enable_If_Unsigned<T, T> getProperty(const std::string &key, const T def) {
+    return ::android::base::GetUintProperty(key, def);
+}
+
+template <>
+inline bool getProperty<bool>(const std::string &key, const bool def) {
+    return ::android::base::GetBoolProperty(key, def);
+}
+
+template <typename T>
+static void openNoCreate(const std::string &file, T *outStream) {
+    auto mode = std::is_base_of_v<std::ostream, T> ? std::ios_base::out : std::ios_base::in;
+
+    // Force 'in' mode to prevent file creation
+    outStream->open(file, mode | std::ios_base::in);
+    if (!*outStream) {
+        ALOGE("Failed to open %s (%d): %s", file.c_str(), errno, strerror(errno));
+    }
+}
+
+template <typename T>
+static void fileFromEnv(const char *env, T *outStream, std::string *outName = nullptr) {
+    auto file = std::getenv(env);
+
+    if (file == nullptr) {
+        ALOGE("Failed get env %s", env);
+        return;
+    }
+
+    if (outName != nullptr) {
+        *outName = std::string(file);
+    }
+
+    openNoCreate(file, outStream);
+}
+
+static ATTRIBUTE_UNUSED auto pathsFromEnv(const char *env, const std::string &prefix = "") {
+    std::map<std::string, std::ifstream> ret;
+    auto value = std::getenv(env);
+
+    if (value == nullptr) {
+        return ret;
+    }
+
+    std::istringstream paths{value};
+    std::string path;
+
+    while (paths >> path) {
+        ret[path].open(prefix + path);
+    }
+
+    return ret;
+}
+
+static ATTRIBUTE_UNUSED std::string trim(const std::string &str,
+                                         const std::string &whitespace = " \t") {
+    const auto str_begin = str.find_first_not_of(whitespace);
+    if (str_begin == std::string::npos) {
+        return "";
+    }
+
+    const auto str_end = str.find_last_not_of(whitespace);
+    const auto str_range = str_end - str_begin + 1;
+
+    return str.substr(str_begin, str_range);
+}
+
+}  // namespace utils
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/cs40l26/Android.bp b/vibrator/cs40l26/Android.bp
new file mode 100644
index 0000000..f60189d
--- /dev/null
+++ b/vibrator/cs40l26/Android.bp
@@ -0,0 +1,107 @@
+//
+// Copyright (C) 2022 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+package {
+    default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+cc_defaults {
+    name: "android.hardware.vibrator-defaults.cs40l26-private-lynx",
+    cflags: [
+        "-DATRACE_TAG=(ATRACE_TAG_VIBRATOR | ATRACE_TAG_HAL)",
+        "-DLOG_TAG=\"android.hardware.vibrator-cs40l26\"",
+    ],
+    shared_libs: [
+        "libbinder",
+    ],
+}
+
+cc_defaults {
+    name: "VibratorHalCs40l26BinaryDefaultsPrivateLynx",
+    defaults: [
+        "PixelVibratorBinaryDefaultsPrivateLynx",
+        "android.hardware.vibrator-defaults.cs40l26-private-lynx",
+    ],
+    include_dirs: [
+        "external/tinyalsa/include",
+    ],
+    shared_libs: [
+        "libcutils",
+        "libtinyalsa",
+    ],
+}
+
+cc_defaults {
+    name: "VibratorHalCs40l26TestDefaultsPrivateLynx",
+    defaults: [
+        "PixelVibratorTestDefaultsPrivateLynx",
+        "android.hardware.vibrator-defaults.cs40l26-private-lynx",
+    ],
+    static_libs: [
+        "libtinyalsa",
+    ],
+    shared_libs: ["android.hardware.vibrator-impl.cs40l26-private-lynx"],
+}
+
+cc_library_shared {
+    name: "libvibecapo_proto_lynx",
+    vendor_available: true,
+    owner: "google",
+    srcs: [
+        "proto/capo.proto",
+    ],
+    shared_libs: [
+        "libprotobuf-cpp-full",
+    ],
+    export_include_dirs: [
+        "inc",
+    ],
+    proto: {
+        type: "lite",
+        export_proto_headers: true,
+    },
+}
+
+cc_library_shared {
+    name: "android.hardware.vibrator-impl.cs40l26-private-lynx",
+    defaults: ["VibratorHalCs40l26BinaryDefaultsPrivateLynx"],
+    srcs: [
+        "Vibrator.cpp",
+	"CapoDetector.cpp",
+    ],
+    static_libs: [
+        "chre_client",
+    ],
+    shared_libs: [
+        "libvibecapo_proto_lynx",
+	"libprotobuf-cpp-full",
+    ],
+    export_include_dirs: [
+        ".",
+        "inc",
+    ],
+    vendor_available: true,
+    visibility: [":__subpackages__"],
+}
+
+cc_binary {
+    name: "android.hardware.vibrator-service.cs40l26-private-lynx",
+    defaults: ["VibratorHalCs40l26BinaryDefaultsPrivateLynx"],
+    init_rc: ["android.hardware.vibrator-service.cs40l26-private-lynx.rc"],
+    vintf_fragments: ["android.hardware.vibrator-service.cs40l26-private-lynx.xml"],
+    srcs: ["service.cpp"],
+    shared_libs: ["android.hardware.vibrator-impl.cs40l26-private-lynx"],
+    proprietary: true,
+}
diff --git a/vibrator/cs40l26/CapoDetector.cpp b/vibrator/cs40l26/CapoDetector.cpp
new file mode 100644
index 0000000..0fc4d4b
--- /dev/null
+++ b/vibrator/cs40l26/CapoDetector.cpp
@@ -0,0 +1,215 @@
+/*
+ * Copyright 2022 Google LLC. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "CapoDetector.h"
+#include <google/protobuf/message.h>
+#include <google/protobuf/io/coded_stream.h>
+#include <google/protobuf/io/zero_copy_stream_impl.h>
+
+#include <log/log.h>
+
+#ifdef LOG_TAG
+#undef LOG_TAG
+#define LOG_TAG "CapoDetector"
+#endif
+
+namespace android {
+namespace chre {
+
+namespace {  // anonymous namespace for file-local definitions
+
+/**
+ * Called when onConnected() to send NanoappList request.
+ */
+void requestNanoappList(SocketClient &client) {
+    flatbuffers::FlatBufferBuilder builder;
+    HostProtocolHost::encodeNanoappListRequest(builder);
+    if (!client.sendMessage(builder.GetBufferPointer(), builder.GetSize())) {
+        ALOGE("Failed to send NanoappList request");
+    }
+}
+
+}  // namespace
+
+/**
+ * Called when initializing connection with CHRE socket.
+ */
+sp<CapoDetector> CapoDetector::start() {
+    sp<CapoDetector> listener = new CapoDetector();
+    if (!listener->connectInBackground(kChreSocketName, listener)) {
+        ALOGE("Couldn't connect to CHRE socket");
+        return nullptr;
+    }
+    ALOGI("%s connect to CHRE socket.", __func__);
+
+    return listener;
+}
+
+/**
+ * Called when the socket is successfully (re-)connected.
+ * Reset the position and try to send NanoappList request.
+ */
+void CapoDetector::onConnected() {
+    flatbuffers::FlatBufferBuilder builder;
+
+    // Reset the last position type.
+    last_position_type_ = capo::PositionType::UNKNOWN;
+    requestNanoappList(*this);
+}
+
+/**
+ * Called when we have failed to (re-)connect the socket after many attempts
+ * and are giving up.
+ */
+void CapoDetector::onConnectionAborted() {
+    ALOGE("%s, Capo Aborting Connection!", __func__);
+}
+
+/**
+ * Invoked when the socket is disconnected, and this connection loss was not
+ * the result of an explicit call to disconnect().
+ * Reset the position while disconnecting.
+ */
+
+void CapoDetector::onDisconnected() {
+    last_position_type_ = capo::PositionType::UNKNOWN;
+}
+
+/**
+ * Decode unix socket msgs to CHRE messages, and call the appropriate
+ * callback depending on the CHRE message.
+ */
+void CapoDetector::onMessageReceived(const void *data, size_t length) {
+    if (!HostProtocolHost::decodeMessageFromChre(data, length, *this)) {
+        ALOGE("Failed to decode message");
+    }
+}
+
+/**
+ * Listen for messages from capo nanoapp and handle the message.
+ */
+void CapoDetector::handleNanoappMessage(const fbs::NanoappMessageT &message) {
+    ALOGI("%s, Id %" PRIu64 ", type %d, size %d", __func__, message.app_id, message.message_type,
+          static_cast<int>(message.message.size()));
+    // Exclude the message with unmatched nanoapp id.
+    if (message.app_id != kCapoNanoappId)
+        return;
+
+    // Handle the message with message_type.
+    switch (message.message_type) {
+        case capo::MessageType::ACK_NOTIFICATION: {
+            capo::AckNotification gd;
+            gd.set_notification_type(static_cast<capo::NotificationType>(message.message[1]));
+            ALOGD("%s, get notification event from capo nanoapp, type %d", __func__,
+                  gd.notification_type());
+            break;
+        }
+        case capo::MessageType::POSITION_DETECTED: {
+            capo::PositionDetected gd;
+            gd.set_position_type(static_cast<capo::PositionType>(message.message[1]));
+            ALOGD("%s, get position event from capo nanoapp, type %d", __func__,
+                  gd.position_type());
+
+            // Callback to function while getting carried position event.
+            if (callback_func_ != nullptr) {
+                last_position_type_ = gd.position_type();
+                ALOGD("%s, sent position type %d to callback function", __func__,
+                      last_position_type_);
+                callback_func_(last_position_type_);
+            }
+            break;
+        }
+        default:
+            ALOGE("%s, get invalid message, type: %" PRIu32 ", from capo nanoapp.", __func__,
+                  message.message_type);
+            break;
+    }
+}
+
+/**
+ * Handle the response of a NanoappList request.
+ * Ensure that capo nanoapp is running.
+ */
+void CapoDetector::handleNanoappListResponse(const fbs::NanoappListResponseT &response) {
+    for (const std::unique_ptr<fbs::NanoappListEntryT> &nanoapp : response.nanoapps) {
+        if (nanoapp->app_id == kCapoNanoappId) {
+            if (nanoapp->enabled)
+                enable();
+            else
+                ALOGE("Capo nanoapp not enabled");
+            return;
+        }
+    }
+    ALOGE("Capo nanoapp not found");
+}
+
+/**
+ * Send enabling message to the nanoapp.
+ */
+void CapoDetector::enable() {
+    // Create CHRE message with serialized message
+    flatbuffers::FlatBufferBuilder builder, config_builder, force_builder;
+
+    auto config_data = std::make_unique<capo::ConfigureDetector_ConfigData>();
+    auto msg = std::make_unique<capo::ConfigureDetector>();
+
+    config_data->set_still_time_threshold_nanosecond(mCapoDetectorMDParameters.still_time_threshold_ns);
+    config_data->set_window_width_nanosecond(mCapoDetectorMDParameters.window_width_ns);
+    config_data->set_motion_confidence_threshold(mCapoDetectorMDParameters.motion_confidence_threshold);
+    config_data->set_still_confidence_threshold(mCapoDetectorMDParameters.still_confidence_threshold);
+    config_data->set_var_threshold(mCapoDetectorMDParameters.var_threshold);
+    config_data->set_var_threshold_delta(mCapoDetectorMDParameters.var_threshold_delta);
+
+    msg->set_allocated_config_data(config_data.release());
+
+    auto pb_size = msg->ByteSizeLong();
+    auto pb_data = std::make_unique<uint8_t[]>(pb_size);
+
+    if (!msg->SerializeToArray(pb_data.get(), pb_size)) {
+        ALOGE("Failed to serialize message.");
+    }
+
+    ALOGI("Configuring CapoDetector");
+    // Configure the detector from host-side
+    android::chre::HostProtocolHost::encodeNanoappMessage(
+            config_builder, getNanoppAppId(), capo::MessageType::CONFIGURE_DETECTOR, getHostEndPoint(),
+            pb_data.get(), pb_size);
+    ALOGI("Sending capo config message to Nanoapp, %" PRIu32 " bytes", config_builder.GetSize());
+    if (!sendMessage(config_builder.GetBufferPointer(), config_builder.GetSize())) {
+        ALOGE("Failed to send config event for capo nanoapp");
+    }
+
+    ALOGI("Enabling CapoDetector");
+    android::chre::HostProtocolHost::encodeNanoappMessage(
+            builder, getNanoppAppId(), capo::MessageType::ENABLE_DETECTOR, getHostEndPoint(),
+            /*messageData*/ nullptr, /*messageDataLenbuffer*/ 0);
+    ALOGI("Sending enable message to Nanoapp, %" PRIu32 " bytes", builder.GetSize());
+    if (!sendMessage(builder.GetBufferPointer(), builder.GetSize())) {
+        ALOGE("Failed to send enable event for capo nanoapp");
+    }
+
+    ALOGI("Forcing CapoDetector to update state");
+    // Force an updated state upon connection
+    android::chre::HostProtocolHost::encodeNanoappMessage(
+            force_builder, getNanoppAppId(), capo::MessageType::FORCE_UPDATE, getHostEndPoint(),
+            /*messageData*/ nullptr, /*messageDataLenbuffer*/ 0);
+    ALOGI("Sending force-update message to Nanoapp, %" PRIu32 " bytes", force_builder.GetSize());
+    if (!sendMessage(force_builder.GetBufferPointer(), force_builder.GetSize())) {
+        ALOGE("Failed to send force-update event for capo nanoapp");
+    }
+}
+
+}  // namespace chre
+}  // namespace android
diff --git a/vibrator/cs40l26/Hardware.h b/vibrator/cs40l26/Hardware.h
new file mode 100644
index 0000000..be97594
--- /dev/null
+++ b/vibrator/cs40l26/Hardware.h
@@ -0,0 +1,362 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#pragma once
+
+#include <algorithm>
+
+#include "HardwareBase.h"
+#include "Vibrator.h"
+
+#define PROC_SND_PCM "/proc/asound/pcm"
+#define HAPTIC_PCM_DEVICE_SYMBOL "haptic nohost playback"
+
+static struct pcm_config haptic_nohost_config = {
+        .channels = 1,
+        .rate = 48000,
+        .period_size = 80,
+        .period_count = 2,
+        .format = PCM_FORMAT_S16_LE,
+};
+
+enum WaveformIndex : uint16_t {
+    /* Physical waveform */
+    WAVEFORM_LONG_VIBRATION_EFFECT_INDEX = 0,
+    WAVEFORM_RESERVED_INDEX_1 = 1,
+    WAVEFORM_CLICK_INDEX = 2,
+    WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX = 3,
+    WAVEFORM_THUD_INDEX = 4,
+    WAVEFORM_SPIN_INDEX = 5,
+    WAVEFORM_QUICK_RISE_INDEX = 6,
+    WAVEFORM_SLOW_RISE_INDEX = 7,
+    WAVEFORM_QUICK_FALL_INDEX = 8,
+    WAVEFORM_LIGHT_TICK_INDEX = 9,
+    WAVEFORM_LOW_TICK_INDEX = 10,
+    WAVEFORM_RESERVED_MFG_1,
+    WAVEFORM_RESERVED_MFG_2,
+    WAVEFORM_RESERVED_MFG_3,
+    WAVEFORM_MAX_PHYSICAL_INDEX,
+    /* OWT waveform */
+    WAVEFORM_COMPOSE = WAVEFORM_MAX_PHYSICAL_INDEX,
+    WAVEFORM_PWLE,
+    /*
+     * Refer to <linux/input.h>, the WAVEFORM_MAX_INDEX must not exceed 96.
+     * #define FF_GAIN          0x60  // 96 in decimal
+     * #define FF_MAX_EFFECTS   FF_GAIN
+     */
+    WAVEFORM_MAX_INDEX,
+};
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+
+class HwApi : public Vibrator::HwApi, private HwApiBase {
+  public:
+    HwApi() {
+        open("calibration/f0_stored", &mF0);
+        open("default/f0_offset", &mF0Offset);
+        open("calibration/redc_stored", &mRedc);
+        open("calibration/q_stored", &mQ);
+        open("default/vibe_state", &mVibeState);
+        open("default/num_waves", &mEffectCount);
+        open("default/owt_free_space", &mOwtFreeSpace);
+        open("default/f0_comp_enable", &mF0CompEnable);
+        open("default/redc_comp_enable", &mRedcCompEnable);
+        open("default/delay_before_stop_playback_us", &mMinOnOffInterval);
+    }
+
+    bool setF0(std::string value) override { return set(value, &mF0); }
+    bool setF0Offset(uint32_t value) override { return set(value, &mF0Offset); }
+    bool setRedc(std::string value) override { return set(value, &mRedc); }
+    bool setQ(std::string value) override { return set(value, &mQ); }
+    bool getEffectCount(uint32_t *value) override { return get(value, &mEffectCount); }
+    bool pollVibeState(uint32_t value, int32_t timeoutMs) override {
+        return poll(value, &mVibeState, timeoutMs);
+    }
+    bool hasOwtFreeSpace() override { return has(mOwtFreeSpace); }
+    bool getOwtFreeSpace(uint32_t *value) override { return get(value, &mOwtFreeSpace); }
+    bool setF0CompEnable(bool value) override { return set(value, &mF0CompEnable); }
+    bool setRedcCompEnable(bool value) override { return set(value, &mRedcCompEnable); }
+    bool setMinOnOffInterval(uint32_t value) override { return set(value, &mMinOnOffInterval); }
+    uint32_t getContextScale() override {
+        return utils::getProperty("persist.vendor.vibrator.hal.context.scale", 100);
+    }
+    bool getContextEnable() override {
+        return utils::getProperty("persist.vendor.vibrator.hal.context.enable", false);
+    }
+    uint32_t getContextSettlingTime() override {
+        return utils::getProperty("persist.vendor.vibrator.hal.context.settlingtime", 3000);
+    }
+    uint32_t getContextCooldownTime() override {
+        return utils::getProperty("persist.vendor.vibrator.hal.context.cooldowntime", 1000);
+    }
+    bool getContextFadeEnable() override {
+        return utils::getProperty("persist.vendor.vibrator.hal.context.fade", false);
+    }
+
+    // TODO(b/234338136): Need to add the force feedback HW API test cases
+    bool setFFGain(int fd, uint16_t value) override {
+        struct input_event gain = {
+                .type = EV_FF,
+                .code = FF_GAIN,
+                .value = value,
+        };
+        if (write(fd, (const void *)&gain, sizeof(gain)) != sizeof(gain)) {
+            return false;
+        }
+        return true;
+    }
+    bool setFFEffect(int fd, struct ff_effect *effect, uint16_t timeoutMs) override {
+        if (((*effect).replay.length != timeoutMs) || (ioctl(fd, EVIOCSFF, effect) < 0)) {
+            ALOGE("setFFEffect fail");
+            return false;
+        } else {
+            return true;
+        }
+    }
+    bool setFFPlay(int fd, int8_t index, bool value) override {
+        struct input_event play = {
+                .type = EV_FF,
+                .code = static_cast<uint16_t>(index),
+                .value = value,
+        };
+        if (write(fd, (const void *)&play, sizeof(play)) != sizeof(play)) {
+            return false;
+        } else {
+            return true;
+        }
+    }
+    bool getHapticAlsaDevice(int *card, int *device) override {
+        std::string line;
+        std::ifstream myfile(PROC_SND_PCM);
+        if (myfile.is_open()) {
+            while (getline(myfile, line)) {
+                if (line.find(HAPTIC_PCM_DEVICE_SYMBOL) != std::string::npos) {
+                    std::stringstream ss(line);
+                    std::string currentToken;
+                    std::getline(ss, currentToken, ':');
+                    sscanf(currentToken.c_str(), "%d-%d", card, device);
+                    return true;
+                }
+            }
+            myfile.close();
+        } else {
+            ALOGE("Failed to read file: %s", PROC_SND_PCM);
+        }
+        return false;
+    }
+    bool setHapticPcmAmp(struct pcm **haptic_pcm, bool enable, int card, int device) override {
+        int ret = 0;
+
+        if (enable) {
+            *haptic_pcm = pcm_open(card, device, PCM_OUT, &haptic_nohost_config);
+            if (!pcm_is_ready(*haptic_pcm)) {
+                ALOGE("cannot open pcm_out driver: %s", pcm_get_error(*haptic_pcm));
+                goto fail;
+            }
+
+            ret = pcm_prepare(*haptic_pcm);
+            if (ret < 0) {
+                ALOGE("cannot prepare haptic_pcm: %s", pcm_get_error(*haptic_pcm));
+                goto fail;
+            }
+
+            ret = pcm_start(*haptic_pcm);
+            if (ret < 0) {
+                ALOGE("cannot start haptic_pcm: %s", pcm_get_error(*haptic_pcm));
+                goto fail;
+            }
+
+            return true;
+        } else {
+            if (*haptic_pcm) {
+                pcm_close(*haptic_pcm);
+                *haptic_pcm = NULL;
+            }
+            return true;
+        }
+
+    fail:
+        pcm_close(*haptic_pcm);
+        *haptic_pcm = NULL;
+        return false;
+    }
+    bool uploadOwtEffect(int fd, uint8_t *owtData, uint32_t numBytes, struct ff_effect *effect,
+                         uint32_t *outEffectIndex, int *status) override {
+        (*effect).u.periodic.custom_len = numBytes / sizeof(uint16_t);
+        delete[] ((*effect).u.periodic.custom_data);
+        (*effect).u.periodic.custom_data = new int16_t[(*effect).u.periodic.custom_len]{0x0000};
+        if ((*effect).u.periodic.custom_data == nullptr) {
+            ALOGE("Failed to allocate memory for custom data\n");
+            *status = EX_NULL_POINTER;
+            return false;
+        }
+        memcpy((*effect).u.periodic.custom_data, owtData, numBytes);
+
+        if ((*effect).id != -1) {
+            ALOGE("(*effect).id != -1");
+        }
+
+        /* Create a new OWT waveform to update the PWLE or composite effect. */
+        (*effect).id = -1;
+        if (ioctl(fd, EVIOCSFF, effect) < 0) {
+            ALOGE("Failed to upload effect %d (%d): %s", *outEffectIndex, errno, strerror(errno));
+            delete[] ((*effect).u.periodic.custom_data);
+            *status = EX_ILLEGAL_STATE;
+            return false;
+        }
+
+        if ((*effect).id >= FF_MAX_EFFECTS || (*effect).id < 0) {
+            ALOGE("Invalid waveform index after upload OWT effect: %d", (*effect).id);
+            *status = EX_ILLEGAL_ARGUMENT;
+            return false;
+        }
+        *outEffectIndex = (*effect).id;
+        *status = 0;
+        return true;
+    }
+    bool eraseOwtEffect(int fd, int8_t effectIndex, std::vector<ff_effect> *effect) override {
+        uint32_t effectCountBefore, effectCountAfter, i, successFlush = 0;
+
+        if (effectIndex < WAVEFORM_MAX_PHYSICAL_INDEX) {
+            ALOGE("Invalid waveform index for OWT erase: %d", effectIndex);
+            return false;
+        }
+
+        if (effectIndex < WAVEFORM_MAX_INDEX) {
+            /* Normal situation. Only erase the effect which we just played. */
+            if (ioctl(fd, EVIOCRMFF, effectIndex) < 0) {
+                ALOGE("Failed to erase effect %d (%d): %s", effectIndex, errno, strerror(errno));
+            }
+            for (i = WAVEFORM_MAX_PHYSICAL_INDEX; i < WAVEFORM_MAX_INDEX; i++) {
+                if ((*effect)[i].id == effectIndex) {
+                    (*effect)[i].id = -1;
+                    break;
+                }
+            }
+        } else {
+            /* Flush all non-prestored effects of ff-core and driver. */
+            getEffectCount(&effectCountBefore);
+            for (i = WAVEFORM_MAX_PHYSICAL_INDEX; i < FF_MAX_EFFECTS; i++) {
+                if (ioctl(fd, EVIOCRMFF, i) >= 0) {
+                    successFlush++;
+                }
+            }
+            getEffectCount(&effectCountAfter);
+            ALOGW("Flushed effects: ff: %d; driver: %d -> %d; success: %d", effectIndex,
+                  effectCountBefore, effectCountAfter, successFlush);
+            /* Reset all OWT effect index of HAL. */
+            for (i = WAVEFORM_MAX_PHYSICAL_INDEX; i < WAVEFORM_MAX_INDEX; i++) {
+                (*effect)[i].id = -1;
+            }
+        }
+        return true;
+    }
+
+    void debug(int fd) override { HwApiBase::debug(fd); }
+
+  private:
+    std::ofstream mF0;
+    std::ofstream mF0Offset;
+    std::ofstream mRedc;
+    std::ofstream mQ;
+    std::ifstream mEffectCount;
+    std::ifstream mVibeState;
+    std::ifstream mOwtFreeSpace;
+    std::ofstream mF0CompEnable;
+    std::ofstream mRedcCompEnable;
+    std::ofstream mMinOnOffInterval;
+};
+
+class HwCal : public Vibrator::HwCal, private HwCalBase {
+  private:
+    static constexpr char VERSION[] = "version";
+    static constexpr char F0_CONFIG[] = "f0_measured";
+    static constexpr char REDC_CONFIG[] = "redc_measured";
+    static constexpr char Q_CONFIG[] = "q_measured";
+    static constexpr char TICK_VOLTAGES_CONFIG[] = "v_tick";
+    static constexpr char CLICK_VOLTAGES_CONFIG[] = "v_click";
+    static constexpr char LONG_VOLTAGES_CONFIG[] = "v_long";
+
+    static constexpr uint32_t VERSION_DEFAULT = 2;
+    static constexpr int32_t DEFAULT_FREQUENCY_SHIFT = 0;
+    static constexpr std::array<uint32_t, 2> V_TICK_DEFAULT = {1, 100};
+    static constexpr std::array<uint32_t, 2> V_CLICK_DEFAULT = {1, 100};
+    static constexpr std::array<uint32_t, 2> V_LONG_DEFAULT = {1, 100};
+
+  public:
+    HwCal() {}
+
+    bool getVersion(uint32_t *value) override {
+        if (getPersist(VERSION, value)) {
+            return true;
+        }
+        *value = VERSION_DEFAULT;
+        return true;
+    }
+    bool getLongFrequencyShift(int32_t *value) override {
+        return getProperty("long.frequency.shift", value, DEFAULT_FREQUENCY_SHIFT);
+    }
+    bool getF0(std::string *value) override { return getPersist(F0_CONFIG, value); }
+    bool getRedc(std::string *value) override { return getPersist(REDC_CONFIG, value); }
+    bool getQ(std::string *value) override { return getPersist(Q_CONFIG, value); }
+    bool getTickVolLevels(std::array<uint32_t, 2> *value) override {
+        if (getPersist(TICK_VOLTAGES_CONFIG, value)) {
+            return true;
+        }
+        *value = V_TICK_DEFAULT;
+        return true;
+    }
+    bool getClickVolLevels(std::array<uint32_t, 2> *value) override {
+        if (getPersist(CLICK_VOLTAGES_CONFIG, value)) {
+            return true;
+        }
+        *value = V_CLICK_DEFAULT;
+        return true;
+    }
+    bool getLongVolLevels(std::array<uint32_t, 2> *value) override {
+        if (getPersist(LONG_VOLTAGES_CONFIG, value)) {
+            return true;
+        }
+        *value = V_LONG_DEFAULT;
+        return true;
+    }
+    bool isChirpEnabled() override {
+        bool value;
+        getProperty("chirp.enabled", &value, false);
+        return value;
+    }
+    bool getSupportedPrimitives(uint32_t *value) override {
+        return getProperty("supported_primitives", value, (uint32_t)0);
+    }
+    bool isF0CompEnabled() override {
+        bool value;
+        getProperty("f0.comp.enabled", &value, true);
+        return value;
+    }
+    bool isRedcCompEnabled() override {
+        bool value;
+        getProperty("redc.comp.enabled", &value, true);
+        return value;
+    }
+    void debug(int fd) override { HwCalBase::debug(fd); }
+};
+
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/cs40l26/TEST_MAPPING b/vibrator/cs40l26/TEST_MAPPING
new file mode 100644
index 0000000..1d8ff7a
--- /dev/null
+++ b/vibrator/cs40l26/TEST_MAPPING
@@ -0,0 +1,10 @@
+{
+  "presubmit": [
+    {
+      "name": "VibratorHalCs40l26TestSuite",
+      "keywords": [
+        "nextgen"
+      ]
+    }
+  ]
+}
diff --git a/vibrator/cs40l26/Vibrator.cpp b/vibrator/cs40l26/Vibrator.cpp
new file mode 100644
index 0000000..21a1682
--- /dev/null
+++ b/vibrator/cs40l26/Vibrator.cpp
@@ -0,0 +1,1441 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Vibrator.h"
+
+#include <glob.h>
+#include <hardware/hardware.h>
+#include <hardware/vibrator.h>
+#include <log/log.h>
+#include <stdio.h>
+#include <utils/Trace.h>
+
+#include <cinttypes>
+#include <cmath>
+#include <fstream>
+#include <iostream>
+#include <sstream>
+#include <ctime>
+#include <chrono>
+
+#include "CapoDetector.h"
+
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(x) (sizeof((x)) / sizeof((x)[0]))
+#endif
+
+#ifdef LOG_TAG
+#undef LOG_TAG
+#define LOG_TAG "Vibrator"
+#endif
+
+using CapoDetector = android::chre::CapoDetector;
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+static constexpr uint8_t FF_CUSTOM_DATA_LEN = 2;
+static constexpr uint16_t FF_CUSTOM_DATA_LEN_MAX_COMP = 2044;  // (COMPOSE_SIZE_MAX + 1) * 8 + 4
+static constexpr uint16_t FF_CUSTOM_DATA_LEN_MAX_PWLE = 2302;
+
+static constexpr uint32_t WAVEFORM_DOUBLE_CLICK_SILENCE_MS = 100;
+
+static constexpr uint32_t WAVEFORM_LONG_VIBRATION_THRESHOLD_MS = 50;
+
+static constexpr uint8_t VOLTAGE_SCALE_MAX = 100;
+
+static constexpr int8_t MAX_COLD_START_LATENCY_MS = 6;  // I2C Transaction + DSP Return-From-Standby
+static constexpr uint32_t MIN_ON_OFF_INTERVAL_US = 8500;  // SVC initialization time
+static constexpr int8_t MAX_PAUSE_TIMING_ERROR_MS = 1;  // ALERT Irq Handling
+static constexpr uint32_t MAX_TIME_MS = UINT16_MAX;
+
+static constexpr auto ASYNC_COMPLETION_TIMEOUT = std::chrono::milliseconds(100);
+static constexpr auto POLLING_TIMEOUT = 20;
+static constexpr int32_t COMPOSE_DELAY_MAX_MS = 10000;
+
+/* nsections is 8 bits. Need to preserve 1 section for the first delay before the first effect. */
+static constexpr int32_t COMPOSE_SIZE_MAX = 254;
+static constexpr int32_t COMPOSE_PWLE_SIZE_MAX_DEFAULT = 127;
+
+// Measured resonant frequency, f0_measured, is represented by Q10.14 fixed
+// point format on cs40l26 devices. The expression to calculate f0 is:
+//   f0 = f0_measured / 2^Q14_BIT_SHIFT
+// See the LRA Calibration Support documentation for more details.
+static constexpr int32_t Q14_BIT_SHIFT = 14;
+
+// Measured Q factor, q_measured, is represented by Q8.16 fixed
+// point format on cs40l26 devices. The expression to calculate q is:
+//   q = q_measured / 2^Q16_BIT_SHIFT
+// See the LRA Calibration Support documentation for more details.
+static constexpr int32_t Q16_BIT_SHIFT = 16;
+
+static constexpr int32_t COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS = 16383;
+
+static constexpr uint32_t WT_LEN_CALCD = 0x00800000;
+static constexpr uint8_t PWLE_CHIRP_BIT = 0x8;  // Dynamic/static frequency and voltage
+static constexpr uint8_t PWLE_BRAKE_BIT = 0x4;
+static constexpr uint8_t PWLE_AMP_REG_BIT = 0x2;
+
+static constexpr float PWLE_LEVEL_MIN = 0.0;
+static constexpr float PWLE_LEVEL_MAX = 1.0;
+static constexpr float CS40L26_PWLE_LEVEL_MIX = -1.0;
+static constexpr float CS40L26_PWLE_LEVEL_MAX = 0.9995118;
+static constexpr float PWLE_FREQUENCY_RESOLUTION_HZ = 1.00;
+static constexpr float PWLE_FREQUENCY_MIN_HZ = 1.00;
+static constexpr float PWLE_FREQUENCY_MAX_HZ = 1000.00;
+static constexpr float PWLE_BW_MAP_SIZE =
+        1 + ((PWLE_FREQUENCY_MAX_HZ - PWLE_FREQUENCY_MIN_HZ) / PWLE_FREQUENCY_RESOLUTION_HZ);
+
+#ifndef DISABLE_ADAPTIVE_HAPTICS_FEATURE
+static constexpr bool mAdaptiveHapticsEnable = true;
+#else
+static constexpr bool mAdaptiveHapticsEnable = false;
+#endif /* DISABLE_ADAPTIVE_HAPTICS_FEATURE */
+
+static sp<CapoDetector> vibeContextListener;
+uint8_t mCapoDeviceState = 0;
+uint32_t mLastFaceUpEvent = 0;
+uint32_t mLastEffectPlayedTime = 0;
+float mLastPlayedScale = 0;
+
+static uint32_t getCurrentTimeInMs(void) {
+    return std::chrono::duration_cast<std::chrono::milliseconds>(std::chrono::system_clock::now().time_since_epoch()).count();
+}
+
+static void capoEventCallback(uint8_t eventId) {
+    ALOGD("Vibrator %s, From: 0x%x To: 0x%x", __func__, mCapoDeviceState, (uint32_t)eventId);
+    // Record the last moment we were in FACE_UP state
+    if (mCapoDeviceState == capo::PositionType::ON_TABLE_FACE_UP ||
+        eventId == capo::PositionType::ON_TABLE_FACE_UP) {
+        mLastFaceUpEvent = getCurrentTimeInMs();
+    }
+    mCapoDeviceState = eventId;
+}
+
+static uint8_t getDeviceState(void) {
+    return mCapoDeviceState;
+}
+
+enum WaveformBankID : uint8_t {
+    RAM_WVFRM_BANK,
+    ROM_WVFRM_BANK,
+    OWT_WVFRM_BANK,
+};
+
+enum WaveformIndex : uint16_t {
+    /* Physical waveform */
+    WAVEFORM_LONG_VIBRATION_EFFECT_INDEX = 0,
+    WAVEFORM_RESERVED_INDEX_1 = 1,
+    WAVEFORM_CLICK_INDEX = 2,
+    WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX = 3,
+    WAVEFORM_THUD_INDEX = 4,
+    WAVEFORM_SPIN_INDEX = 5,
+    WAVEFORM_QUICK_RISE_INDEX = 6,
+    WAVEFORM_SLOW_RISE_INDEX = 7,
+    WAVEFORM_QUICK_FALL_INDEX = 8,
+    WAVEFORM_LIGHT_TICK_INDEX = 9,
+    WAVEFORM_LOW_TICK_INDEX = 10,
+    WAVEFORM_RESERVED_MFG_1,
+    WAVEFORM_RESERVED_MFG_2,
+    WAVEFORM_RESERVED_MFG_3,
+    WAVEFORM_MAX_PHYSICAL_INDEX,
+    /* OWT waveform */
+    WAVEFORM_COMPOSE = WAVEFORM_MAX_PHYSICAL_INDEX,
+    WAVEFORM_PWLE,
+    /*
+     * Refer to <linux/input.h>, the WAVEFORM_MAX_INDEX must not exceed 96.
+     * #define FF_GAIN		0x60  // 96 in decimal
+     * #define FF_MAX_EFFECTS	FF_GAIN
+     */
+    WAVEFORM_MAX_INDEX,
+};
+
+std::vector<CompositePrimitive> defaultSupportedPrimitives = {
+        ndk::enum_range<CompositePrimitive>().begin(), ndk::enum_range<CompositePrimitive>().end()};
+
+enum vibe_state {
+    VIBE_STATE_STOPPED = 0,
+    VIBE_STATE_HAPTIC,
+    VIBE_STATE_ASP,
+};
+
+std::mutex mActiveId_mutex;  // protects mActiveId
+
+static int min(int x, int y) {
+    return x < y ? x : y;
+}
+
+static int floatToUint16(float input, uint16_t *output, float scale, float min, float max) {
+    if (input < min || input > max)
+        return -ERANGE;
+
+    *output = roundf(input * scale);
+    return 0;
+}
+
+struct dspmem_chunk {
+    uint8_t *head;
+    uint8_t *current;
+    uint8_t *max;
+    int bytes;
+
+    uint32_t cache;
+    int cachebits;
+};
+
+static dspmem_chunk *dspmem_chunk_create(void *data, int size) {
+    auto ch = new dspmem_chunk{
+            .head = reinterpret_cast<uint8_t *>(data),
+            .current = reinterpret_cast<uint8_t *>(data),
+            .max = reinterpret_cast<uint8_t *>(data) + size,
+    };
+
+    return ch;
+}
+
+static bool dspmem_chunk_end(struct dspmem_chunk *ch) {
+    return ch->current == ch->max;
+}
+
+static int dspmem_chunk_bytes(struct dspmem_chunk *ch) {
+    return ch->bytes;
+}
+
+static int dspmem_chunk_write(struct dspmem_chunk *ch, int nbits, uint32_t val) {
+    int nwrite, i;
+
+    nwrite = min(24 - ch->cachebits, nbits);
+    ch->cache <<= nwrite;
+    ch->cache |= val >> (nbits - nwrite);
+    ch->cachebits += nwrite;
+    nbits -= nwrite;
+
+    if (ch->cachebits == 24) {
+        if (dspmem_chunk_end(ch))
+            return -ENOSPC;
+
+        ch->cache &= 0xFFFFFF;
+        for (i = 0; i < sizeof(ch->cache); i++, ch->cache <<= 8)
+            *ch->current++ = (ch->cache & 0xFF000000) >> 24;
+
+        ch->bytes += sizeof(ch->cache);
+        ch->cachebits = 0;
+    }
+
+    if (nbits)
+        return dspmem_chunk_write(ch, nbits, val);
+
+    return 0;
+}
+
+static int dspmem_chunk_flush(struct dspmem_chunk *ch) {
+    if (!ch->cachebits)
+        return 0;
+
+    return dspmem_chunk_write(ch, 24 - ch->cachebits, 0);
+}
+
+Vibrator::Vibrator(std::unique_ptr<HwApi> hwapi, std::unique_ptr<HwCal> hwcal)
+    : mHwApi(std::move(hwapi)), mHwCal(std::move(hwcal)), mAsyncHandle(std::async([] {})) {
+    int32_t longFrequencyShift;
+    std::string caldata{8, '0'};
+    uint32_t calVer;
+
+    const char *inputEventName = std::getenv("INPUT_EVENT_NAME");
+    const char *inputEventPathName = std::getenv("INPUT_EVENT_PATH");
+    if ((strstr(inputEventName, "cs40l26") != nullptr) ||
+        (strstr(inputEventName, "cs40l26_dual_input") != nullptr)) {
+        glob_t inputEventPaths;
+        int fd = -1;
+        int ret;
+        uint32_t val = 0;
+        char str[20] = {0x00};
+        for (uint8_t retry = 0; retry < 10; retry++) {
+            ret = glob(inputEventPathName, 0, nullptr, &inputEventPaths);
+            if (ret) {
+                ALOGE("Fail to get input event paths (%d): %s", errno, strerror(errno));
+            } else {
+                for (int i = 0; i < inputEventPaths.gl_pathc; i++) {
+                    fd = TEMP_FAILURE_RETRY(open(inputEventPaths.gl_pathv[i], O_RDWR));
+                    if (fd > 0) {
+                        if (ioctl(fd, EVIOCGBIT(0, sizeof(val)), &val) > 0 &&
+                            (val & (1 << EV_FF)) && ioctl(fd, EVIOCGNAME(sizeof(str)), &str) > 0 &&
+                            strstr(str, inputEventName) != nullptr) {
+                            mInputFd.reset(fd);
+                            ALOGI("Control %s through %s", inputEventName,
+                                  inputEventPaths.gl_pathv[i]);
+                            break;
+                        }
+                        close(fd);
+                    }
+                }
+            }
+
+            if (ret == 0) {
+                globfree(&inputEventPaths);
+            }
+            if (mInputFd.ok()) {
+                break;
+            }
+
+            sleep(1);
+            ALOGW("Retry #%d to search in %zu input devices.", retry, inputEventPaths.gl_pathc);
+        }
+
+        if (!mInputFd.ok()) {
+            ALOGE("Fail to get an input event with name %s", inputEventName);
+        }
+    } else {
+        ALOGE("The input name %s is not cs40l26_input or cs40l26_dual_input", inputEventName);
+    }
+
+    mFfEffects.resize(WAVEFORM_MAX_INDEX);
+    mEffectDurations.resize(WAVEFORM_MAX_INDEX);
+    mEffectDurations = {
+            1000, 100, 30, 1000, 300, 130, 150, 500, 100, 15, 20, 1000, 1000, 1000,
+    }; /* 11+3 waveforms. The duration must < UINT16_MAX */
+
+    uint8_t effectIndex;
+    for (effectIndex = 0; effectIndex < WAVEFORM_MAX_INDEX; effectIndex++) {
+        if (effectIndex < WAVEFORM_MAX_PHYSICAL_INDEX) {
+            /* Initialize physical waveforms. */
+            mFfEffects[effectIndex] = {
+                    .type = FF_PERIODIC,
+                    .id = -1,
+                    .replay.length = static_cast<uint16_t>(mEffectDurations[effectIndex]),
+                    .u.periodic.waveform = FF_CUSTOM,
+                    .u.periodic.custom_data = new int16_t[2]{RAM_WVFRM_BANK, effectIndex},
+                    .u.periodic.custom_len = FF_CUSTOM_DATA_LEN,
+            };
+            // Bypass the waveform update due to different input name
+            if ((strstr(inputEventName, "cs40l26") != nullptr) ||
+                (strstr(inputEventName, "cs40l26_dual_input") != nullptr)) {
+                if (!mHwApi->setFFEffect(
+                            mInputFd, &mFfEffects[effectIndex],
+                            static_cast<uint16_t>(mFfEffects[effectIndex].replay.length))) {
+                    ALOGE("Failed upload effect %d (%d): %s", effectIndex, errno, strerror(errno));
+                }
+            }
+            if (mFfEffects[effectIndex].id != effectIndex) {
+                ALOGW("Unexpected effect index: %d -> %d", effectIndex, mFfEffects[effectIndex].id);
+            }
+        } else {
+            /* Initiate placeholders for OWT effects. */
+            mFfEffects[effectIndex] = {
+                    .type = FF_PERIODIC,
+                    .id = -1,
+                    .replay.length = 0,
+                    .u.periodic.waveform = FF_CUSTOM,
+                    .u.periodic.custom_data = nullptr,
+                    .u.periodic.custom_len = 0,
+            };
+        }
+    }
+
+    if (mHwCal->getF0(&caldata)) {
+        mHwApi->setF0(caldata);
+    }
+    if (mHwCal->getRedc(&caldata)) {
+        mHwApi->setRedc(caldata);
+    }
+    if (mHwCal->getQ(&caldata)) {
+        mHwApi->setQ(caldata);
+    }
+
+    mHwCal->getLongFrequencyShift(&longFrequencyShift);
+    if (longFrequencyShift > 0) {
+        mF0Offset = longFrequencyShift * std::pow(2, 14);
+    } else if (longFrequencyShift < 0) {
+        mF0Offset = std::pow(2, 24) - std::abs(longFrequencyShift) * std::pow(2, 14);
+    } else {
+        mF0Offset = 0;
+    }
+
+    mHwCal->getVersion(&calVer);
+    if (calVer == 2) {
+        mHwCal->getTickVolLevels(&mTickEffectVol);
+        mHwCal->getClickVolLevels(&mClickEffectVol);
+        mHwCal->getLongVolLevels(&mLongEffectVol);
+    } else {
+        ALOGD("Unsupported calibration version: %u!", calVer);
+    }
+
+    mHwApi->setF0CompEnable(mHwCal->isF0CompEnabled());
+    mHwApi->setRedcCompEnable(mHwCal->isRedcCompEnabled());
+
+    mIsUnderExternalControl = false;
+
+    mIsChirpEnabled = mHwCal->isChirpEnabled();
+
+    mHwCal->getSupportedPrimitives(&mSupportedPrimitivesBits);
+    if (mSupportedPrimitivesBits > 0) {
+        for (auto e : defaultSupportedPrimitives) {
+            if (mSupportedPrimitivesBits & (1 << uint32_t(e))) {
+                mSupportedPrimitives.emplace_back(e);
+            }
+        }
+    } else {
+        for (auto e : defaultSupportedPrimitives) {
+            mSupportedPrimitivesBits |= (1 << uint32_t(e));
+        }
+        mSupportedPrimitives = defaultSupportedPrimitives;
+    }
+
+    mHwApi->setMinOnOffInterval(MIN_ON_OFF_INTERVAL_US);
+
+    if (mAdaptiveHapticsEnable) {
+        vibeContextListener = CapoDetector::start();
+        if (vibeContextListener == nullptr) {
+            ALOGE("%s, CapoDetector failed to start", __func__);
+        } else {
+            ALOGD("%s, CapoDetector started successfully! NanoAppID: 0x%x", __func__,
+                  (uint32_t)vibeContextListener->getNanoppAppId());
+            vibeContextListener->setCallback(capoEventCallback);
+            ALOGD("%s, CapoDetector Set Callback function from vibe", __func__);
+        }
+    }
+}
+
+ndk::ScopedAStatus Vibrator::getCapabilities(int32_t *_aidl_return) {
+    ATRACE_NAME("Vibrator::getCapabilities");
+
+    int32_t ret = IVibrator::CAP_ON_CALLBACK | IVibrator::CAP_PERFORM_CALLBACK |
+                  IVibrator::CAP_AMPLITUDE_CONTROL | IVibrator::CAP_GET_RESONANT_FREQUENCY |
+                  IVibrator::CAP_GET_Q_FACTOR;
+    if (hasHapticAlsaDevice()) {
+        ret |= IVibrator::CAP_EXTERNAL_CONTROL;
+    } else {
+        ALOGE("No haptics ALSA device");
+    }
+    if (mHwApi->hasOwtFreeSpace()) {
+        ret |= IVibrator::CAP_COMPOSE_EFFECTS;
+        if (mIsChirpEnabled) {
+            ret |= IVibrator::CAP_FREQUENCY_CONTROL | IVibrator::CAP_COMPOSE_PWLE_EFFECTS;
+        }
+    }
+    *_aidl_return = ret;
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::off() {
+    ATRACE_NAME("Vibrator::off");
+    bool ret{true};
+    const std::scoped_lock<std::mutex> lock(mActiveId_mutex);
+
+    if (mActiveId >= 0) {
+        /* Stop the active effect. */
+        if (!mHwApi->setFFPlay(mInputFd, mActiveId, false)) {
+            ALOGE("Failed to stop effect %d (%d): %s", mActiveId, errno, strerror(errno));
+            ret = false;
+        }
+
+        if ((mActiveId >= WAVEFORM_MAX_PHYSICAL_INDEX) &&
+            (!mHwApi->eraseOwtEffect(mInputFd, mActiveId, &mFfEffects))) {
+            ALOGE("Failed to clean up the composed effect %d", mActiveId);
+            ret = false;
+        }
+    } else {
+        ALOGV("Vibrator is already off");
+    }
+
+    mActiveId = -1;
+    setGlobalAmplitude(false);
+    if (mF0Offset) {
+        mHwApi->setF0Offset(0);
+    }
+
+    if (ret) {
+        return ndk::ScopedAStatus::ok();
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::on(int32_t timeoutMs,
+                                const std::shared_ptr<IVibratorCallback> &callback) {
+    ATRACE_NAME("Vibrator::on");
+    if (timeoutMs > MAX_TIME_MS) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    }
+    const uint16_t index = (timeoutMs < WAVEFORM_LONG_VIBRATION_THRESHOLD_MS)
+                                   ? WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX
+                                   : WAVEFORM_LONG_VIBRATION_EFFECT_INDEX;
+    if (MAX_COLD_START_LATENCY_MS <= MAX_TIME_MS - timeoutMs) {
+        timeoutMs += MAX_COLD_START_LATENCY_MS;
+    }
+    setGlobalAmplitude(true);
+    if (mF0Offset) {
+        mHwApi->setF0Offset(mF0Offset);
+    }
+    return on(timeoutMs, index, nullptr /*ignored*/, callback);
+}
+
+ndk::ScopedAStatus Vibrator::perform(Effect effect, EffectStrength strength,
+                                     const std::shared_ptr<IVibratorCallback> &callback,
+                                     int32_t *_aidl_return) {
+    ATRACE_NAME("Vibrator::perform");
+    return performEffect(effect, strength, callback, _aidl_return);
+}
+
+ndk::ScopedAStatus Vibrator::getSupportedEffects(std::vector<Effect> *_aidl_return) {
+    *_aidl_return = {Effect::TEXTURE_TICK, Effect::TICK, Effect::CLICK, Effect::HEAVY_CLICK,
+                     Effect::DOUBLE_CLICK};
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::setAmplitude(float amplitude) {
+    ATRACE_NAME("Vibrator::setAmplitude");
+    if (amplitude <= 0.0f || amplitude > 1.0f) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    }
+
+    mLongEffectScale = amplitude;
+    if (!isUnderExternalControl()) {
+        return setGlobalAmplitude(true);
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::setExternalControl(bool enabled) {
+    ATRACE_NAME("Vibrator::setExternalControl");
+    setGlobalAmplitude(enabled);
+
+    if (mHasHapticAlsaDevice || mConfigHapticAlsaDeviceDone || hasHapticAlsaDevice()) {
+        if (!mHwApi->setHapticPcmAmp(&mHapticPcm, enabled, mCard, mDevice)) {
+            ALOGE("Failed to %s haptic pcm device: %d", (enabled ? "enable" : "disable"), mDevice);
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+        }
+    } else {
+        ALOGE("No haptics ALSA device");
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+    }
+
+    mIsUnderExternalControl = enabled;
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getCompositionDelayMax(int32_t *maxDelayMs) {
+    ATRACE_NAME("Vibrator::getCompositionDelayMax");
+    *maxDelayMs = COMPOSE_DELAY_MAX_MS;
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getCompositionSizeMax(int32_t *maxSize) {
+    ATRACE_NAME("Vibrator::getCompositionSizeMax");
+    *maxSize = COMPOSE_SIZE_MAX;
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getSupportedPrimitives(std::vector<CompositePrimitive> *supported) {
+    *supported = mSupportedPrimitives;
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getPrimitiveDuration(CompositePrimitive primitive,
+                                                  int32_t *durationMs) {
+    ndk::ScopedAStatus status;
+    uint32_t effectIndex;
+    if (primitive != CompositePrimitive::NOOP) {
+        status = getPrimitiveDetails(primitive, &effectIndex);
+        if (!status.isOk()) {
+            return status;
+        }
+
+        *durationMs = mEffectDurations[effectIndex];
+    } else {
+        *durationMs = 0;
+    }
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::compose(const std::vector<CompositeEffect> &composite,
+                                     const std::shared_ptr<IVibratorCallback> &callback) {
+    ATRACE_NAME("Vibrator::compose");
+    uint16_t size;
+    uint16_t nextEffectDelay;
+
+    auto ch = dspmem_chunk_create(new uint8_t[FF_CUSTOM_DATA_LEN_MAX_COMP]{0x00},
+                                  FF_CUSTOM_DATA_LEN_MAX_COMP);
+
+    if (composite.size() > COMPOSE_SIZE_MAX || composite.empty()) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    }
+
+    /* Check if there is a wait before the first effect. */
+    nextEffectDelay = composite.front().delayMs;
+    if (nextEffectDelay > COMPOSE_DELAY_MAX_MS || nextEffectDelay < 0) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    } else if (nextEffectDelay > 0) {
+        size = composite.size() + 1;
+    } else {
+        size = composite.size();
+    }
+
+    dspmem_chunk_write(ch, 8, 0);                      /* Padding */
+    dspmem_chunk_write(ch, 8, (uint8_t)(0xFF & size)); /* nsections */
+    dspmem_chunk_write(ch, 8, 0);                      /* repeat */
+    uint8_t header_count = dspmem_chunk_bytes(ch);
+
+    /* Insert 1 section for a wait before the first effect. */
+    if (nextEffectDelay) {
+        dspmem_chunk_write(ch, 32, 0); /* amplitude, index, repeat & flags */
+        dspmem_chunk_write(ch, 16, (uint16_t)(0xFFFF & nextEffectDelay)); /* delay */
+    }
+
+    for (uint32_t i_curr = 0, i_next = 1; i_curr < composite.size(); i_curr++, i_next++) {
+        auto &e_curr = composite[i_curr];
+        uint32_t effectIndex = 0;
+        uint32_t effectVolLevel = 0;
+        if (e_curr.scale < 0.0f || e_curr.scale > 1.0f) {
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+        }
+
+        if (e_curr.primitive != CompositePrimitive::NOOP) {
+            ndk::ScopedAStatus status;
+            status = getPrimitiveDetails(e_curr.primitive, &effectIndex);
+            if (!status.isOk()) {
+                return status;
+            }
+            effectVolLevel = intensityToVolLevel(e_curr.scale, effectIndex);
+        }
+
+        /* Fetch the next composite effect delay and fill into the current section */
+        nextEffectDelay = 0;
+        if (i_next < composite.size()) {
+            auto &e_next = composite[i_next];
+            int32_t delay = e_next.delayMs;
+
+            if (delay > COMPOSE_DELAY_MAX_MS || delay < 0) {
+                return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+            }
+            nextEffectDelay = delay;
+        }
+
+        if (effectIndex == 0 && nextEffectDelay == 0) {
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+        }
+
+        dspmem_chunk_write(ch, 8, (uint8_t)(0xFF & effectVolLevel));      /* amplitude */
+        dspmem_chunk_write(ch, 8, (uint8_t)(0xFF & effectIndex));         /* index */
+        dspmem_chunk_write(ch, 8, 0);                                     /* repeat */
+        dspmem_chunk_write(ch, 8, 0);                                     /* flags */
+        dspmem_chunk_write(ch, 16, (uint16_t)(0xFFFF & nextEffectDelay)); /* delay */
+    }
+    dspmem_chunk_flush(ch);
+    if (header_count == dspmem_chunk_bytes(ch)) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    } else {
+        return performEffect(WAVEFORM_MAX_INDEX /*ignored*/, VOLTAGE_SCALE_MAX /*ignored*/, ch,
+                             callback);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::on(uint32_t timeoutMs, uint32_t effectIndex, dspmem_chunk *ch,
+                                const std::shared_ptr<IVibratorCallback> &callback) {
+    ndk::ScopedAStatus status = ndk::ScopedAStatus::ok();
+
+    if (effectIndex >= FF_MAX_EFFECTS) {
+        ALOGE("Invalid waveform index %d", effectIndex);
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    }
+    if (mAsyncHandle.wait_for(ASYNC_COMPLETION_TIMEOUT) != std::future_status::ready) {
+        ALOGE("Previous vibration pending: prev: %d, curr: %d", mActiveId, effectIndex);
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+    }
+
+    if (ch) {
+        /* Upload OWT effect. */
+        if (ch->head == nullptr) {
+            ALOGE("Invalid OWT bank");
+            delete ch;
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+        }
+        bool isPwle = (*reinterpret_cast<uint16_t *>(ch->head) != 0x0000);
+        effectIndex = isPwle ? WAVEFORM_PWLE : WAVEFORM_COMPOSE;
+
+        uint32_t freeBytes;
+        mHwApi->getOwtFreeSpace(&freeBytes);
+        if (dspmem_chunk_bytes(ch) > freeBytes) {
+            ALOGE("Invalid OWT length: Effect %d: %d > %d!", effectIndex, dspmem_chunk_bytes(ch),
+                  freeBytes);
+            delete ch;
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+        }
+        int errorStatus;
+        if (!mHwApi->uploadOwtEffect(mInputFd, ch->head, dspmem_chunk_bytes(ch),
+                                     &mFfEffects[effectIndex], &effectIndex, &errorStatus)) {
+            delete ch;
+            ALOGE("Invalid uploadOwtEffect");
+            return ndk::ScopedAStatus::fromExceptionCode(errorStatus);
+        }
+        delete ch;
+
+    } else if (effectIndex == WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX ||
+               effectIndex == WAVEFORM_LONG_VIBRATION_EFFECT_INDEX) {
+        /* Update duration for long/short vibration. */
+        mFfEffects[effectIndex].replay.length = static_cast<uint16_t>(timeoutMs);
+        if (!mHwApi->setFFEffect(mInputFd, &mFfEffects[effectIndex],
+                                 static_cast<uint16_t>(timeoutMs))) {
+            ALOGE("Failed to edit effect %d (%d): %s", effectIndex, errno, strerror(errno));
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+        }
+    }
+
+    const std::scoped_lock<std::mutex> lock(mActiveId_mutex);
+    mActiveId = effectIndex;
+    /* Play the event now. */
+    if (!mHwApi->setFFPlay(mInputFd, effectIndex, true)) {
+        ALOGE("Failed to play effect %d (%d): %s", effectIndex, errno, strerror(errno));
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+    }
+
+    mAsyncHandle = std::async(&Vibrator::waitForComplete, this, callback);
+    return ndk::ScopedAStatus::ok();
+}
+
+uint16_t Vibrator::amplitudeToScale(float amplitude, float maximum, bool scalable) {
+    float ratio = 100; /* Unit: % */
+
+    if (maximum != 0)
+        ratio = amplitude / maximum * 100;
+
+    if (maximum == 0 || ratio > 100)
+        ratio = 100;
+
+    if (scalable && mContextEnable & mAdaptiveHapticsEnable) {
+        uint32_t now = getCurrentTimeInMs();
+        uint32_t last_played = mLastEffectPlayedTime;
+        float context_scale = 1.0;
+        bool device_face_up = getDeviceState() == capo::PositionType::ON_TABLE_FACE_UP;
+        float pre_scaled_ratio = ratio;
+        mLastEffectPlayedTime = now;
+
+        ALOGD("Vibrator Now: %u, Last: %u, ScaleTime: %u, Since? %d", now, mLastFaceUpEvent, mScaleTime, (now < mLastFaceUpEvent + mScaleTime));
+        /* If the device is face-up or within the fade scaling range, find new scaling factor */
+        if (device_face_up || now < mLastFaceUpEvent + mScaleTime) {
+            /* Device is face-up, so we will scale it down. Start with highest scaling factor */
+            context_scale = mScalingFactor <= 100 ? static_cast<float>(mScalingFactor)/100 : 1.0;
+            if (mFadeEnable && mScaleTime > 0 && (context_scale < 1.0) && (now < mLastFaceUpEvent + mScaleTime) && !device_face_up) {
+                float fade_scale = static_cast<float>(now - mLastFaceUpEvent)/static_cast<float>(mScaleTime);
+                context_scale += ((1.0 - context_scale)*fade_scale);
+                ALOGD("Vibrator fade scale applied: %f", fade_scale);
+            }
+            ratio *= context_scale;
+            ALOGD("Vibrator adjusting for face-up: pre: %f, post: %f",
+                  std::round(pre_scaled_ratio), std::round(ratio));
+        }
+
+        /* If we haven't played an effect within the cooldown time, save the scaling factor */
+        if ((now - last_played) > mScaleCooldown) {
+            ALOGD("Vibrator updating lastplayed scale, old: %f, new: %f", mLastPlayedScale, context_scale);
+            mLastPlayedScale = context_scale;
+        }
+        else {
+            /* Override the scale to match previously played scale */
+            ratio = mLastPlayedScale * pre_scaled_ratio;
+            ALOGD("Vibrator repeating last scale: %f, new ratio: %f, duration since last: %u", mLastPlayedScale, ratio, (now - last_played));
+        }
+    }
+
+    return std::round(ratio);
+}
+
+void Vibrator::updateContext() {
+    mContextEnable = mHwApi->getContextEnable();
+    mFadeEnable = mHwApi->getContextFadeEnable();
+    mScalingFactor = mHwApi->getContextScale();
+    mScaleTime = mHwApi->getContextSettlingTime();
+    mScaleCooldown = mHwApi->getContextCooldownTime();
+}
+
+ndk::ScopedAStatus Vibrator::setEffectAmplitude(float amplitude, float maximum, bool scalable) {
+    uint16_t scale;
+
+    if (mAdaptiveHapticsEnable && scalable) {
+        updateContext();
+    }
+
+    scale = amplitudeToScale(amplitude, maximum, scalable);
+
+    if (!mHwApi->setFFGain(mInputFd, scale)) {
+        ALOGE("Failed to set the gain to %u (%d): %s", scale, errno, strerror(errno));
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+    }
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::setGlobalAmplitude(bool set) {
+    uint8_t amplitude = set ? roundf(mLongEffectScale * mLongEffectVol[1]) : VOLTAGE_SCALE_MAX;
+    if (!set) {
+        mLongEffectScale = 1.0;  // Reset the scale for the later new effect.
+    }
+    return setEffectAmplitude(amplitude, VOLTAGE_SCALE_MAX, true);
+}
+
+ndk::ScopedAStatus Vibrator::getSupportedAlwaysOnEffects(std::vector<Effect> * /*_aidl_return*/) {
+    return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+}
+
+ndk::ScopedAStatus Vibrator::alwaysOnEnable(int32_t /*id*/, Effect /*effect*/,
+                                            EffectStrength /*strength*/) {
+    return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+}
+ndk::ScopedAStatus Vibrator::alwaysOnDisable(int32_t /*id*/) {
+    return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+}
+
+ndk::ScopedAStatus Vibrator::getResonantFrequency(float *resonantFreqHz) {
+    std::string caldata{8, '0'};
+    if (!mHwCal->getF0(&caldata)) {
+        ALOGE("Failed to get resonant frequency (%d): %s", errno, strerror(errno));
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+    }
+    *resonantFreqHz = static_cast<float>(std::stoul(caldata, nullptr, 16)) / (1 << Q14_BIT_SHIFT);
+
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getQFactor(float *qFactor) {
+    std::string caldata{8, '0'};
+    if (!mHwCal->getQ(&caldata)) {
+        ALOGE("Failed to get q factor (%d): %s", errno, strerror(errno));
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_STATE);
+    }
+    *qFactor = static_cast<float>(std::stoul(caldata, nullptr, 16)) / (1 << Q16_BIT_SHIFT);
+
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getFrequencyResolution(float *freqResolutionHz) {
+    int32_t capabilities;
+    Vibrator::getCapabilities(&capabilities);
+    if (capabilities & IVibrator::CAP_FREQUENCY_CONTROL) {
+        *freqResolutionHz = PWLE_FREQUENCY_RESOLUTION_HZ;
+        return ndk::ScopedAStatus::ok();
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::getFrequencyMinimum(float *freqMinimumHz) {
+    int32_t capabilities;
+    Vibrator::getCapabilities(&capabilities);
+    if (capabilities & IVibrator::CAP_FREQUENCY_CONTROL) {
+        *freqMinimumHz = PWLE_FREQUENCY_MIN_HZ;
+        return ndk::ScopedAStatus::ok();
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::getBandwidthAmplitudeMap(std::vector<float> *_aidl_return) {
+    // TODO(b/170919640): complete implementation
+    int32_t capabilities;
+    Vibrator::getCapabilities(&capabilities);
+    if (capabilities & IVibrator::CAP_FREQUENCY_CONTROL) {
+        std::vector<float> bandwidthAmplitudeMap(PWLE_BW_MAP_SIZE, 1.0);
+        *_aidl_return = bandwidthAmplitudeMap;
+        return ndk::ScopedAStatus::ok();
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::getPwlePrimitiveDurationMax(int32_t *durationMs) {
+    int32_t capabilities;
+    Vibrator::getCapabilities(&capabilities);
+    if (capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) {
+        *durationMs = COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS;
+        return ndk::ScopedAStatus::ok();
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::getPwleCompositionSizeMax(int32_t *maxSize) {
+    int32_t capabilities;
+    Vibrator::getCapabilities(&capabilities);
+    if (capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) {
+        *maxSize = COMPOSE_PWLE_SIZE_MAX_DEFAULT;
+        return ndk::ScopedAStatus::ok();
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+}
+
+ndk::ScopedAStatus Vibrator::getSupportedBraking(std::vector<Braking> *supported) {
+    int32_t capabilities;
+    Vibrator::getCapabilities(&capabilities);
+    if (capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) {
+        *supported = {
+                Braking::NONE,
+        };
+        return ndk::ScopedAStatus::ok();
+    } else {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+}
+
+static void resetPreviousEndAmplitudeEndFrequency(float *prevEndAmplitude,
+                                                  float *prevEndFrequency) {
+    const float reset = -1.0;
+    *prevEndAmplitude = reset;
+    *prevEndFrequency = reset;
+}
+
+static void incrementIndex(int *index) {
+    *index += 1;
+}
+
+static void constructPwleSegment(dspmem_chunk *ch, uint16_t delay, uint16_t amplitude,
+                                 uint16_t frequency, uint8_t flags, uint32_t vbemfTarget = 0) {
+    dspmem_chunk_write(ch, 16, delay);
+    dspmem_chunk_write(ch, 12, amplitude);
+    dspmem_chunk_write(ch, 12, frequency);
+    /* feature flags to control the chirp, CLAB braking, back EMF amplitude regulation */
+    dspmem_chunk_write(ch, 8, (flags | 1) << 4);
+    if (flags & PWLE_AMP_REG_BIT) {
+        dspmem_chunk_write(ch, 24, vbemfTarget); /* target back EMF voltage */
+    }
+}
+
+static int constructActiveSegment(dspmem_chunk *ch, int duration, float amplitude, float frequency,
+                                  bool chirp) {
+    uint16_t delay = 0;
+    uint16_t amp = 0;
+    uint16_t freq = 0;
+    uint8_t flags = 0x0;
+    if ((floatToUint16(duration, &delay, 4, 0.0f, COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) < 0) ||
+        (floatToUint16(amplitude, &amp, 2048, CS40L26_PWLE_LEVEL_MIX, CS40L26_PWLE_LEVEL_MAX) <
+         0) ||
+        (floatToUint16(frequency, &freq, 4, PWLE_FREQUENCY_MIN_HZ, PWLE_FREQUENCY_MAX_HZ) < 0)) {
+        ALOGE("Invalid argument: %d, %f, %f", duration, amplitude, frequency);
+        return -ERANGE;
+    }
+    if (chirp) {
+        flags |= PWLE_CHIRP_BIT;
+    }
+    constructPwleSegment(ch, delay, amp, freq, flags, 0 /*ignored*/);
+    return 0;
+}
+
+static int constructBrakingSegment(dspmem_chunk *ch, int duration, Braking brakingType) {
+    uint16_t delay = 0;
+    uint16_t freq = 0;
+    uint8_t flags = 0x00;
+    if (floatToUint16(duration, &delay, 4, 0.0f, COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) < 0) {
+        ALOGE("Invalid argument: %d", duration);
+        return -ERANGE;
+    }
+    floatToUint16(PWLE_FREQUENCY_MIN_HZ, &freq, 4, PWLE_FREQUENCY_MIN_HZ, PWLE_FREQUENCY_MAX_HZ);
+    if (static_cast<std::underlying_type<Braking>::type>(brakingType)) {
+        flags |= PWLE_BRAKE_BIT;
+    }
+
+    constructPwleSegment(ch, delay, 0 /*ignored*/, freq, flags, 0 /*ignored*/);
+    return 0;
+}
+
+static void updateWLength(dspmem_chunk *ch, uint32_t totalDuration) {
+    totalDuration *= 8;            /* Unit: 0.125 ms (since wlength played @ 8kHz). */
+    totalDuration |= WT_LEN_CALCD; /* Bit 23 is for WT_LEN_CALCD; Bit 22 is for WT_INDEFINITE. */
+    *(ch->head + 0) = (totalDuration >> 24) & 0xFF;
+    *(ch->head + 1) = (totalDuration >> 16) & 0xFF;
+    *(ch->head + 2) = (totalDuration >> 8) & 0xFF;
+    *(ch->head + 3) = totalDuration & 0xFF;
+}
+
+static void updateNSection(dspmem_chunk *ch, int segmentIdx) {
+    *(ch->head + 7) |= (0xF0 & segmentIdx) >> 4; /* Bit 4 to 7 */
+    *(ch->head + 9) |= (0x0F & segmentIdx) << 4; /* Bit 3 to 0 */
+}
+
+ndk::ScopedAStatus Vibrator::composePwle(const std::vector<PrimitivePwle> &composite,
+                                         const std::shared_ptr<IVibratorCallback> &callback) {
+    ATRACE_NAME("Vibrator::composePwle");
+    int32_t capabilities;
+
+    Vibrator::getCapabilities(&capabilities);
+    if ((capabilities & IVibrator::CAP_COMPOSE_PWLE_EFFECTS) == 0) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+
+    if (composite.empty() || composite.size() > COMPOSE_PWLE_SIZE_MAX_DEFAULT) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    }
+
+    std::vector<Braking> supported;
+    Vibrator::getSupportedBraking(&supported);
+    bool isClabSupported =
+            std::find(supported.begin(), supported.end(), Braking::CLAB) != supported.end();
+
+    int segmentIdx = 0;
+    uint32_t totalDuration = 0;
+    float prevEndAmplitude;
+    float prevEndFrequency;
+    resetPreviousEndAmplitudeEndFrequency(&prevEndAmplitude, &prevEndFrequency);
+    auto ch = dspmem_chunk_create(new uint8_t[FF_CUSTOM_DATA_LEN_MAX_PWLE]{0x00},
+                                  FF_CUSTOM_DATA_LEN_MAX_PWLE);
+    bool chirp = false;
+
+    dspmem_chunk_write(ch, 24, 0x000000); /* Waveform length placeholder */
+    dspmem_chunk_write(ch, 8, 0);         /* Repeat */
+    dspmem_chunk_write(ch, 12, 0);        /* Wait time between repeats */
+    dspmem_chunk_write(ch, 8, 0x00);      /* nsections placeholder */
+
+    for (auto &e : composite) {
+        switch (e.getTag()) {
+            case PrimitivePwle::active: {
+                auto active = e.get<PrimitivePwle::active>();
+                if (active.duration < 0 ||
+                    active.duration > COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+                if (active.startAmplitude < PWLE_LEVEL_MIN ||
+                    active.startAmplitude > PWLE_LEVEL_MAX ||
+                    active.endAmplitude < PWLE_LEVEL_MIN || active.endAmplitude > PWLE_LEVEL_MAX) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+                if (active.startAmplitude > CS40L26_PWLE_LEVEL_MAX) {
+                    active.startAmplitude = CS40L26_PWLE_LEVEL_MAX;
+                }
+                if (active.endAmplitude > CS40L26_PWLE_LEVEL_MAX) {
+                    active.endAmplitude = CS40L26_PWLE_LEVEL_MAX;
+                }
+
+                if (active.startFrequency < PWLE_FREQUENCY_MIN_HZ ||
+                    active.startFrequency > PWLE_FREQUENCY_MAX_HZ ||
+                    active.endFrequency < PWLE_FREQUENCY_MIN_HZ ||
+                    active.endFrequency > PWLE_FREQUENCY_MAX_HZ) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+
+                if (!((active.startAmplitude == prevEndAmplitude) &&
+                      (active.startFrequency == prevEndFrequency))) {
+                    if (constructActiveSegment(ch, 0, active.startAmplitude, active.startFrequency,
+                                               false) < 0) {
+                        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                    }
+                    incrementIndex(&segmentIdx);
+                }
+
+                if (active.startFrequency != active.endFrequency) {
+                    chirp = true;
+                }
+                if (constructActiveSegment(ch, active.duration, active.endAmplitude,
+                                           active.endFrequency, chirp) < 0) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+                incrementIndex(&segmentIdx);
+
+                prevEndAmplitude = active.endAmplitude;
+                prevEndFrequency = active.endFrequency;
+                totalDuration += active.duration;
+                chirp = false;
+                break;
+            }
+            case PrimitivePwle::braking: {
+                auto braking = e.get<PrimitivePwle::braking>();
+                if (braking.braking > Braking::CLAB) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                } else if (!isClabSupported && (braking.braking == Braking::CLAB)) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+
+                if (braking.duration > COMPOSE_PWLE_PRIMITIVE_DURATION_MAX_MS) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+
+                if (constructBrakingSegment(ch, 0, braking.braking) < 0) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+                incrementIndex(&segmentIdx);
+
+                if (constructBrakingSegment(ch, braking.duration, braking.braking) < 0) {
+                    return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+                }
+                incrementIndex(&segmentIdx);
+
+                resetPreviousEndAmplitudeEndFrequency(&prevEndAmplitude, &prevEndFrequency);
+                totalDuration += braking.duration;
+                break;
+            }
+        }
+
+        if (segmentIdx > COMPOSE_PWLE_SIZE_MAX_DEFAULT) {
+            ALOGE("Too many PrimitivePwle section!");
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+        }
+    }
+    dspmem_chunk_flush(ch);
+
+    /* Update wlength */
+    totalDuration += MAX_COLD_START_LATENCY_MS;
+    if (totalDuration > 0x7FFFF) {
+        ALOGE("Total duration is too long (%d)!", totalDuration);
+        return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+    }
+    updateWLength(ch, totalDuration);
+
+    /* Update nsections */
+    updateNSection(ch, segmentIdx);
+
+    return performEffect(WAVEFORM_MAX_INDEX /*ignored*/, VOLTAGE_SCALE_MAX /*ignored*/, ch,
+                         callback);
+}
+
+bool Vibrator::isUnderExternalControl() {
+    return mIsUnderExternalControl;
+}
+
+binder_status_t Vibrator::dump(int fd, const char **args, uint32_t numArgs) {
+    if (fd < 0) {
+        ALOGE("Called debug() with invalid fd.");
+        return STATUS_OK;
+    }
+
+    (void)args;
+    (void)numArgs;
+
+    dprintf(fd, "AIDL:\n");
+
+    dprintf(fd, "  F0 Offset: %" PRIu32 "\n", mF0Offset);
+
+    dprintf(fd, "  Voltage Levels:\n");
+    dprintf(fd, "    Tick Effect Min: %" PRIu32 " Max: %" PRIu32 "\n", mTickEffectVol[0],
+            mTickEffectVol[1]);
+    dprintf(fd, "    Click Effect Min: %" PRIu32 " Max: %" PRIu32 "\n", mClickEffectVol[0],
+            mClickEffectVol[1]);
+    dprintf(fd, "    Long Effect Min: %" PRIu32 " Max: %" PRIu32 "\n", mLongEffectVol[0],
+            mLongEffectVol[1]);
+
+    dprintf(fd, "  FF effect:\n");
+    dprintf(fd, "    Physical waveform:\n");
+    dprintf(fd, "\tId\tIndex\tt   ->\tt'\n");
+    for (uint8_t effectId = 0; effectId < WAVEFORM_MAX_PHYSICAL_INDEX; effectId++) {
+        dprintf(fd, "\t%d\t%d\t%d\t%d\n", mFfEffects[effectId].id,
+                mFfEffects[effectId].u.periodic.custom_data[1], mEffectDurations[effectId],
+                mFfEffects[effectId].replay.length);
+    }
+    dprintf(fd, "    OWT waveform:\n");
+    dprintf(fd, "\tId\tBytes\tData\n");
+    for (uint8_t effectId = WAVEFORM_MAX_PHYSICAL_INDEX; effectId < WAVEFORM_MAX_INDEX;
+         effectId++) {
+        uint32_t numBytes = mFfEffects[effectId].u.periodic.custom_len * 2;
+        std::stringstream ss;
+        ss << " ";
+        for (int i = 0; i < numBytes; i++) {
+            ss << std::uppercase << std::setfill('0') << std::setw(2) << std::hex
+               << (uint16_t)(*(
+                          reinterpret_cast<uint8_t *>(mFfEffects[effectId].u.periodic.custom_data) +
+                          i))
+               << " ";
+        }
+        dprintf(fd, "\t%d\t%d\t{%s}\n", mFfEffects[effectId].id, numBytes, ss.str().c_str());
+    }
+
+    dprintf(fd, "\n");
+    dprintf(fd, "\n");
+
+    mHwApi->debug(fd);
+
+    dprintf(fd, "\n");
+
+    mHwCal->debug(fd);
+
+    dprintf(fd, "Capo Info\n");
+    if (vibeContextListener) {
+        dprintf(fd, "Capo ID: 0x%x\n", (uint32_t)(vibeContextListener->getNanoppAppId()));
+        dprintf(fd, "Capo State: %d DetectedState: %d\n", vibeContextListener->getCarriedPosition(),
+                getDeviceState());
+    } else {
+        dprintf(fd, "Capo ID: 0x%x\n", (uint32_t)(0xdeadbeef));
+        dprintf(fd, "Capo State: %d DetectedState: %d\n", (uint32_t)0x454545, getDeviceState());
+    }
+
+    fsync(fd);
+    return STATUS_OK;
+}
+
+bool Vibrator::hasHapticAlsaDevice() {
+    // We need to call findHapticAlsaDevice once only. Calling in the
+    // constructor is too early in the boot process and the pcm file contents
+    // are empty. Hence we make the call here once only right before we need to.
+    if (!mConfigHapticAlsaDeviceDone) {
+        if (mHwApi->getHapticAlsaDevice(&mCard, &mDevice)) {
+            mHasHapticAlsaDevice = true;
+            mConfigHapticAlsaDeviceDone = true;
+        } else {
+            ALOGE("Haptic ALSA device not supported");
+        }
+    } else {
+        ALOGD("Haptic ALSA device configuration done.");
+    }
+    return mHasHapticAlsaDevice;
+}
+
+ndk::ScopedAStatus Vibrator::getSimpleDetails(Effect effect, EffectStrength strength,
+                                              uint32_t *outEffectIndex, uint32_t *outTimeMs,
+                                              uint32_t *outVolLevel) {
+    uint32_t effectIndex;
+    uint32_t timeMs;
+    float intensity;
+    uint32_t volLevel;
+    switch (strength) {
+        case EffectStrength::LIGHT:
+            intensity = 0.5f;
+            break;
+        case EffectStrength::MEDIUM:
+            intensity = 0.7f;
+            break;
+        case EffectStrength::STRONG:
+            intensity = 1.0f;
+            break;
+        default:
+            return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+
+    switch (effect) {
+        case Effect::TEXTURE_TICK:
+            effectIndex = WAVEFORM_LIGHT_TICK_INDEX;
+            intensity *= 0.5f;
+            break;
+        case Effect::TICK:
+            effectIndex = WAVEFORM_CLICK_INDEX;
+            intensity *= 0.5f;
+            break;
+        case Effect::CLICK:
+            effectIndex = WAVEFORM_CLICK_INDEX;
+            intensity *= 0.7f;
+            break;
+        case Effect::HEAVY_CLICK:
+            effectIndex = WAVEFORM_CLICK_INDEX;
+            intensity *= 1.0f;
+            break;
+        default:
+            return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+
+    volLevel = intensityToVolLevel(intensity, effectIndex);
+    timeMs = mEffectDurations[effectIndex] + MAX_COLD_START_LATENCY_MS;
+
+    *outEffectIndex = effectIndex;
+    *outTimeMs = timeMs;
+    *outVolLevel = volLevel;
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getCompoundDetails(Effect effect, EffectStrength strength,
+                                                uint32_t *outTimeMs, dspmem_chunk *outCh) {
+    ndk::ScopedAStatus status;
+    uint32_t timeMs = 0;
+    uint32_t thisEffectIndex;
+    uint32_t thisTimeMs;
+    uint32_t thisVolLevel;
+    switch (effect) {
+        case Effect::DOUBLE_CLICK:
+            dspmem_chunk_write(outCh, 8, 0); /* Padding */
+            dspmem_chunk_write(outCh, 8, 2); /* nsections */
+            dspmem_chunk_write(outCh, 8, 0); /* repeat */
+
+            status = getSimpleDetails(Effect::CLICK, strength, &thisEffectIndex, &thisTimeMs,
+                                      &thisVolLevel);
+            if (!status.isOk()) {
+                return status;
+            }
+            timeMs += thisTimeMs;
+
+            dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisVolLevel));    /* amplitude */
+            dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisEffectIndex)); /* index */
+            dspmem_chunk_write(outCh, 8, 0);                                 /* repeat */
+            dspmem_chunk_write(outCh, 8, 0);                                 /* flags */
+            dspmem_chunk_write(outCh, 16,
+                               (uint16_t)(0xFFFF & WAVEFORM_DOUBLE_CLICK_SILENCE_MS)); /* delay */
+
+            timeMs += WAVEFORM_DOUBLE_CLICK_SILENCE_MS + MAX_PAUSE_TIMING_ERROR_MS;
+
+            status = getSimpleDetails(Effect::HEAVY_CLICK, strength, &thisEffectIndex, &thisTimeMs,
+                                      &thisVolLevel);
+            if (!status.isOk()) {
+                return status;
+            }
+            timeMs += thisTimeMs;
+
+            dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisVolLevel));    /* amplitude */
+            dspmem_chunk_write(outCh, 8, (uint8_t)(0xFF & thisEffectIndex)); /* index */
+            dspmem_chunk_write(outCh, 8, 0);                                 /* repeat */
+            dspmem_chunk_write(outCh, 8, 0);                                 /* flags */
+            dspmem_chunk_write(outCh, 16, 0);                                /* delay */
+            dspmem_chunk_flush(outCh);
+
+            break;
+        default:
+            return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+
+    *outTimeMs = timeMs;
+
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::getPrimitiveDetails(CompositePrimitive primitive,
+                                                 uint32_t *outEffectIndex) {
+    uint32_t effectIndex;
+    uint32_t primitiveBit = 1 << int32_t(primitive);
+    if ((primitiveBit & mSupportedPrimitivesBits) == 0x0) {
+        return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+
+    switch (primitive) {
+        case CompositePrimitive::NOOP:
+            return ndk::ScopedAStatus::fromExceptionCode(EX_ILLEGAL_ARGUMENT);
+        case CompositePrimitive::CLICK:
+            effectIndex = WAVEFORM_CLICK_INDEX;
+            break;
+        case CompositePrimitive::THUD:
+            effectIndex = WAVEFORM_THUD_INDEX;
+            break;
+        case CompositePrimitive::SPIN:
+            effectIndex = WAVEFORM_SPIN_INDEX;
+            break;
+        case CompositePrimitive::QUICK_RISE:
+            effectIndex = WAVEFORM_QUICK_RISE_INDEX;
+            break;
+        case CompositePrimitive::SLOW_RISE:
+            effectIndex = WAVEFORM_SLOW_RISE_INDEX;
+            break;
+        case CompositePrimitive::QUICK_FALL:
+            effectIndex = WAVEFORM_QUICK_FALL_INDEX;
+            break;
+        case CompositePrimitive::LIGHT_TICK:
+            effectIndex = WAVEFORM_LIGHT_TICK_INDEX;
+            break;
+        case CompositePrimitive::LOW_TICK:
+            effectIndex = WAVEFORM_LOW_TICK_INDEX;
+            break;
+        default:
+            return ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+    }
+
+    *outEffectIndex = effectIndex;
+
+    return ndk::ScopedAStatus::ok();
+}
+
+ndk::ScopedAStatus Vibrator::performEffect(Effect effect, EffectStrength strength,
+                                           const std::shared_ptr<IVibratorCallback> &callback,
+                                           int32_t *outTimeMs) {
+    ndk::ScopedAStatus status;
+    uint32_t effectIndex;
+    uint32_t timeMs = 0;
+    uint32_t volLevel;
+    dspmem_chunk *ch = nullptr;
+    switch (effect) {
+        case Effect::TEXTURE_TICK:
+            // fall-through
+        case Effect::TICK:
+            // fall-through
+        case Effect::CLICK:
+            // fall-through
+        case Effect::HEAVY_CLICK:
+            status = getSimpleDetails(effect, strength, &effectIndex, &timeMs, &volLevel);
+            break;
+        case Effect::DOUBLE_CLICK:
+            ch = dspmem_chunk_create(new uint8_t[FF_CUSTOM_DATA_LEN_MAX_COMP]{0x00},
+                                     FF_CUSTOM_DATA_LEN_MAX_COMP);
+            status = getCompoundDetails(effect, strength, &timeMs, ch);
+            volLevel = VOLTAGE_SCALE_MAX;
+            break;
+        default:
+            status = ndk::ScopedAStatus::fromExceptionCode(EX_UNSUPPORTED_OPERATION);
+            break;
+    }
+    if (!status.isOk()) {
+        goto exit;
+    }
+
+    status = performEffect(effectIndex, volLevel, ch, callback);
+
+exit:
+    *outTimeMs = timeMs;
+    return status;
+}
+
+ndk::ScopedAStatus Vibrator::performEffect(uint32_t effectIndex, uint32_t volLevel,
+                                           dspmem_chunk *ch,
+                                           const std::shared_ptr<IVibratorCallback> &callback) {
+    setEffectAmplitude(volLevel, VOLTAGE_SCALE_MAX, false);
+
+    return on(MAX_TIME_MS, effectIndex, ch, callback);
+}
+
+void Vibrator::waitForComplete(std::shared_ptr<IVibratorCallback> &&callback) {
+    if (!mHwApi->pollVibeState(VIBE_STATE_HAPTIC, POLLING_TIMEOUT)) {
+        ALOGW("Failed to get state \"Haptic\"");
+    }
+    mHwApi->pollVibeState(VIBE_STATE_STOPPED);
+
+    const std::scoped_lock<std::mutex> lock(mActiveId_mutex);
+    if ((mActiveId >= WAVEFORM_MAX_PHYSICAL_INDEX) &&
+        (!mHwApi->eraseOwtEffect(mInputFd, mActiveId, &mFfEffects))) {
+        ALOGE("Failed to clean up the composed effect %d", mActiveId);
+    }
+    mActiveId = -1;
+
+    if (callback) {
+        auto ret = callback->onComplete();
+        if (!ret.isOk()) {
+            ALOGE("Failed completion callback: %d", ret.getExceptionCode());
+        }
+    }
+}
+
+uint32_t Vibrator::intensityToVolLevel(float intensity, uint32_t effectIndex) {
+    uint32_t volLevel;
+    auto calc = [](float intst, std::array<uint32_t, 2> v) -> uint32_t {
+        return std::lround(intst * (v[1] - v[0])) + v[0];
+    };
+
+    switch (effectIndex) {
+        case WAVEFORM_LIGHT_TICK_INDEX:
+            volLevel = calc(intensity, mTickEffectVol);
+            break;
+        case WAVEFORM_QUICK_RISE_INDEX:
+            // fall-through
+        case WAVEFORM_QUICK_FALL_INDEX:
+            volLevel = calc(intensity, mLongEffectVol);
+            break;
+        case WAVEFORM_CLICK_INDEX:
+            // fall-through
+        case WAVEFORM_THUD_INDEX:
+            // fall-through
+        case WAVEFORM_SPIN_INDEX:
+            // fall-through
+        case WAVEFORM_SLOW_RISE_INDEX:
+            // fall-through
+        default:
+            volLevel = calc(intensity, mClickEffectVol);
+            break;
+    }
+    return volLevel;
+}
+
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/cs40l26/Vibrator.h b/vibrator/cs40l26/Vibrator.h
new file mode 100644
index 0000000..7c9e99c
--- /dev/null
+++ b/vibrator/cs40l26/Vibrator.h
@@ -0,0 +1,235 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#pragma once
+
+#include <aidl/android/hardware/vibrator/BnVibrator.h>
+#include <android-base/unique_fd.h>
+#include <linux/input.h>
+#include <tinyalsa/asoundlib.h>
+
+#include <array>
+#include <fstream>
+#include <future>
+#include <ctime>
+#include <chrono>
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+
+class Vibrator : public BnVibrator {
+  public:
+    // APIs for interfacing with the kernel driver.
+    class HwApi {
+      public:
+        virtual ~HwApi() = default;
+        // Stores the LRA resonant frequency to be used for PWLE playback
+        // and click compensation.
+        virtual bool setF0(std::string value) = 0;
+        // Stores the frequency offset for long vibrations.
+        virtual bool setF0Offset(uint32_t value) = 0;
+        // Stores the LRA series resistance to be used for click
+        // compensation.
+        virtual bool setRedc(std::string value) = 0;
+        // Stores the LRA Q factor to be used for Q-dependent waveform
+        // selection.
+        virtual bool setQ(std::string value) = 0;
+        // Reports the number of effect waveforms loaded in firmware.
+        virtual bool getEffectCount(uint32_t *value) = 0;
+        // Blocks until timeout or vibrator reaches desired state
+        // (2 = ASP enabled, 1 = haptic enabled, 0 = disabled).
+        virtual bool pollVibeState(uint32_t value, int32_t timeoutMs = -1) = 0;
+        // Reports whether getOwtFreeSpace() is supported.
+        virtual bool hasOwtFreeSpace() = 0;
+        // Reports the available OWT bytes.
+        virtual bool getOwtFreeSpace(uint32_t *value) = 0;
+        // Enables/Disables F0 compensation enable status
+        virtual bool setF0CompEnable(bool value) = 0;
+        // Enables/Disables Redc compensation enable status
+        virtual bool setRedcCompEnable(bool value) = 0;
+        // Stores the minumun delay time between playback and stop effects.
+        virtual bool setMinOnOffInterval(uint32_t value) = 0;
+        // Gets the scaling factor for contextual haptic events.
+        virtual uint32_t getContextScale() = 0;
+        // Gets the enable status for contextual haptic events.
+        virtual bool getContextEnable() = 0;
+        // Gets the settling time for contextual haptic events.
+        // This will allow the device to stay face up for the duration given,
+        // even if InMotion events were detected.
+        virtual uint32_t getContextSettlingTime() = 0;
+        // Gets the cooldown time for contextual haptic events.
+        // This is used to avoid changing the scale of close playback events.
+        virtual uint32_t getContextCooldownTime() = 0;
+        // Checks the enable status for contextual haptics fade feature.  When enabled
+        // this feature will cause the scaling factor to fade back up to max over
+        // the setting time set, instead of instantaneously changing it back to max.
+        virtual bool getContextFadeEnable() = 0;
+        // Indicates the number of 0.125-dB steps of attenuation to apply to
+        // waveforms triggered in response to vibration calls from the
+        // Android vibrator HAL.
+        virtual bool setFFGain(int fd, uint16_t value) = 0;
+        // Create/modify custom effects for all physical waveforms.
+        virtual bool setFFEffect(int fd, struct ff_effect *effect, uint16_t timeoutMs) = 0;
+        // Activates/deactivates the effect index after setFFGain() and setFFEffect().
+        virtual bool setFFPlay(int fd, int8_t index, bool value) = 0;
+        // Get the Alsa device for the audio coupled haptics effect
+        virtual bool getHapticAlsaDevice(int *card, int *device) = 0;
+        // Set haptics PCM amplifier before triggering audio haptics feature
+        virtual bool setHapticPcmAmp(struct pcm **haptic_pcm, bool enable, int card,
+                                     int device) = 0;
+        // Set OWT waveform for compose or compose PWLE request
+        virtual bool uploadOwtEffect(int fd, uint8_t *owtData, uint32_t numBytes,
+                                     struct ff_effect *effect, uint32_t *outEffectIndex,
+                                     int *status) = 0;
+        // Erase OWT waveform
+        virtual bool eraseOwtEffect(int fd, int8_t effectIndex, std::vector<ff_effect> *effect) = 0;
+        // Emit diagnostic information to the given file.
+        virtual void debug(int fd) = 0;
+    };
+
+    // APIs for obtaining calibration/configuration data from persistent memory.
+    class HwCal {
+      public:
+        virtual ~HwCal() = default;
+        // Obtain the calibration version
+        virtual bool getVersion(uint32_t *value) = 0;
+        // Obtains the LRA resonant frequency to be used for PWLE playback
+        // and click compensation.
+        virtual bool getF0(std::string *value) = 0;
+        // Obtains the LRA series resistance to be used for click
+        // compensation.
+        virtual bool getRedc(std::string *value) = 0;
+        // Obtains the LRA Q factor to be used for Q-dependent waveform
+        // selection.
+        virtual bool getQ(std::string *value) = 0;
+        // Obtains frequency shift for long vibrations.
+        virtual bool getLongFrequencyShift(int32_t *value) = 0;
+        // Obtains the v0/v1(min/max) voltage levels to be applied for
+        // tick/click/long in units of 1%.
+        virtual bool getTickVolLevels(std::array<uint32_t, 2> *value) = 0;
+        virtual bool getClickVolLevels(std::array<uint32_t, 2> *value) = 0;
+        virtual bool getLongVolLevels(std::array<uint32_t, 2> *value) = 0;
+        // Checks if the chirp feature is enabled.
+        virtual bool isChirpEnabled() = 0;
+        // Obtains the supported primitive effects.
+        virtual bool getSupportedPrimitives(uint32_t *value) = 0;
+        // Checks if the f0 compensation feature needs to be enabled.
+        virtual bool isF0CompEnabled() = 0;
+        // Checks if the redc compensation feature needs to be enabled.
+        virtual bool isRedcCompEnabled() = 0;
+        // Emit diagnostic information to the given file.
+        virtual void debug(int fd) = 0;
+    };
+
+  public:
+    Vibrator(std::unique_ptr<HwApi> hwapi, std::unique_ptr<HwCal> hwcal);
+
+    ndk::ScopedAStatus getCapabilities(int32_t *_aidl_return) override;
+    ndk::ScopedAStatus off() override;
+    ndk::ScopedAStatus on(int32_t timeoutMs,
+                          const std::shared_ptr<IVibratorCallback> &callback) override;
+    ndk::ScopedAStatus perform(Effect effect, EffectStrength strength,
+                               const std::shared_ptr<IVibratorCallback> &callback,
+                               int32_t *_aidl_return) override;
+    ndk::ScopedAStatus getSupportedEffects(std::vector<Effect> *_aidl_return) override;
+    ndk::ScopedAStatus setAmplitude(float amplitude) override;
+    ndk::ScopedAStatus setExternalControl(bool enabled) override;
+    ndk::ScopedAStatus getCompositionDelayMax(int32_t *maxDelayMs);
+    ndk::ScopedAStatus getCompositionSizeMax(int32_t *maxSize);
+    ndk::ScopedAStatus getSupportedPrimitives(std::vector<CompositePrimitive> *supported) override;
+    ndk::ScopedAStatus getPrimitiveDuration(CompositePrimitive primitive,
+                                            int32_t *durationMs) override;
+    ndk::ScopedAStatus compose(const std::vector<CompositeEffect> &composite,
+                               const std::shared_ptr<IVibratorCallback> &callback) override;
+    ndk::ScopedAStatus getSupportedAlwaysOnEffects(std::vector<Effect> *_aidl_return) override;
+    ndk::ScopedAStatus alwaysOnEnable(int32_t id, Effect effect, EffectStrength strength) override;
+    ndk::ScopedAStatus alwaysOnDisable(int32_t id) override;
+    ndk::ScopedAStatus getResonantFrequency(float *resonantFreqHz) override;
+    ndk::ScopedAStatus getQFactor(float *qFactor) override;
+    ndk::ScopedAStatus getFrequencyResolution(float *freqResolutionHz) override;
+    ndk::ScopedAStatus getFrequencyMinimum(float *freqMinimumHz) override;
+    ndk::ScopedAStatus getBandwidthAmplitudeMap(std::vector<float> *_aidl_return) override;
+    ndk::ScopedAStatus getPwlePrimitiveDurationMax(int32_t *durationMs) override;
+    ndk::ScopedAStatus getPwleCompositionSizeMax(int32_t *maxSize) override;
+    ndk::ScopedAStatus getSupportedBraking(std::vector<Braking> *supported) override;
+    ndk::ScopedAStatus composePwle(const std::vector<PrimitivePwle> &composite,
+                                   const std::shared_ptr<IVibratorCallback> &callback) override;
+
+    binder_status_t dump(int fd, const char **args, uint32_t numArgs) override;
+
+  private:
+    ndk::ScopedAStatus on(uint32_t timeoutMs, uint32_t effectIndex, struct dspmem_chunk *ch,
+                          const std::shared_ptr<IVibratorCallback> &callback);
+    // set 'amplitude' based on an arbitrary scale determined by 'maximum'
+    ndk::ScopedAStatus setEffectAmplitude(float amplitude, float maximum, bool scalable);
+    ndk::ScopedAStatus setGlobalAmplitude(bool set);
+    // 'simple' effects are those precompiled and loaded into the controller
+    ndk::ScopedAStatus getSimpleDetails(Effect effect, EffectStrength strength,
+                                        uint32_t *outEffectIndex, uint32_t *outTimeMs,
+                                        uint32_t *outVolLevel);
+    // 'compound' effects are those composed by stringing multiple 'simple' effects
+    ndk::ScopedAStatus getCompoundDetails(Effect effect, EffectStrength strength,
+                                          uint32_t *outTimeMs, struct dspmem_chunk *outCh);
+    ndk::ScopedAStatus getPrimitiveDetails(CompositePrimitive primitive, uint32_t *outEffectIndex);
+    ndk::ScopedAStatus performEffect(Effect effect, EffectStrength strength,
+                                     const std::shared_ptr<IVibratorCallback> &callback,
+                                     int32_t *outTimeMs);
+    ndk::ScopedAStatus performEffect(uint32_t effectIndex, uint32_t volLevel,
+                                     struct dspmem_chunk *ch,
+                                     const std::shared_ptr<IVibratorCallback> &callback);
+    ndk::ScopedAStatus setPwle(const std::string &pwleQueue);
+    bool isUnderExternalControl();
+    void waitForComplete(std::shared_ptr<IVibratorCallback> &&callback);
+    uint32_t intensityToVolLevel(float intensity, uint32_t effectIndex);
+    bool findHapticAlsaDevice(int *card, int *device);
+    bool hasHapticAlsaDevice();
+    bool enableHapticPcmAmp(struct pcm **haptic_pcm, bool enable, int card, int device);
+    uint16_t amplitudeToScale(float amplitude, float maximum, bool scalable);
+    void updateContext();
+
+    std::unique_ptr<HwApi> mHwApi;
+    std::unique_ptr<HwCal> mHwCal;
+    uint32_t mF0Offset;
+    std::array<uint32_t, 2> mTickEffectVol;
+    std::array<uint32_t, 2> mClickEffectVol;
+    std::array<uint32_t, 2> mLongEffectVol;
+    std::vector<ff_effect> mFfEffects;
+    std::vector<uint32_t> mEffectDurations;
+    std::future<void> mAsyncHandle;
+    ::android::base::unique_fd mInputFd;
+    int8_t mActiveId{-1};
+    struct pcm *mHapticPcm;
+    int mCard;
+    int mDevice;
+    bool mHasHapticAlsaDevice{false};
+    bool mIsUnderExternalControl;
+    float mLongEffectScale = 1.0;
+    bool mIsChirpEnabled;
+    uint32_t mScaleTime;
+    bool mFadeEnable;
+    uint32_t mScalingFactor;
+    uint32_t mScaleCooldown;
+    bool mContextEnable;
+    uint32_t mSupportedPrimitivesBits = 0x0;
+    std::vector<CompositePrimitive> mSupportedPrimitives;
+    bool mConfigHapticAlsaDeviceDone{false};
+};
+
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.rc b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.rc
new file mode 100644
index 0000000..6986d1a
--- /dev/null
+++ b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.rc
@@ -0,0 +1,47 @@
+on property:vendor.all.modules.ready=1
+    wait /sys/bus/i2c/devices/i2c-cs40l26a/calibration/redc_cal_time_ms
+
+    mkdir /mnt/vendor/persist/haptics 0770 system system
+    chmod 770 /mnt/vendor/persist/haptics
+    chmod 440 /mnt/vendor/persist/haptics/cs40l26.cal
+    chown system system /mnt/vendor/persist/haptics
+    chown system system /mnt/vendor/persist/haptics/cs40l26.cal
+
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/calibration/f0_stored
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/calibration/q_stored
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/calibration/redc_stored
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/vibe_state
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/num_waves
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/f0_offset
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/owt_free_space
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/f0_comp_enable
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/redc_comp_enable
+    chown system system /sys/bus/i2c/devices/i2c-cs40l26a/default/delay_before_stop_playback_us
+
+    enable vendor.vibrator.cs40l26
+
+service vendor.vibrator.cs40l26 /vendor/bin/hw/android.hardware.vibrator-service.cs40l26-private-lynx
+    class hal
+    user system
+    group system input context_hub
+
+    setenv INPUT_EVENT_NAME cs40l26_input
+    setenv INPUT_EVENT_PATH /dev/input/event*
+    setenv PROPERTY_PREFIX ro.vendor.vibrator.hal.
+    setenv CALIBRATION_FILEPATH /mnt/vendor/persist/haptics/cs40l26.cal
+
+    setenv HWAPI_PATH_PREFIX /sys/bus/i2c/devices/i2c-cs40l26a/
+    setenv HWAPI_DEBUG_PATHS "
+        calibration/f0_stored
+        calibration/redc_stored
+        calibration/q_stored
+        default/vibe_state
+        default/num_waves
+        default/f0_offset
+        default/owt_free_space
+        default/f0_comp_enable
+        default/redc_comp_enable
+        default/delay_before_stop_playback_us
+        "
+
+    disabled
diff --git a/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.xml b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.xml
new file mode 100644
index 0000000..4db8f8c
--- /dev/null
+++ b/vibrator/cs40l26/android.hardware.vibrator-service.cs40l26-private-lynx.xml
@@ -0,0 +1,7 @@
+<manifest version="1.0" type="device">
+    <hal format="aidl">
+        <name>android.hardware.vibrator</name>
+        <version>2</version>
+        <fqname>IVibrator/default</fqname>
+    </hal>
+</manifest>
diff --git a/vibrator/cs40l26/device.mk b/vibrator/cs40l26/device.mk
new file mode 100644
index 0000000..68860ef
--- /dev/null
+++ b/vibrator/cs40l26/device.mk
@@ -0,0 +1,6 @@
+PRODUCT_PACKAGES += \
+    android.hardware.vibrator-service.cs40l26-private-lynx
+
+BOARD_SEPOLICY_DIRS += \
+    hardware/google/pixel-sepolicy/vibrator/common \
+    hardware/google/pixel-sepolicy/vibrator/cs40l26
diff --git a/vibrator/cs40l26/inc/CapoDetector.h b/vibrator/cs40l26/inc/CapoDetector.h
new file mode 100644
index 0000000..4b898ef
--- /dev/null
+++ b/vibrator/cs40l26/inc/CapoDetector.h
@@ -0,0 +1,107 @@
+/*
+ * Copyright 2022 Google LLC. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <chre_host/host_protocol_host.h>
+#include <chre_host/socket_client.h>
+
+#include "proto/capo.pb.h"
+
+using android::sp;
+using android::chre::HostProtocolHost;
+using android::chre::IChreMessageHandlers;
+using android::chre::SocketClient;
+
+// following convention of CHRE code.
+namespace fbs = ::chre::fbs;
+
+namespace android {
+namespace chre {
+
+#define NS_FROM_MS(x) ((x)*1000000)
+
+struct CapoMDParams {
+    uint64_t still_time_threshold_ns;
+    uint32_t window_width_ns;
+    float motion_confidence_threshold;
+    float still_confidence_threshold;
+    float var_threshold;
+    float var_threshold_delta;
+};
+
+class CapoDetector : public android::chre::SocketClient::ICallbacks,
+                     public android::chre::IChreMessageHandlers,
+                     public android::chre::SocketClient {
+  public:
+    // Typedef declaration for callback function.
+    typedef std::function<void(uint8_t)> cb_fn_t;
+
+    // Called when initializing connection with CHRE socket.
+    static android::sp<CapoDetector> start();
+    // Called when the socket is successfully (re-)connected.
+    // Reset the position and try to send NanoappList request.
+    void onConnected() override;
+    // Called when we have failed to (re-)connect the socket after many attempts
+    // and are giving up.
+    void onConnectionAborted() override;
+    // Invoked when the socket is disconnected, and this connection loss
+    // was not the result of an explicit call to disconnect().
+    // Reset the position while disconnecting.
+    void onDisconnected() override;
+    // Decode unix socket msgs to CHRE messages, and call the appropriate
+    // callback depending on the CHRE message.
+    void onMessageReceived(const void *data, size_t length) override;
+    // Listen for messages from capo nanoapp and handle the message.
+    void handleNanoappMessage(const ::chre::fbs::NanoappMessageT &message) override;
+    // Handle the response of a NanoappList request.
+    // Ensure that capo nanoapp is running.
+    void handleNanoappListResponse(const ::chre::fbs::NanoappListResponseT &response) override;
+    // Send enabling message to the nanoapp.
+    void enable();
+
+    // Get last carried position type.
+    uint8_t getCarriedPosition() { return last_position_type_; }
+    // Get the host endpoint.
+    uint16_t getHostEndPoint() { return kHostEndpoint; }
+    // Get the capo nanoapp ID.
+    uint64_t getNanoppAppId() { return kCapoNanoappId; }
+    // Set up callback_func_ if needed.
+    void setCallback(cb_fn_t cb) { callback_func_ = cb; }
+
+  private:
+    // Nanoapp ID of capo, ref: go/nanoapp-id-tracker.
+    static constexpr uint64_t kCapoNanoappId = 0x476f6f676c001020ULL;
+    // String of socket name for connecting chre.
+    static constexpr char kChreSocketName[] = "chre";
+    // The host endpoint we use when sending message.
+    // Set with 0x9020 based on 0x8000 AND capo_app_id(1020).
+    // Ref: go/host-endpoint-id-tracker.
+    static constexpr uint16_t kHostEndpoint = 0x9020;
+    // Using for hal layer callback function.
+    cb_fn_t callback_func_ = nullptr;
+    // Last carried position received from the nano app
+    capo::PositionType last_position_type_ = capo::PositionType::UNKNOWN;
+    // Motion detector parameters for host-driven capo config
+    const struct CapoMDParams mCapoDetectorMDParameters {
+        .still_time_threshold_ns = NS_FROM_MS(500),
+        .window_width_ns = NS_FROM_MS(100),
+        .motion_confidence_threshold = 0.98f,
+        .still_confidence_threshold = 0.99f,
+        .var_threshold = 0.0125f,
+        .var_threshold_delta = 0.0125f,
+    };
+};
+
+}  // namespace chre
+}  // namespace android
diff --git a/vibrator/cs40l26/proto/capo.proto b/vibrator/cs40l26/proto/capo.proto
new file mode 100644
index 0000000..00b3186
--- /dev/null
+++ b/vibrator/cs40l26/proto/capo.proto
@@ -0,0 +1,148 @@
+syntax = "proto3";
+
+package capo;
+
+// The message types used in capo nanoapp. Some of them are H2C
+// (Host-To-CHRE) and others are C2H (CHRE-To-Host). One message type must be
+// either H2C or C2H. Each message type can choose to have payload or not.
+enum MessageType {
+  // Explicitly prevents 0 from being used as a valid message type.
+  // Doing so protects from obscure bugs caused by default-initialized values.
+  INVALID = 0;
+
+  // Detector configuration related message start from 100.
+  // Signal for host to acknowledge the notification.
+  // It contains AckNotification payload.
+  ACK_NOTIFICATION = 100;
+
+  // Signal to enable the carried position detector for device. No payload.
+  ENABLE_DETECTOR = 101;
+
+  // Signal to disable the carried position detector for device. No payload.
+  DISABLE_DETECTOR = 102;
+
+  // Signal to request most recent carried position detector state. No payload.
+  REQUEST_UPDATE = 103;
+
+  // Signal to force carried position detector to refresh state. No payload.
+  FORCE_UPDATE = 104;
+
+  // Configure the detector with desired parameters. ConfigureDetector payload.
+  CONFIGURE_DETECTOR = 105;
+
+  // Position Detection related message start from 200.
+  // Signal while carried position of device detected.
+  // It contains PositionDetected payload.
+  POSITION_DETECTED = 200;
+}
+
+// Notification Type.
+enum NotificationType {
+  // Explicitly prevents 0 from being used as a valid notification type.
+  // Doing so protects from obscure bugs caused by default-initialized values.
+  INVALID_NOTIFICATION = 0;
+
+  // Notification of enabling the carried position detector for device.
+  ENABLE_NOTIFICATION = 1;
+
+  // Notification of disabling the carried position detector for device.
+  DISABLE_NOTIFICATION = 2;
+
+  // Notification of request update from the carried position detector.
+  REQUEST_UPDATE_NOTIFICATION = 3;
+
+  // Notification of force update from the carried position detector.
+  FORCE_UPDATE_NOTIFICATION = 4;
+
+  // Notification of configure message.
+  CONFIGURE_NOTIFICATION = 5;
+}
+
+// This message type used for host to acknowledge the notification.
+message AckNotification {
+  // Sent a notification type for host to acknowledge.
+  NotificationType notification_type = 1;
+}
+
+// Position type.
+enum PositionType {
+  // Explicitly prevents 0 from being used as a valid carried position type.
+  // Doing so protects from obscure bugs caused by default-initialized values.
+  UNKNOWN = 0;
+
+  // Carried position while device is in motion.
+  IN_MOTION = 1;
+
+  // Carried position while device is on table and faces up.
+  ON_TABLE_FACE_UP = 2;
+
+  // Carried position while device is on table and faces down.
+  ON_TABLE_FACE_DOWN = 3;
+
+  // Carried position while device is stationary in unknown orientation.
+  STATIONARY_UNKNOWN = 4;
+}
+
+// This message type used to notify host a position was a detected.
+message PositionDetected {
+  // Sent a position type that is defined in PositionTypes.
+  PositionType position_type = 1;
+}
+
+// Predefined configurations for detector.
+enum ConfigPresetType {
+  // Explicitly prevents 0 from being used as a valid type.
+  // Doing so protects from obscure bugs caused by default-initialized values.
+  CONFIG_PRESET_UNSPECIFIED = 0;
+
+  // Default preset.
+  CONFIG_PRESET_DEFAULT = 1;
+
+  // Preset for sticky-stationary behavior.
+  CONFIG_PRESET_STICKY_STATIONARY = 2;
+}
+
+message ConfigureDetector {
+  // Ref: cs/location/lbs/contexthub/nanoapps/motiondetector/motion_detector.h
+  message ConfigData {
+    // These algo parameters are exposed to enable tuning via server flags.
+    // The amount of time that the algorithm's computed stillness confidence
+    // must exceed still_confidence_threshold before entering the stationary
+    // state. Increasing this value will make the algorithm take longer to
+    // transition from the in motion state to the stationary state.
+    uint64 still_time_threshold_nanosecond = 1;
+
+    // The amount of time in which the variance should be averaged. Increasing
+    // this value will effectively smooth the input data, making the algorithm
+    // less likely to transition between states.
+    uint32 window_width_nanosecond = 2;
+
+    // The required confidence that the device is in motion before entering the
+    // motion state. Valid range is [0.0, 1.0], where 1.0 indicates that the
+    // algorithm must be 100% certain that the device is moving before entering
+    // the motion state. If the Instant Motion sensor is triggered, this value
+    // is ignored and the algorithm is immediately transitioned into the in
+    // motion state.
+    float motion_confidence_threshold = 3;
+
+    // The required confidence that the device is stationary before entering the
+    // stationary state. Valid range is [0.0, 1.0], where 1.0 indicates that the
+    // algorithm must be 100% certain that the device is stationary before
+    // entering the stationary state.
+    float still_confidence_threshold = 4;
+
+    // The variance threshold for the StillnessDetector algorithm. Increasing
+    // this value causes the algorithm to be less likely to detect motion.
+    float var_threshold = 5;
+
+    // The variance threshold delta for the StillnessDetector algorithm about
+    // which the stationary confidence is calculated. Valid range is
+    // [0.0, var_threshold].
+    float var_threshold_delta = 6;
+  }
+
+  oneof type {
+    ConfigPresetType preset_type = 1;
+    ConfigData config_data = 2;
+  }
+}
diff --git a/vibrator/cs40l26/service.cpp b/vibrator/cs40l26/service.cpp
new file mode 100644
index 0000000..27173d9
--- /dev/null
+++ b/vibrator/cs40l26/service.cpp
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <android/binder_manager.h>
+#include <android/binder_process.h>
+#include <binder/IServiceManager.h>
+#include <binder/ProcessState.h>
+#include <log/log.h>
+
+#include "Hardware.h"
+#include "Vibrator.h"
+
+using ::aidl::android::hardware::vibrator::HwApi;
+using ::aidl::android::hardware::vibrator::HwCal;
+using ::aidl::android::hardware::vibrator::Vibrator;
+using ::android::defaultServiceManager;
+using ::android::ProcessState;
+using ::android::sp;
+using ::android::String16;
+
+#if !defined(VIBRATOR_NAME)
+#define VIBRATOR_NAME "default"
+#endif
+
+int main() {
+    auto svc = ndk::SharedRefBase::make<Vibrator>(std::make_unique<HwApi>(),
+                                                  std::make_unique<HwCal>());
+    const auto svcName = std::string() + svc->descriptor + "/" + VIBRATOR_NAME;
+
+    ProcessState::initWithDriver("/dev/vndbinder");
+
+    auto svcBinder = svc->asBinder();
+    binder_status_t status = AServiceManager_addService(svcBinder.get(), svcName.c_str());
+    LOG_ALWAYS_FATAL_IF(status != STATUS_OK);
+
+    ProcessState::self()->setThreadPoolMaxThreadCount(1);
+    ProcessState::self()->startThreadPool();
+
+    ABinderProcess_setThreadPoolMaxThreadCount(0);
+    ABinderProcess_joinThreadPool();
+
+    return EXIT_FAILURE;  // should not reach
+}
diff --git a/vibrator/cs40l26/tests/Android.bp b/vibrator/cs40l26/tests/Android.bp
new file mode 100644
index 0000000..c53ec23
--- /dev/null
+++ b/vibrator/cs40l26/tests/Android.bp
@@ -0,0 +1,35 @@
+//
+// Copyright (C) 2022 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+package {
+    default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+cc_test {
+    name: "VibratorHalCs40l26TestSuitePrivateLynx",
+    defaults: ["VibratorHalCs40l26TestDefaultsPrivateLynx"],
+    srcs: [
+        "test-hwcal.cpp",
+	"test-hwapi.cpp",
+	"test-vibrator.cpp",
+    ],
+    static_libs: [
+        "libc++fs",
+        "libgmock",
+    ],
+    shared_libs: [
+        "libbase",
+    ],
+}
diff --git a/vibrator/cs40l26/tests/mocks.h b/vibrator/cs40l26/tests/mocks.h
new file mode 100644
index 0000000..5ba0270
--- /dev/null
+++ b/vibrator/cs40l26/tests/mocks.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2022 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ANDROID_HARDWARE_VIBRATOR_TEST_MOCKS_H
+#define ANDROID_HARDWARE_VIBRATOR_TEST_MOCKS_H
+
+#include <aidl/android/hardware/vibrator/BnVibratorCallback.h>
+
+#include "Vibrator.h"
+
+class MockApi : public ::aidl::android::hardware::vibrator::Vibrator::HwApi {
+  public:
+    MOCK_METHOD0(destructor, void());
+    MOCK_METHOD1(setF0, bool(std::string value));
+    MOCK_METHOD1(setF0Offset, bool(uint32_t value));
+    MOCK_METHOD1(setRedc, bool(std::string value));
+    MOCK_METHOD1(setQ, bool(std::string value));
+    MOCK_METHOD1(getEffectCount, bool(uint32_t *value));
+    MOCK_METHOD2(pollVibeState, bool(uint32_t value, int32_t timeoutMs));
+    MOCK_METHOD0(hasOwtFreeSpace, bool());
+    MOCK_METHOD1(getOwtFreeSpace, bool(uint32_t *value));
+    MOCK_METHOD1(setF0CompEnable, bool(bool value));
+    MOCK_METHOD1(setRedcCompEnable, bool(bool value));
+    MOCK_METHOD1(setMinOnOffInterval, bool(uint32_t value));
+    MOCK_METHOD0(getContextScale, uint32_t());
+    MOCK_METHOD0(getContextEnable, bool());
+    MOCK_METHOD0(getContextSettlingTime, uint32_t());
+    MOCK_METHOD0(getContextCooldownTime, uint32_t());
+    MOCK_METHOD0(getContextFadeEnable, bool());
+    MOCK_METHOD2(setFFGain, bool(int fd, uint16_t value));
+    MOCK_METHOD3(setFFEffect, bool(int fd, struct ff_effect *effect, uint16_t timeoutMs));
+    MOCK_METHOD3(setFFPlay, bool(int fd, int8_t index, bool value));
+    MOCK_METHOD2(getHapticAlsaDevice, bool(int *card, int *device));
+    MOCK_METHOD4(setHapticPcmAmp, bool(struct pcm **haptic_pcm, bool enable, int card, int device));
+    MOCK_METHOD6(uploadOwtEffect,
+                 bool(int fd, uint8_t *owtData, uint32_t numBytes, struct ff_effect *effect,
+                      uint32_t *outEffectIndex, int *status));
+    MOCK_METHOD3(eraseOwtEffect, bool(int fd, int8_t effectIndex, std::vector<ff_effect> *effect));
+    MOCK_METHOD1(debug, void(int fd));
+
+    ~MockApi() override { destructor(); };
+};
+
+class MockCal : public ::aidl::android::hardware::vibrator::Vibrator::HwCal {
+  public:
+    MOCK_METHOD0(destructor, void());
+    MOCK_METHOD1(getVersion, bool(uint32_t *value));
+    MOCK_METHOD1(getF0, bool(std::string &value));
+    MOCK_METHOD1(getRedc, bool(std::string &value));
+    MOCK_METHOD1(getQ, bool(std::string &value));
+    MOCK_METHOD1(getLongFrequencyShift, bool(int32_t *value));
+    MOCK_METHOD1(getTickVolLevels, bool(std::array<uint32_t, 2> *value));
+    MOCK_METHOD1(getClickVolLevels, bool(std::array<uint32_t, 2> *value));
+    MOCK_METHOD1(getLongVolLevels, bool(std::array<uint32_t, 2> *value));
+    MOCK_METHOD0(isChirpEnabled, bool());
+    MOCK_METHOD1(getSupportedPrimitives, bool(uint32_t *value));
+    MOCK_METHOD0(isF0CompEnabled, bool());
+    MOCK_METHOD0(isRedcCompEnabled, bool());
+    MOCK_METHOD1(debug, void(int fd));
+
+    ~MockCal() override { destructor(); };
+    // b/132668253: Workaround gMock Compilation Issue
+    bool getF0(std::string *value) { return getF0(*value); }
+    bool getRedc(std::string *value) { return getRedc(*value); }
+    bool getQ(std::string *value) { return getQ(*value); }
+};
+
+class MockVibratorCallback : public aidl::android::hardware::vibrator::BnVibratorCallback {
+  public:
+    MOCK_METHOD(ndk::ScopedAStatus, onComplete, ());
+};
+
+#endif  // ANDROID_HARDWARE_VIBRATOR_TEST_MOCKS_H
diff --git a/vibrator/cs40l26/tests/test-hwapi.cpp b/vibrator/cs40l26/tests/test-hwapi.cpp
new file mode 100644
index 0000000..cc4d465
--- /dev/null
+++ b/vibrator/cs40l26/tests/test-hwapi.cpp
@@ -0,0 +1,288 @@
+/*
+ * Copyright (C) 2022 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <android-base/file.h>
+#include <cutils/fs.h>
+#include <gtest/gtest.h>
+
+#include <cstdlib>
+#include <fstream>
+
+#include "Hardware.h"
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+
+using ::testing::Test;
+using ::testing::TestParamInfo;
+using ::testing::ValuesIn;
+using ::testing::WithParamInterface;
+
+class HwApiTest : public Test {
+  private:
+    static constexpr const char *FILE_NAMES[]{
+            "calibration/f0_stored",
+            "default/f0_offset",
+            "calibration/redc_stored",
+            "calibration/q_stored",
+            "default/f0_comp_enable",
+            "default/redc_comp_enable",
+            "default/owt_free_space",
+            "default/num_waves",
+            "default/delay_before_stop_playback_us",
+    };
+
+  public:
+    void SetUp() override {
+        std::string prefix;
+        for (auto n : FILE_NAMES) {
+            auto name = std::filesystem::path(n);
+            auto path = std::filesystem::path(mFilesDir.path) / name;
+            fs_mkdirs(path.c_str(), S_IRWXU);
+            std::ofstream touch{path};
+            mFileMap[name] = path;
+        }
+        prefix = std::filesystem::path(mFilesDir.path) / "";
+        setenv("HWAPI_PATH_PREFIX", prefix.c_str(), true);
+        mHwApi = std::make_unique<HwApi>();
+
+        for (auto n : FILE_NAMES) {
+            auto name = std::filesystem::path(n);
+            auto path = std::filesystem::path(mEmptyDir.path) / name;
+        }
+        prefix = std::filesystem::path(mEmptyDir.path) / "";
+        setenv("HWAPI_PATH_PREFIX", prefix.c_str(), true);
+        mNoApi = std::make_unique<HwApi>();
+    }
+
+    void TearDown() override { verifyContents(); }
+
+    static auto ParamNameFixup(std::string str) {
+        std::replace(str.begin(), str.end(), '/', '_');
+        return str;
+    }
+
+  protected:
+    // Set expected file content for a test.
+    template <typename T>
+    void expectContent(const std::string &name, const T &value) {
+        mExpectedContent[name] << value << std::endl;
+    }
+
+    // Set actual file content for an input test.
+    template <typename T>
+    void updateContent(const std::string &name, const T &value) {
+        std::ofstream(mFileMap[name]) << value << std::endl;
+    }
+
+    template <typename T>
+    void expectAndUpdateContent(const std::string &name, const T &value) {
+        expectContent(name, value);
+        updateContent(name, value);
+    }
+
+    // Compare all file contents against expected contents.
+    void verifyContents() {
+        for (auto &a : mFileMap) {
+            std::ifstream file{a.second};
+            std::string expect = mExpectedContent[a.first].str();
+            std::string actual = std::string(std::istreambuf_iterator<char>(file),
+                                             std::istreambuf_iterator<char>());
+            EXPECT_EQ(expect, actual) << a.first;
+        }
+    }
+
+  protected:
+    std::unique_ptr<Vibrator::HwApi> mHwApi;
+    std::unique_ptr<Vibrator::HwApi> mNoApi;
+    std::map<std::string, std::string> mFileMap;
+    TemporaryDir mFilesDir;
+    TemporaryDir mEmptyDir;
+    std::map<std::string, std::stringstream> mExpectedContent;
+};
+
+template <typename T>
+class HwApiTypedTest : public HwApiTest,
+                       public WithParamInterface<std::tuple<std::string, std::function<T>>> {
+  public:
+    static auto PrintParam(const TestParamInfo<typename HwApiTypedTest::ParamType> &info) {
+        return ParamNameFixup(std::get<0>(info.param));
+    }
+    static auto MakeParam(std::string name, std::function<T> func) {
+        return std::make_tuple(name, func);
+    }
+};
+
+using HasTest = HwApiTypedTest<bool(Vibrator::HwApi &)>;
+
+TEST_P(HasTest, success_returnsTrue) {
+    auto param = GetParam();
+    auto func = std::get<1>(param);
+
+    EXPECT_TRUE(func(*mHwApi));
+}
+
+TEST_P(HasTest, success_returnsFalse) {
+    auto param = GetParam();
+    auto func = std::get<1>(param);
+
+    EXPECT_FALSE(func(*mNoApi));
+}
+
+INSTANTIATE_TEST_CASE_P(HwApiTests, HasTest,
+                        ValuesIn({
+                                HasTest::MakeParam("default/owt_free_space",
+                                                   &Vibrator::HwApi::hasOwtFreeSpace),
+                        }),
+                        HasTest::PrintParam);
+
+using GetUint32Test = HwApiTypedTest<bool(Vibrator::HwApi &, uint32_t *)>;
+
+TEST_P(GetUint32Test, success) {
+    auto param = GetParam();
+    auto name = std::get<0>(param);
+    auto func = std::get<1>(param);
+    uint32_t expect = std::rand();
+    uint32_t actual = ~expect;
+
+    expectAndUpdateContent(name, expect);
+
+    EXPECT_TRUE(func(*mHwApi, &actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_P(GetUint32Test, failure) {
+    auto param = GetParam();
+    auto func = std::get<1>(param);
+    uint32_t value;
+
+    EXPECT_FALSE(func(*mNoApi, &value));
+}
+
+INSTANTIATE_TEST_CASE_P(HwApiTests, GetUint32Test,
+                        ValuesIn({
+                                GetUint32Test::MakeParam("default/num_waves",
+                                                         &Vibrator::HwApi::getEffectCount),
+                                GetUint32Test::MakeParam("default/owt_free_space",
+                                                         &Vibrator::HwApi::getOwtFreeSpace),
+                        }),
+                        GetUint32Test::PrintParam);
+
+using SetBoolTest = HwApiTypedTest<bool(Vibrator::HwApi &, bool)>;
+
+TEST_P(SetBoolTest, success_returnsTrue) {
+    auto param = GetParam();
+    auto name = std::get<0>(param);
+    auto func = std::get<1>(param);
+
+    expectContent(name, "1");
+
+    EXPECT_TRUE(func(*mHwApi, true));
+}
+
+TEST_P(SetBoolTest, success_returnsFalse) {
+    auto param = GetParam();
+    auto name = std::get<0>(param);
+    auto func = std::get<1>(param);
+
+    expectContent(name, "0");
+
+    EXPECT_TRUE(func(*mHwApi, false));
+}
+
+TEST_P(SetBoolTest, failure) {
+    auto param = GetParam();
+    auto func = std::get<1>(param);
+
+    EXPECT_FALSE(func(*mNoApi, true));
+    EXPECT_FALSE(func(*mNoApi, false));
+}
+
+INSTANTIATE_TEST_CASE_P(HwApiTests, SetBoolTest,
+                        ValuesIn({
+                                SetBoolTest::MakeParam("default/f0_comp_enable",
+                                                       &Vibrator::HwApi::setF0CompEnable),
+                                SetBoolTest::MakeParam("default/redc_comp_enable",
+                                                       &Vibrator::HwApi::setRedcCompEnable),
+                        }),
+                        SetBoolTest::PrintParam);
+
+using SetUint32Test = HwApiTypedTest<bool(Vibrator::HwApi &, uint32_t)>;
+
+TEST_P(SetUint32Test, success) {
+    auto param = GetParam();
+    auto name = std::get<0>(param);
+    auto func = std::get<1>(param);
+    uint32_t value = std::rand();
+
+    expectContent(name, value);
+
+    EXPECT_TRUE(func(*mHwApi, value));
+}
+
+TEST_P(SetUint32Test, failure) {
+    auto param = GetParam();
+    auto func = std::get<1>(param);
+    uint32_t value = std::rand();
+
+    EXPECT_FALSE(func(*mNoApi, value));
+}
+
+INSTANTIATE_TEST_CASE_P(HwApiTests, SetUint32Test,
+                        ValuesIn({
+                                SetUint32Test::MakeParam("default/f0_offset",
+                                                         &Vibrator::HwApi::setF0Offset),
+                                SetUint32Test::MakeParam("default/delay_before_stop_playback_us",
+                                                         &Vibrator::HwApi::setMinOnOffInterval),
+                        }),
+                        SetUint32Test::PrintParam);
+
+using SetStringTest = HwApiTypedTest<bool(Vibrator::HwApi &, std::string)>;
+
+TEST_P(SetStringTest, success) {
+    auto param = GetParam();
+    auto name = std::get<0>(param);
+    auto func = std::get<1>(param);
+    std::string value = TemporaryFile().path;
+
+    expectContent(name, value);
+
+    EXPECT_TRUE(func(*mHwApi, value));
+}
+
+TEST_P(SetStringTest, failure) {
+    auto param = GetParam();
+    auto func = std::get<1>(param);
+    std::string value = TemporaryFile().path;
+
+    EXPECT_FALSE(func(*mNoApi, value));
+}
+
+INSTANTIATE_TEST_CASE_P(
+        HwApiTests, SetStringTest,
+        ValuesIn({
+                SetStringTest::MakeParam("calibration/f0_stored", &Vibrator::HwApi::setF0),
+                SetStringTest::MakeParam("calibration/redc_stored", &Vibrator::HwApi::setRedc),
+                SetStringTest::MakeParam("calibration/q_stored", &Vibrator::HwApi::setQ),
+        }),
+        SetStringTest::PrintParam);
+
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/cs40l26/tests/test-hwcal.cpp b/vibrator/cs40l26/tests/test-hwcal.cpp
new file mode 100644
index 0000000..e482b6c
--- /dev/null
+++ b/vibrator/cs40l26/tests/test-hwcal.cpp
@@ -0,0 +1,386 @@
+/*
+ * Copyright (C) 2022 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <android-base/file.h>
+#include <gtest/gtest.h>
+
+#include <fstream>
+
+#include "Hardware.h"
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+
+using ::testing::Test;
+
+class HwCalTest : public Test {
+  protected:
+    static constexpr std::array<uint32_t, 2> V_TICK_DEFAULT = {1, 100};
+    static constexpr std::array<uint32_t, 2> V_CLICK_DEFAULT = {1, 100};
+    static constexpr std::array<uint32_t, 2> V_LONG_DEFAULT = {1, 100};
+
+  public:
+    void SetUp() override { setenv("CALIBRATION_FILEPATH", mCalFile.path, true); }
+
+  private:
+    template <typename T>
+    static void pack(std::ostream &stream, const T &value, std::string lpad, std::string rpad) {
+        stream << lpad << value << rpad;
+    }
+
+    template <typename T, typename std::array<T, 0>::size_type N>
+    static void pack(std::ostream &stream, const std::array<T, N> &value, std::string lpad,
+                     std::string rpad) {
+        for (auto &entry : value) {
+            pack(stream, entry, lpad, rpad);
+        }
+    }
+
+  protected:
+    void createHwCal() { mHwCal = std::make_unique<HwCal>(); }
+
+    template <typename T>
+    void write(const std::string key, const T &value, std::string lpad = " ",
+               std::string rpad = "") {
+        std::ofstream calfile{mCalFile.path, std::ios_base::app};
+        calfile << key << ":";
+        pack(calfile, value, lpad, rpad);
+        calfile << std::endl;
+    }
+
+    void unlink() { ::unlink(mCalFile.path); }
+
+  protected:
+    std::unique_ptr<Vibrator::HwCal> mHwCal;
+    TemporaryFile mCalFile;
+};
+
+TEST_F(HwCalTest, f0_measured) {
+    uint32_t randInput = std::rand();
+    std::string expect = std::to_string(randInput);
+    std::string actual = std::to_string(~randInput);
+
+    write("f0_measured", expect);
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getF0(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, f0_missing) {
+    std::string actual;
+
+    createHwCal();
+
+    EXPECT_FALSE(mHwCal->getF0(&actual));
+}
+
+TEST_F(HwCalTest, redc_measured) {
+    uint32_t randInput = std::rand();
+    std::string expect = std::to_string(randInput);
+    std::string actual = std::to_string(~randInput);
+
+    write("redc_measured", expect);
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getRedc(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, redc_missing) {
+    std::string actual;
+
+    createHwCal();
+
+    EXPECT_FALSE(mHwCal->getRedc(&actual));
+}
+
+TEST_F(HwCalTest, q_measured) {
+    uint32_t randInput = std::rand();
+    std::string expect = std::to_string(randInput);
+    std::string actual = std::to_string(~randInput);
+
+    write("q_measured", expect);
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getQ(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, q_missing) {
+    std::string actual;
+
+    createHwCal();
+
+    EXPECT_FALSE(mHwCal->getQ(&actual));
+}
+
+TEST_F(HwCalTest, v_levels) {
+    std::array<uint32_t, 2> expect;
+    std::array<uint32_t, 2> actual;
+
+    // voltage for tick effects
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) {
+        e = std::rand();
+        return ~e;
+    });
+
+    write("v_tick", expect);
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getTickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    // voltage for click effects
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) {
+        e = std::rand();
+        return ~e;
+    });
+
+    write("v_click", expect);
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getClickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    // voltage for long effects
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) {
+        e = std::rand();
+        return ~e;
+    });
+
+    write("v_long", expect);
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getLongVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, v_missing) {
+    std::array<uint32_t, 2> expect = V_TICK_DEFAULT;
+    std::array<uint32_t, 2> actual;
+
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; });
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getTickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_CLICK_DEFAULT;
+
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; });
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getClickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_LONG_DEFAULT;
+
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; });
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getLongVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, v_short) {
+    std::array<uint32_t, 2> expect = V_TICK_DEFAULT;
+    std::array<uint32_t, 2> actual;
+
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; });
+
+    write("v_tick", std::array<uint32_t, expect.size() - 1>());
+    write("v_click", std::array<uint32_t, expect.size() - 1>());
+    write("v_long", std::array<uint32_t, expect.size() - 1>());
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getTickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_CLICK_DEFAULT;
+    EXPECT_TRUE(mHwCal->getClickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_LONG_DEFAULT;
+    EXPECT_TRUE(mHwCal->getLongVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, v_long) {
+    std::array<uint32_t, 2> expect = V_TICK_DEFAULT;
+    std::array<uint32_t, 2> actual;
+
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; });
+
+    write("v_tick", std::array<uint32_t, expect.size() + 1>());
+    write("v_click", std::array<uint32_t, expect.size() + 1>());
+    write("v_long", std::array<uint32_t, expect.size() + 1>());
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getTickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_CLICK_DEFAULT;
+    EXPECT_TRUE(mHwCal->getClickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_LONG_DEFAULT;
+    EXPECT_TRUE(mHwCal->getLongVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, v_nofile) {
+    std::array<uint32_t, 2> expect = V_TICK_DEFAULT;
+    std::array<uint32_t, 2> actual;
+
+    std::transform(expect.begin(), expect.end(), actual.begin(), [](uint32_t &e) { return ~e; });
+
+    write("v_tick", actual);
+    write("v_click", actual);
+    write("v_long", actual);
+    unlink();
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getTickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_CLICK_DEFAULT;
+    EXPECT_TRUE(mHwCal->getClickVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+
+    expect = V_LONG_DEFAULT;
+    EXPECT_TRUE(mHwCal->getLongVolLevels(&actual));
+    EXPECT_EQ(expect, actual);
+}
+
+TEST_F(HwCalTest, multiple) {
+    uint32_t randInput = std::rand();
+    std::string f0Expect = std::to_string(randInput);
+    std::string f0Actual = std::to_string(~randInput);
+    randInput = std::rand();
+    std::string redcExpect = std::to_string(randInput);
+    std::string redcActual = std::to_string(~randInput);
+    randInput = std::rand();
+    std::string qExpect = std::to_string(randInput);
+    std::string qActual = std::to_string(~randInput);
+    std::array<uint32_t, 2> volTickExpect, volClickExpect, volLongExpect;
+    std::array<uint32_t, 2> volActual;
+
+    std::transform(volTickExpect.begin(), volTickExpect.end(), volActual.begin(), [](uint32_t &e) {
+        e = std::rand();
+        return ~e;
+    });
+
+    write("f0_measured", f0Expect);
+    write("redc_measured", redcExpect);
+    write("q_measured", qExpect);
+    write("v_tick", volTickExpect);
+    std::transform(volClickExpect.begin(), volClickExpect.end(), volActual.begin(),
+                   [](uint32_t &e) {
+                       e = std::rand();
+                       return ~e;
+                   });
+    write("v_click", volClickExpect);
+    std::transform(volLongExpect.begin(), volLongExpect.end(), volActual.begin(), [](uint32_t &e) {
+        e = std::rand();
+        return ~e;
+    });
+    write("v_long", volLongExpect);
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getF0(&f0Actual));
+    EXPECT_EQ(f0Expect, f0Actual);
+    EXPECT_TRUE(mHwCal->getRedc(&redcActual));
+    EXPECT_EQ(redcExpect, redcActual);
+    EXPECT_TRUE(mHwCal->getQ(&qActual));
+    EXPECT_EQ(qExpect, qActual);
+    EXPECT_TRUE(mHwCal->getTickVolLevels(&volActual));
+    EXPECT_EQ(volTickExpect, volActual);
+    EXPECT_TRUE(mHwCal->getClickVolLevels(&volActual));
+    EXPECT_EQ(volClickExpect, volActual);
+    EXPECT_TRUE(mHwCal->getLongVolLevels(&volActual));
+    EXPECT_EQ(volLongExpect, volActual);
+}
+
+TEST_F(HwCalTest, trimming) {
+    uint32_t randInput = std::rand();
+    std::string f0Expect = std::to_string(randInput);
+    std::string f0Actual = std::to_string(~randInput);
+    randInput = std::rand();
+    std::string redcExpect = std::to_string(randInput);
+    std::string redcActual = std::to_string(randInput);
+    randInput = std::rand();
+    std::string qExpect = std::to_string(randInput);
+    std::string qActual = std::to_string(randInput);
+    std::array<uint32_t, 2> volTickExpect, volClickExpect, volLongExpect;
+    std::array<uint32_t, 2> volActual;
+
+    std::transform(volTickExpect.begin(), volTickExpect.end(), volActual.begin(), [](uint32_t &e) {
+        e = std::rand();
+        return ~e;
+    });
+
+    write("f0_measured", f0Expect, " \t", "\t ");
+    write("redc_measured", redcExpect, " \t", "\t ");
+    write("q_measured", qExpect, " \t", "\t ");
+    write("v_tick", volTickExpect, " \t", "\t ");
+    std::transform(volClickExpect.begin(), volClickExpect.end(), volActual.begin(),
+                   [](uint32_t &e) {
+                       e = std::rand();
+                       return ~e;
+                   });
+    write("v_click", volClickExpect, " \t", "\t ");
+    std::transform(volLongExpect.begin(), volLongExpect.end(), volActual.begin(), [](uint32_t &e) {
+        e = std::rand();
+        return ~e;
+    });
+    write("v_long", volLongExpect, " \t", "\t ");
+
+    createHwCal();
+
+    EXPECT_TRUE(mHwCal->getF0(&f0Actual));
+    EXPECT_EQ(f0Expect, f0Actual);
+    EXPECT_TRUE(mHwCal->getRedc(&redcActual));
+    EXPECT_EQ(redcExpect, redcActual);
+    EXPECT_TRUE(mHwCal->getQ(&qActual));
+    EXPECT_EQ(qExpect, qActual);
+    EXPECT_TRUE(mHwCal->getTickVolLevels(&volActual));
+    EXPECT_EQ(volTickExpect, volActual);
+    EXPECT_TRUE(mHwCal->getClickVolLevels(&volActual));
+    EXPECT_EQ(volClickExpect, volActual);
+    EXPECT_TRUE(mHwCal->getLongVolLevels(&volActual));
+    EXPECT_EQ(volLongExpect, volActual);
+}
+
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/cs40l26/tests/test-vibrator.cpp b/vibrator/cs40l26/tests/test-vibrator.cpp
new file mode 100644
index 0000000..603ef5e
--- /dev/null
+++ b/vibrator/cs40l26/tests/test-vibrator.cpp
@@ -0,0 +1,692 @@
+/*
+ * Copyright (C) 2022 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <aidl/android/hardware/vibrator/BnVibratorCallback.h>
+#include <android-base/logging.h>
+#include <gmock/gmock.h>
+#include <gtest/gtest.h>
+#include <linux/input.h>
+#include <linux/uinput.h>
+
+#include <future>
+
+#include "Vibrator.h"
+#include "mocks.h"
+#include "types.h"
+#include "utils.h"
+
+namespace aidl {
+namespace android {
+namespace hardware {
+namespace vibrator {
+
+using ::testing::_;
+using ::testing::AnyNumber;
+using ::testing::Assign;
+using ::testing::AtLeast;
+using ::testing::AtMost;
+using ::testing::Combine;
+using ::testing::DoAll;
+using ::testing::DoDefault;
+using ::testing::Exactly;
+using ::testing::Expectation;
+using ::testing::ExpectationSet;
+using ::testing::Ge;
+using ::testing::Mock;
+using ::testing::MockFunction;
+using ::testing::Range;
+using ::testing::Return;
+using ::testing::Sequence;
+using ::testing::SetArgPointee;
+using ::testing::SetArgReferee;
+using ::testing::Test;
+using ::testing::TestParamInfo;
+using ::testing::ValuesIn;
+using ::testing::WithParamInterface;
+
+// Forward Declarations
+
+static EffectQueue Queue(const QueueEffect &effect);
+static EffectQueue Queue(const QueueDelay &delay);
+template <typename T, typename U, typename... Args>
+static EffectQueue Queue(const T &first, const U &second, Args... rest);
+
+static EffectLevel Level(float intensity, float levelLow, float levelHigh);
+static EffectScale Scale(float intensity, float levelLow, float levelHigh);
+
+// Constants With Arbitrary Values
+
+static constexpr uint32_t CAL_VERSION = 2;
+static constexpr std::array<EffectLevel, 2> V_TICK_DEFAULT = {1, 100};
+static constexpr std::array<EffectLevel, 2> V_CLICK_DEFAULT{1, 100};
+static constexpr std::array<EffectLevel, 2> V_LONG_DEFAULT{1, 100};
+static constexpr std::array<EffectDuration, 14> EFFECT_DURATIONS{
+        0, 100, 30, 1000, 300, 130, 150, 500, 100, 15, 20, 1000, 1000, 1000};
+
+// Constants With Prescribed Values
+
+static const std::map<Effect, EffectIndex> EFFECT_INDEX{
+        {Effect::CLICK, 2},
+        {Effect::TICK, 2},
+        {Effect::HEAVY_CLICK, 2},
+        {Effect::TEXTURE_TICK, 9},
+};
+static constexpr uint32_t MIN_ON_OFF_INTERVAL_US = 8500;
+static constexpr uint8_t VOLTAGE_SCALE_MAX = 100;
+static constexpr int8_t MAX_COLD_START_LATENCY_MS = 6;  // I2C Transaction + DSP Return-From-Standby
+static constexpr auto POLLING_TIMEOUT = 20;
+enum WaveformIndex : uint16_t {
+    /* Physical waveform */
+    WAVEFORM_LONG_VIBRATION_EFFECT_INDEX = 0,
+    WAVEFORM_RESERVED_INDEX_1 = 1,
+    WAVEFORM_CLICK_INDEX = 2,
+    WAVEFORM_SHORT_VIBRATION_EFFECT_INDEX = 3,
+    WAVEFORM_THUD_INDEX = 4,
+    WAVEFORM_SPIN_INDEX = 5,
+    WAVEFORM_QUICK_RISE_INDEX = 6,
+    WAVEFORM_SLOW_RISE_INDEX = 7,
+    WAVEFORM_QUICK_FALL_INDEX = 8,
+    WAVEFORM_LIGHT_TICK_INDEX = 9,
+    WAVEFORM_LOW_TICK_INDEX = 10,
+    WAVEFORM_RESERVED_MFG_1,
+    WAVEFORM_RESERVED_MFG_2,
+    WAVEFORM_RESERVED_MFG_3,
+    WAVEFORM_MAX_PHYSICAL_INDEX,
+    /* OWT waveform */
+    WAVEFORM_COMPOSE = WAVEFORM_MAX_PHYSICAL_INDEX,
+    WAVEFORM_PWLE,
+    /*
+     * Refer to <linux/input.h>, the WAVEFORM_MAX_INDEX must not exceed 96.
+     * #define FF_GAIN          0x60  // 96 in decimal
+     * #define FF_MAX_EFFECTS   FF_GAIN
+     */
+    WAVEFORM_MAX_INDEX,
+};
+
+static const EffectScale ON_GLOBAL_SCALE{levelToScale(V_LONG_DEFAULT[1])};
+static const EffectIndex ON_EFFECT_INDEX{0};
+
+static const std::map<EffectTuple, EffectScale> EFFECT_SCALE{
+        {{Effect::TICK, EffectStrength::LIGHT},
+         Scale(0.5f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::TICK, EffectStrength::MEDIUM},
+         Scale(0.5f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::TICK, EffectStrength::STRONG},
+         Scale(0.5f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::CLICK, EffectStrength::LIGHT},
+         Scale(0.7f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::CLICK, EffectStrength::MEDIUM},
+         Scale(0.7f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::CLICK, EffectStrength::STRONG},
+         Scale(0.7f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::HEAVY_CLICK, EffectStrength::LIGHT},
+         Scale(1.0f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::HEAVY_CLICK, EffectStrength::MEDIUM},
+         Scale(1.0f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::HEAVY_CLICK, EffectStrength::STRONG},
+         Scale(1.0f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+        {{Effect::TEXTURE_TICK, EffectStrength::LIGHT},
+         Scale(0.5f * 0.5f, V_TICK_DEFAULT[0], V_TICK_DEFAULT[1])},
+        {{Effect::TEXTURE_TICK, EffectStrength::MEDIUM},
+         Scale(0.5f * 0.7f, V_TICK_DEFAULT[0], V_TICK_DEFAULT[1])},
+        {{Effect::TEXTURE_TICK, EffectStrength::STRONG},
+         Scale(0.5f * 1.0f, V_TICK_DEFAULT[0], V_TICK_DEFAULT[1])},
+};
+
+static const std::map<EffectTuple, EffectQueue> EFFECT_QUEUE{
+        {{Effect::DOUBLE_CLICK, EffectStrength::LIGHT},
+         Queue(QueueEffect{EFFECT_INDEX.at(Effect::CLICK),
+                           Level(0.7f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+               100,
+               QueueEffect{EFFECT_INDEX.at(Effect::CLICK),
+                           Level(1.0f * 0.5f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])})},
+        {{Effect::DOUBLE_CLICK, EffectStrength::MEDIUM},
+         Queue(QueueEffect{EFFECT_INDEX.at(Effect::CLICK),
+                           Level(0.7f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+               100,
+               QueueEffect{EFFECT_INDEX.at(Effect::CLICK),
+                           Level(1.0f * 0.7f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])})},
+        {{Effect::DOUBLE_CLICK, EffectStrength::STRONG},
+         Queue(QueueEffect{EFFECT_INDEX.at(Effect::CLICK),
+                           Level(0.7f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])},
+               100,
+               QueueEffect{EFFECT_INDEX.at(Effect::CLICK),
+                           Level(1.0f * 1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])})},
+};
+
+EffectQueue Queue(const QueueEffect &effect) {
+    auto index = std::get<0>(effect);
+    auto level = std::get<1>(effect);
+    auto string = std::to_string(index) + "." + std::to_string(level);
+    auto duration = EFFECT_DURATIONS[index];
+    return {string, duration};
+}
+
+EffectQueue Queue(const QueueDelay &delay) {
+    auto string = std::to_string(delay);
+    return {string, delay};
+}
+
+template <typename T, typename U, typename... Args>
+EffectQueue Queue(const T &first, const U &second, Args... rest) {
+    auto head = Queue(first);
+    auto tail = Queue(second, rest...);
+    auto string = std::get<0>(head) + "," + std::get<0>(tail);
+    auto duration = std::get<1>(head) + std::get<1>(tail);
+    return {string, duration};
+}
+
+static EffectLevel Level(float intensity, float levelLow, float levelHigh) {
+    return std::lround(intensity * (levelHigh - levelLow)) + levelLow;
+}
+
+static EffectScale Scale(float intensity, float levelLow, float levelHigh) {
+    return levelToScale(Level(intensity, levelLow, levelHigh));
+}
+
+class VibratorTest : public Test {
+  public:
+    void SetUp() override {
+        setenv("INPUT_EVENT_NAME", "CS40L26TestSuite", true);
+        std::unique_ptr<MockApi> mockapi;
+        std::unique_ptr<MockCal> mockcal;
+
+        createMock(&mockapi, &mockcal);
+        createVibrator(std::move(mockapi), std::move(mockcal));
+    }
+
+    void TearDown() override { deleteVibrator(); }
+
+  protected:
+    void createMock(std::unique_ptr<MockApi> *mockapi, std::unique_ptr<MockCal> *mockcal) {
+        *mockapi = std::make_unique<MockApi>();
+        *mockcal = std::make_unique<MockCal>();
+
+        mMockApi = mockapi->get();
+        mMockCal = mockcal->get();
+
+        ON_CALL(*mMockApi, destructor()).WillByDefault(Assign(&mMockApi, nullptr));
+
+        ON_CALL(*mMockApi, setFFGain(_, _)).WillByDefault(Return(true));
+        ON_CALL(*mMockApi, setFFEffect(_, _, _)).WillByDefault(Return(true));
+        ON_CALL(*mMockApi, setFFPlay(_, _, _)).WillByDefault(Return(true));
+        ON_CALL(*mMockApi, pollVibeState(_, _)).WillByDefault(Return(true));
+        ON_CALL(*mMockApi, uploadOwtEffect(_, _, _, _, _, _)).WillByDefault(Return(true));
+        ON_CALL(*mMockApi, eraseOwtEffect(_, _, _)).WillByDefault(Return(true));
+
+        ON_CALL(*mMockApi, getOwtFreeSpace(_))
+                .WillByDefault(DoAll(SetArgPointee<0>(11504), Return(true)));
+
+        ON_CALL(*mMockCal, destructor()).WillByDefault(Assign(&mMockCal, nullptr));
+
+        ON_CALL(*mMockCal, getVersion(_))
+                .WillByDefault(DoAll(SetArgPointee<0>(CAL_VERSION), Return(true)));
+
+        ON_CALL(*mMockCal, getTickVolLevels(_))
+                .WillByDefault(DoAll(SetArgPointee<0>(V_TICK_DEFAULT), Return(true)));
+        ON_CALL(*mMockCal, getClickVolLevels(_))
+                .WillByDefault(DoAll(SetArgPointee<0>(V_CLICK_DEFAULT), Return(true)));
+        ON_CALL(*mMockCal, getLongVolLevels(_))
+                .WillByDefault(DoAll(SetArgPointee<0>(V_LONG_DEFAULT), Return(true)));
+
+        relaxMock(false);
+    }
+
+    void createVibrator(std::unique_ptr<MockApi> mockapi, std::unique_ptr<MockCal> mockcal,
+                        bool relaxed = true) {
+        if (relaxed) {
+            relaxMock(true);
+        }
+        mVibrator = ndk::SharedRefBase::make<Vibrator>(std::move(mockapi), std::move(mockcal));
+        if (relaxed) {
+            relaxMock(false);
+        }
+    }
+
+    void deleteVibrator(bool relaxed = true) {
+        if (relaxed) {
+            relaxMock(true);
+        }
+        mVibrator.reset();
+    }
+
+  private:
+    void relaxMock(bool relax) {
+        auto times = relax ? AnyNumber() : Exactly(0);
+
+        Mock::VerifyAndClearExpectations(mMockApi);
+        Mock::VerifyAndClearExpectations(mMockCal);
+
+        EXPECT_CALL(*mMockApi, destructor()).Times(times);
+        EXPECT_CALL(*mMockApi, setF0(_)).Times(times);
+        EXPECT_CALL(*mMockApi, setF0Offset(_)).Times(times);
+        EXPECT_CALL(*mMockApi, setRedc(_)).Times(times);
+        EXPECT_CALL(*mMockApi, setQ(_)).Times(times);
+        EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).Times(times);
+        EXPECT_CALL(*mMockApi, getOwtFreeSpace(_)).Times(times);
+        EXPECT_CALL(*mMockApi, setF0CompEnable(_)).Times(times);
+        EXPECT_CALL(*mMockApi, setRedcCompEnable(_)).Times(times);
+        EXPECT_CALL(*mMockApi, pollVibeState(_, _)).Times(times);
+        EXPECT_CALL(*mMockApi, setFFGain(_, _)).Times(times);
+        EXPECT_CALL(*mMockApi, setFFEffect(_, _, _)).Times(times);
+        EXPECT_CALL(*mMockApi, setFFPlay(_, _, _)).Times(times);
+        EXPECT_CALL(*mMockApi, setMinOnOffInterval(_)).Times(times);
+        EXPECT_CALL(*mMockApi, getContextScale()).Times(times);
+        EXPECT_CALL(*mMockApi, getContextEnable()).Times(times);
+        EXPECT_CALL(*mMockApi, getContextSettlingTime()).Times(times);
+        EXPECT_CALL(*mMockApi, getContextCooldownTime()).Times(times);
+        EXPECT_CALL(*mMockApi, getContextFadeEnable()).Times(times);
+        EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).Times(times);
+        EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, _, _, _)).Times(times);
+
+        EXPECT_CALL(*mMockApi, debug(_)).Times(times);
+
+        EXPECT_CALL(*mMockCal, destructor()).Times(times);
+        EXPECT_CALL(*mMockCal, getF0(_)).Times(times);
+        EXPECT_CALL(*mMockCal, getRedc(_)).Times(times);
+        EXPECT_CALL(*mMockCal, getQ(_)).Times(times);
+        EXPECT_CALL(*mMockCal, getTickVolLevels(_)).Times(times);
+        EXPECT_CALL(*mMockCal, getClickVolLevels(_)).Times(times);
+        EXPECT_CALL(*mMockCal, getLongVolLevels(_)).Times(times);
+        EXPECT_CALL(*mMockCal, isChirpEnabled()).Times(times);
+        EXPECT_CALL(*mMockCal, getLongFrequencyShift(_)).Times(times);
+        EXPECT_CALL(*mMockCal, isF0CompEnabled()).Times(times);
+        EXPECT_CALL(*mMockCal, isRedcCompEnabled()).Times(times);
+        EXPECT_CALL(*mMockCal, debug(_)).Times(times);
+    }
+
+  protected:
+    MockApi *mMockApi;
+    MockCal *mMockCal;
+    std::shared_ptr<IVibrator> mVibrator;
+    uint32_t mEffectIndex;
+};
+
+TEST_F(VibratorTest, Constructor) {
+    std::unique_ptr<MockApi> mockapi;
+    std::unique_ptr<MockCal> mockcal;
+    std::string f0Val = std::to_string(std::rand());
+    std::string redcVal = std::to_string(std::rand());
+    std::string qVal = std::to_string(std::rand());
+    uint32_t calVer;
+    uint32_t supportedPrimitivesBits = 0x0;
+    Expectation volGet;
+    Sequence f0Seq, redcSeq, qSeq, supportedPrimitivesSeq;
+
+    EXPECT_CALL(*mMockApi, destructor()).WillOnce(DoDefault());
+    EXPECT_CALL(*mMockCal, destructor()).WillOnce(DoDefault());
+
+    deleteVibrator(false);
+
+    createMock(&mockapi, &mockcal);
+
+    EXPECT_CALL(*mMockCal, getF0(_))
+            .InSequence(f0Seq)
+            .WillOnce(DoAll(SetArgReferee<0>(f0Val), Return(true)));
+    EXPECT_CALL(*mMockApi, setF0(f0Val)).InSequence(f0Seq).WillOnce(Return(true));
+
+    EXPECT_CALL(*mMockCal, getRedc(_))
+            .InSequence(redcSeq)
+            .WillOnce(DoAll(SetArgReferee<0>(redcVal), Return(true)));
+    EXPECT_CALL(*mMockApi, setRedc(redcVal)).InSequence(redcSeq).WillOnce(Return(true));
+
+    EXPECT_CALL(*mMockCal, getQ(_))
+            .InSequence(qSeq)
+            .WillOnce(DoAll(SetArgReferee<0>(qVal), Return(true)));
+    EXPECT_CALL(*mMockApi, setQ(qVal)).InSequence(qSeq).WillOnce(Return(true));
+
+    EXPECT_CALL(*mMockCal, getLongFrequencyShift(_)).WillOnce(Return(true));
+
+    mMockCal->getVersion(&calVer);
+    if (calVer == 2) {
+        volGet = EXPECT_CALL(*mMockCal, getTickVolLevels(_)).WillOnce(DoDefault());
+        volGet = EXPECT_CALL(*mMockCal, getClickVolLevels(_)).WillOnce(DoDefault());
+        volGet = EXPECT_CALL(*mMockCal, getLongVolLevels(_)).WillOnce(DoDefault());
+    }
+
+    EXPECT_CALL(*mMockCal, isF0CompEnabled()).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, setF0CompEnable(true)).WillOnce(Return(true));
+    EXPECT_CALL(*mMockCal, isRedcCompEnabled()).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, setRedcCompEnable(true)).WillOnce(Return(true));
+
+    EXPECT_CALL(*mMockCal, isChirpEnabled()).WillOnce(Return(true));
+    EXPECT_CALL(*mMockCal, getSupportedPrimitives(_))
+            .InSequence(supportedPrimitivesSeq)
+            .WillOnce(DoAll(SetArgPointee<0>(supportedPrimitivesBits), Return(true)));
+
+    EXPECT_CALL(*mMockApi, setMinOnOffInterval(MIN_ON_OFF_INTERVAL_US)).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, getContextScale()).WillOnce(Return(0));
+    EXPECT_CALL(*mMockApi, getContextEnable()).WillOnce(Return(false));
+    EXPECT_CALL(*mMockApi, getContextSettlingTime()).WillOnce(Return(0));
+    EXPECT_CALL(*mMockApi, getContextCooldownTime()).WillOnce(Return(0));
+    EXPECT_CALL(*mMockApi, getContextFadeEnable()).WillOnce(Return(false));
+    createVibrator(std::move(mockapi), std::move(mockcal), false);
+}
+
+TEST_F(VibratorTest, on) {
+    Sequence s1, s2;
+    uint16_t duration = std::rand() + 1;
+
+    EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)).InSequence(s1).WillOnce(DoDefault());
+    EXPECT_CALL(*mMockApi, setFFEffect(_, _, duration + MAX_COLD_START_LATENCY_MS))
+            .InSequence(s2)
+            .WillOnce(DoDefault());
+    EXPECT_CALL(*mMockApi, setFFPlay(_, ON_EFFECT_INDEX, true))
+            .InSequence(s1, s2)
+            .WillOnce(DoDefault());
+    EXPECT_TRUE(mVibrator->on(duration, nullptr).isOk());
+}
+
+TEST_F(VibratorTest, off) {
+    Sequence s1;
+    EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)).InSequence(s1).WillOnce(DoDefault());
+    EXPECT_TRUE(mVibrator->off().isOk());
+}
+
+TEST_F(VibratorTest, supportsAmplitudeControl_supported) {
+    int32_t capabilities;
+    EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(true));
+
+    EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk());
+    EXPECT_GT(capabilities & IVibrator::CAP_AMPLITUDE_CONTROL, 0);
+}
+
+TEST_F(VibratorTest, supportsExternalAmplitudeControl_unsupported) {
+    int32_t capabilities;
+    EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(true));
+
+    EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk());
+    EXPECT_EQ(capabilities & IVibrator::CAP_EXTERNAL_AMPLITUDE_CONTROL, 0);
+}
+
+TEST_F(VibratorTest, setAmplitude_supported) {
+    EffectAmplitude amplitude = static_cast<float>(std::rand()) / RAND_MAX ?: 1.0f;
+
+    EXPECT_CALL(*mMockApi, setFFGain(_, amplitudeToScale(amplitude))).WillOnce(Return(true));
+
+    EXPECT_TRUE(mVibrator->setAmplitude(amplitude).isOk());
+}
+
+TEST_F(VibratorTest, supportsExternalControl_supported) {
+    int32_t capabilities;
+    EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(true));
+
+    EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk());
+    EXPECT_GT(capabilities & IVibrator::CAP_EXTERNAL_CONTROL, 0);
+}
+
+TEST_F(VibratorTest, supportsExternalControl_unsupported) {
+    int32_t capabilities;
+    EXPECT_CALL(*mMockApi, hasOwtFreeSpace()).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).WillOnce(Return(false));
+
+    EXPECT_TRUE(mVibrator->getCapabilities(&capabilities).isOk());
+    EXPECT_EQ(capabilities & IVibrator::CAP_EXTERNAL_CONTROL, 0);
+}
+
+TEST_F(VibratorTest, setExternalControl_enable) {
+    Sequence s1, s2;
+    EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE)).InSequence(s1).WillOnce(DoDefault());
+    EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).InSequence(s2).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, true, _, _))
+            .InSequence(s1, s2)
+            .WillOnce(Return(true));
+
+    EXPECT_TRUE(mVibrator->setExternalControl(true).isOk());
+}
+
+TEST_F(VibratorTest, setExternalControl_disable) {
+    Sequence s1, s2, s3, s4;
+
+    // The default mIsUnderExternalControl is false, so it needs to turn on the External Control
+    // to make mIsUnderExternalControl become true.
+    EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE))
+            .InSequence(s1)
+            .InSequence(s1)
+            .WillOnce(DoDefault());
+    EXPECT_CALL(*mMockApi, getHapticAlsaDevice(_, _)).InSequence(s2).WillOnce(Return(true));
+    EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, true, _, _)).InSequence(s3).WillOnce(Return(true));
+
+    EXPECT_TRUE(mVibrator->setExternalControl(true).isOk());
+
+    EXPECT_CALL(*mMockApi, setFFGain(_, levelToScale(VOLTAGE_SCALE_MAX)))
+            .InSequence(s4)
+            .WillOnce(DoDefault());
+    EXPECT_CALL(*mMockApi, setHapticPcmAmp(_, false, _, _))
+            .InSequence(s1, s2, s3, s4)
+            .WillOnce(Return(true));
+
+    EXPECT_TRUE(mVibrator->setExternalControl(false).isOk());
+}
+
+class EffectsTest : public VibratorTest, public WithParamInterface<EffectTuple> {
+  public:
+    static auto PrintParam(const TestParamInfo<ParamType> &info) {
+        auto param = info.param;
+        auto effect = std::get<0>(param);
+        auto strength = std::get<1>(param);
+        return toString(effect) + "_" + toString(strength);
+    }
+};
+
+TEST_P(EffectsTest, perform) {
+    auto param = GetParam();
+    auto effect = std::get<0>(param);
+    auto strength = std::get<1>(param);
+    auto scale = EFFECT_SCALE.find(param);
+    auto queue = EFFECT_QUEUE.find(param);
+    EffectDuration duration;
+    auto callback = ndk::SharedRefBase::make<MockVibratorCallback>();
+    std::promise<void> promise;
+    std::future<void> future{promise.get_future()};
+    auto complete = [&promise] {
+        promise.set_value();
+        return ndk::ScopedAStatus::ok();
+    };
+    bool composeEffect;
+
+    ExpectationSet eSetup;
+    Expectation eActivate, ePollHaptics, ePollStop, eEraseDone;
+
+    if (scale != EFFECT_SCALE.end()) {
+        EffectIndex index = EFFECT_INDEX.at(effect);
+        duration = EFFECT_DURATIONS[index];
+
+        eSetup += EXPECT_CALL(*mMockApi, setFFGain(_, levelToScale(scale->second)))
+                          .WillOnce(DoDefault());
+        eActivate = EXPECT_CALL(*mMockApi, setFFPlay(_, index, true))
+                            .After(eSetup)
+                            .WillOnce(DoDefault());
+    } else if (queue != EFFECT_QUEUE.end()) {
+        duration = std::get<1>(queue->second);
+        eSetup += EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE))
+                          .After(eSetup)
+                          .WillOnce(DoDefault());
+        eSetup += EXPECT_CALL(*mMockApi, getOwtFreeSpace(_)).WillOnce(DoDefault());
+        eSetup += EXPECT_CALL(*mMockApi, uploadOwtEffect(_, _, _, _, _, _))
+                          .After(eSetup)
+                          .WillOnce(DoDefault());
+        eActivate = EXPECT_CALL(*mMockApi, setFFPlay(_, WAVEFORM_COMPOSE, true))
+                            .After(eSetup)
+                            .WillOnce(DoDefault());
+        composeEffect = true;
+    } else {
+        duration = 0;
+    }
+
+    if (duration) {
+        ePollHaptics = EXPECT_CALL(*mMockApi, pollVibeState(1, POLLING_TIMEOUT))
+                               .After(eActivate)
+                               .WillOnce(DoDefault());
+        ePollStop = EXPECT_CALL(*mMockApi, pollVibeState(0, -1))
+                            .After(ePollHaptics)
+                            .WillOnce(DoDefault());
+        if (composeEffect) {
+            eEraseDone = EXPECT_CALL(*mMockApi, eraseOwtEffect(_, _, _))
+                                 .After(ePollStop)
+                                 .WillOnce(DoDefault());
+            EXPECT_CALL(*callback, onComplete()).After(eEraseDone).WillOnce(complete);
+        } else {
+            EXPECT_CALL(*callback, onComplete()).After(ePollStop).WillOnce(complete);
+        }
+    }
+
+    int32_t lengthMs;
+    ndk::ScopedAStatus status = mVibrator->perform(effect, strength, callback, &lengthMs);
+    if (status.isOk()) {
+        EXPECT_LE(duration, lengthMs);
+    } else {
+        EXPECT_EQ(EX_UNSUPPORTED_OPERATION, status.getExceptionCode());
+        EXPECT_EQ(0, lengthMs);
+    }
+
+    if (duration) {
+        EXPECT_EQ(future.wait_for(std::chrono::milliseconds(100)), std::future_status::ready);
+    }
+}
+
+const std::vector<Effect> kEffects{ndk::enum_range<Effect>().begin(),
+                                   ndk::enum_range<Effect>().end()};
+const std::vector<EffectStrength> kEffectStrengths{ndk::enum_range<EffectStrength>().begin(),
+                                                   ndk::enum_range<EffectStrength>().end()};
+
+INSTANTIATE_TEST_CASE_P(VibratorTests, EffectsTest,
+                        Combine(ValuesIn(kEffects.begin(), kEffects.end()),
+                                ValuesIn(kEffectStrengths.begin(), kEffectStrengths.end())),
+                        EffectsTest::PrintParam);
+
+struct PrimitiveParam {
+    CompositePrimitive primitive;
+    EffectIndex index;
+};
+
+class PrimitiveTest : public VibratorTest, public WithParamInterface<PrimitiveParam> {
+  public:
+    static auto PrintParam(const TestParamInfo<ParamType> &info) {
+        return toString(info.param.primitive);
+    }
+};
+
+const std::vector<PrimitiveParam> kPrimitiveParams = {
+        {CompositePrimitive::CLICK, 2},      {CompositePrimitive::THUD, 4},
+        {CompositePrimitive::SPIN, 5},       {CompositePrimitive::QUICK_RISE, 6},
+        {CompositePrimitive::SLOW_RISE, 7},  {CompositePrimitive::QUICK_FALL, 8},
+        {CompositePrimitive::LIGHT_TICK, 9}, {CompositePrimitive::LOW_TICK, 10},
+};
+
+TEST_P(PrimitiveTest, getPrimitiveDuration) {
+    auto param = GetParam();
+    auto primitive = param.primitive;
+    auto index = param.index;
+    int32_t duration;
+
+    EXPECT_EQ(EX_NONE, mVibrator->getPrimitiveDuration(primitive, &duration).getExceptionCode());
+    EXPECT_EQ(EFFECT_DURATIONS[index], duration);
+}
+
+INSTANTIATE_TEST_CASE_P(VibratorTests, PrimitiveTest,
+                        ValuesIn(kPrimitiveParams.begin(), kPrimitiveParams.end()),
+                        PrimitiveTest::PrintParam);
+
+struct ComposeParam {
+    std::string name;
+    std::vector<CompositeEffect> composite;
+    EffectQueue queue;
+};
+
+class ComposeTest : public VibratorTest, public WithParamInterface<ComposeParam> {
+  public:
+    static auto PrintParam(const TestParamInfo<ParamType> &info) { return info.param.name; }
+};
+
+TEST_P(ComposeTest, compose) {
+    auto param = GetParam();
+    auto composite = param.composite;
+    auto queue = std::get<0>(param.queue);
+    ExpectationSet eSetup;
+    Expectation eActivate, ePollHaptics, ePollStop, eEraseDone;
+    auto callback = ndk::SharedRefBase::make<MockVibratorCallback>();
+    std::promise<void> promise;
+    std::future<void> future{promise.get_future()};
+    auto complete = [&promise] {
+        promise.set_value();
+        return ndk::ScopedAStatus::ok();
+    };
+
+    eSetup += EXPECT_CALL(*mMockApi, setFFGain(_, ON_GLOBAL_SCALE))
+                      .After(eSetup)
+                      .WillOnce(DoDefault());
+    eSetup += EXPECT_CALL(*mMockApi, getOwtFreeSpace(_)).WillOnce(DoDefault());
+    eSetup += EXPECT_CALL(*mMockApi, uploadOwtEffect(_, _, _, _, _, _))
+                      .After(eSetup)
+                      .WillOnce(DoDefault());
+    eActivate = EXPECT_CALL(*mMockApi, setFFPlay(_, WAVEFORM_COMPOSE, true))
+                        .After(eSetup)
+                        .WillOnce(DoDefault());
+
+    ePollHaptics = EXPECT_CALL(*mMockApi, pollVibeState(1, POLLING_TIMEOUT))
+                           .After(eActivate)
+                           .WillOnce(DoDefault());
+    ePollStop =
+            EXPECT_CALL(*mMockApi, pollVibeState(0, -1)).After(ePollHaptics).WillOnce(DoDefault());
+    eEraseDone =
+            EXPECT_CALL(*mMockApi, eraseOwtEffect(_, _, _)).After(ePollStop).WillOnce(DoDefault());
+    EXPECT_CALL(*callback, onComplete()).After(eEraseDone).WillOnce(complete);
+
+    EXPECT_EQ(EX_NONE, mVibrator->compose(composite, callback).getExceptionCode());
+
+    EXPECT_EQ(future.wait_for(std::chrono::milliseconds(100)), std::future_status::ready);
+}
+
+const std::vector<ComposeParam> kComposeParams = {
+        {"click",
+         {{0, CompositePrimitive::CLICK, 1.0f}},
+         Queue(QueueEffect(2, Level(1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)},
+        {"thud",
+         {{1, CompositePrimitive::THUD, 0.8f}},
+         Queue(1, QueueEffect(4, Level(0.8f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)},
+        {"spin",
+         {{2, CompositePrimitive::SPIN, 0.6f}},
+         Queue(2, QueueEffect(5, Level(0.6f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)},
+        {"quick_rise",
+         {{3, CompositePrimitive::QUICK_RISE, 0.4f}},
+         Queue(3, QueueEffect(6, Level(0.4f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])), 0)},
+        {"slow_rise",
+         {{4, CompositePrimitive::SLOW_RISE, 0.0f}},
+         Queue(4, QueueEffect(7, Level(0.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)},
+        {"quick_fall",
+         {{5, CompositePrimitive::QUICK_FALL, 1.0f}},
+         Queue(5, QueueEffect(8, Level(1.0f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])), 0)},
+        {"pop",
+         {{6, CompositePrimitive::SLOW_RISE, 1.0f}, {50, CompositePrimitive::THUD, 1.0f}},
+         Queue(6, QueueEffect(7, Level(1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 50,
+               QueueEffect(4, Level(1.0f, V_CLICK_DEFAULT[0], V_CLICK_DEFAULT[1])), 0)},
+        {"snap",
+         {{7, CompositePrimitive::QUICK_RISE, 1.0f}, {0, CompositePrimitive::QUICK_FALL, 1.0f}},
+         Queue(7, QueueEffect(6, Level(1.0f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])),
+               QueueEffect(8, Level(1.0f, V_LONG_DEFAULT[0], V_LONG_DEFAULT[1])), 0)},
+};
+
+INSTANTIATE_TEST_CASE_P(VibratorTests, ComposeTest,
+                        ValuesIn(kComposeParams.begin(), kComposeParams.end()),
+                        ComposeTest::PrintParam);
+}  // namespace vibrator
+}  // namespace hardware
+}  // namespace android
+}  // namespace aidl
diff --git a/vibrator/cs40l26/tests/types.h b/vibrator/cs40l26/tests/types.h
new file mode 100644
index 0000000..e05c648
--- /dev/null
+++ b/vibrator/cs40l26/tests/types.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2022 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ANDROID_HARDWARE_VIBRATOR_TEST_TYPES_H
+#define ANDROID_HARDWARE_VIBRATOR_TEST_TYPES_H
+
+#include <aidl/android/hardware/vibrator/IVibrator.h>
+
+using EffectIndex = uint16_t;
+using EffectLevel = uint32_t;
+using EffectAmplitude = float;
+using EffectScale = uint16_t;
+using EffectDuration = uint32_t;
+using EffectQueue = std::tuple<std::string, EffectDuration>;
+using EffectTuple = std::tuple<::aidl::android::hardware::vibrator::Effect,
+                               ::aidl::android::hardware::vibrator::EffectStrength>;
+
+using QueueEffect = std::tuple<EffectIndex, EffectLevel>;
+using QueueDelay = uint32_t;
+
+#endif  // ANDROID_HARDWARE_VIBRATOR_TEST_TYPES_H
diff --git a/vibrator/cs40l26/tests/utils.h b/vibrator/cs40l26/tests/utils.h
new file mode 100644
index 0000000..e7f6055
--- /dev/null
+++ b/vibrator/cs40l26/tests/utils.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2022 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ANDROID_HARDWARE_VIBRATOR_TEST_UTILS_H
+#define ANDROID_HARDWARE_VIBRATOR_TEST_UTILS_H
+
+#include <cmath>
+
+#include "types.h"
+
+static inline EffectScale toScale(float amplitude, float maximum) {
+    float ratio = 100; /* Unit: % */
+    if (maximum != 0)
+        ratio = amplitude / maximum * 100;
+
+    if (maximum == 0 || ratio > 100)
+        ratio = 100;
+
+    return std::round(ratio);
+}
+
+static inline EffectScale levelToScale(EffectLevel level) {
+    return toScale(level, 100);
+}
+
+static inline EffectScale amplitudeToScale(EffectAmplitude amplitude) {
+    return toScale(amplitude, 1.0f);
+}
+
+static inline uint32_t msToCycles(EffectDuration ms) {
+    return ms * 48;
+}
+
+#endif  // ANDROID_HARDWARE_VIBRATOR_TEST_UTILS_H